Re: [PATCH v1 05/19] arm: dts: mt7623: add BTIF, HSDMA and SPI-NOR device nodes

[Sean Wang]

On Mon, 2018-03-12 at 10:40 +0100, Matthias Brugger wrote:
> 
> On 02/23/2018 11:16 AM, sean.w...@mediatek.com wrote:
> > From: Sean Wang 
> > 
> > add BTIF, HSDMA and SPI-NOR device nodes and enable it on relevant boards
> 
> AFAIK hsdma controller is not upstream yet.
> Please resubmit when at least the binding got merged.
> 

Sure, I will drop the node for HSDMA in the next version.

> Thanks,
> Matthias
> 
> > 
> > Signed-off-by: Sean Wang 
> > ---
> >  arch/arm/boot/dts/mt7623.dtsi | 36 
> > ++-
> >  arch/arm/boot/dts/mt7623n-bananapi-bpi-r2.dts |  6 -
> >  2 files changed, 40 insertions(+), 2 deletions(-)
> > 
> > diff --git a/arch/arm/boot/dts/mt7623.dtsi b/arch/arm/boot/dts/mt7623.dtsi
> > index 91317a1..da56c54 100644
> > --- a/arch/arm/boot/dts/mt7623.dtsi
> > +++ b/arch/arm/boot/dts/mt7623.dtsi
> > @@ -1,5 +1,5 @@
> >  /*
> > - * Copyright (c) 2017 MediaTek Inc.
> > + * Copyright (c) 2017-2018 MediaTek Inc.
> >   * Author: John Crispin 
> >   *Sean Wang 
> >   *
> > @@ -483,6 +483,18 @@
> > nvmem-cell-names = "calibration-data";
> > };
> >  
> > +   btif: serial@1100c000 {
> > +   compatible = "mediatek,mt7623-btif",
> > +"mediatek,mtk-btif";
> > +   reg = <0 0x1100c000 0 0x1000>;
> > +   interrupts = ;
> > +   clocks = <&pericfg CLK_PERI_BTIF>;
> > +   clock-names = "main";
> > +   reg-shift = <2>;
> > +   reg-io-width = <4>;
> > +   status = "disabled";
> > +   };
> > +
> > nandc: nfi@1100d000 {
> > compatible = "mediatek,mt7623-nfc",
> >  "mediatek,mt2701-nfc";
> > @@ -508,6 +520,18 @@
> > status = "disabled";
> > };
> >  
> > +   nor_flash: spi@11014000 {
> > +   compatible = "mediatek,mt7623-nor",
> > +"mediatek,mt8173-nor";
> > +   reg = <0 0x11014000 0 0x1000>;
> > +   clocks = <&pericfg CLK_PERI_FLASH>,
> > +<&topckgen CLK_TOP_FLASH_SEL>;
> > +   clock-names = "spi", "sf";
> > +   #address-cells = <1>;
> > +   #size-cells = <0>;
> > +   status = "disabled";
> > +   };
> > +
> > spi1: spi@11016000 {
> > compatible = "mediatek,mt7623-spi",
> >  "mediatek,mt2701-spi";
> > @@ -861,6 +885,16 @@
> > #reset-cells = <1>;
> > };
> >  
> > +   hsdma: dma-controller@1b007000 {
> > +   compatible = "mediatek,mt7623-hsdma";
> > +   reg = <0 0x1b007000 0 0x1000>;
> > +   interrupts = ;
> > +   clocks = <ðsys CLK_ETHSYS_HSDMA>;
> > +   clock-names = "hsdma";
> > +   power-domains = <&scpsys MT2701_POWER_DOMAIN_ETH>;
> > +   #dma-cells = <1>;
> > +   };
> > +
> > eth: ethernet@1b10 {
> > compatible = "mediatek,mt7623-eth",
> >  "mediatek,mt2701-eth",
> > diff --git a/arch/arm/boot/dts/mt7623n-bananapi-bpi-r2.dts 
> > b/arch/arm/boot/dts/mt7623n-bananapi-bpi-r2.dts
> > index 3efecc5..ec11e14 100644
> > --- a/arch/arm/boot/dts/mt7623n-bananapi-bpi-r2.dts
> > +++ b/arch/arm/boot/dts/mt7623n-bananapi-bpi-r2.dts
> > @@ -1,5 +1,5 @@
> >  /*
> > - * Copyright 2017 Sean Wang 
> > + * Copyright 2017-2018 Sean Wang 
> >   *
> >   * SPDX-License-Identifier: (GPL-2.0+ OR MIT)
> >   */
> > @@ -86,6 +86,10 @@
> > };
> >  };
> >  
> > +&btif {
> > +   status = "okay";
> > +};
> > +
> >  &cir {
> > pinctrl-names = "default";
> > pinctrl-0 = <&cir_pins_a>;
> > 

Re: [PATCH v1 05/19] arm: dts: mt7623: add BTIF, HSDMA and SPI-NOR device nodes

[Matthias Brugger]

On 02/23/2018 11:16 AM, sean.w...@mediatek.com wrote:
> From: Sean Wang 
> 
> add BTIF, HSDMA and SPI-NOR device nodes and enable it on relevant boards

AFAIK hsdma controller is not upstream yet.
Please resubmit when at least the binding got merged.

Thanks,
Matthias

> 
> Signed-off-by: Sean Wang 
> ---
>  arch/arm/boot/dts/mt7623.dtsi | 36 
> ++-
>  arch/arm/boot/dts/mt7623n-bananapi-bpi-r2.dts |  6 -
>  2 files changed, 40 insertions(+), 2 deletions(-)
> 
> diff --git a/arch/arm/boot/dts/mt7623.dtsi b/arch/arm/boot/dts/mt7623.dtsi
> index 91317a1..da56c54 100644
> --- a/arch/arm/boot/dts/mt7623.dtsi
> +++ b/arch/arm/boot/dts/mt7623.dtsi
> @@ -1,5 +1,5 @@
>  /*
> - * Copyright (c) 2017 MediaTek Inc.
> + * Copyright (c) 2017-2018 MediaTek Inc.
>   * Author: John Crispin 
>   *  Sean Wang 
>   *
> @@ -483,6 +483,18 @@
>   nvmem-cell-names = "calibration-data";
>   };
>  
> + btif: serial@1100c000 {
> + compatible = "mediatek,mt7623-btif",
> +  "mediatek,mtk-btif";
> + reg = <0 0x1100c000 0 0x1000>;
> + interrupts = ;
> + clocks = <&pericfg CLK_PERI_BTIF>;
> + clock-names = "main";
> + reg-shift = <2>;
> + reg-io-width = <4>;
> + status = "disabled";
> + };
> +
>   nandc: nfi@1100d000 {
>   compatible = "mediatek,mt7623-nfc",
>"mediatek,mt2701-nfc";
> @@ -508,6 +520,18 @@
>   status = "disabled";
>   };
>  
> + nor_flash: spi@11014000 {
> + compatible = "mediatek,mt7623-nor",
> +  "mediatek,mt8173-nor";
> + reg = <0 0x11014000 0 0x1000>;
> + clocks = <&pericfg CLK_PERI_FLASH>,
> +  <&topckgen CLK_TOP_FLASH_SEL>;
> + clock-names = "spi", "sf";
> + #address-cells = <1>;
> + #size-cells = <0>;
> + status = "disabled";
> + };
> +
>   spi1: spi@11016000 {
>   compatible = "mediatek,mt7623-spi",
>"mediatek,mt2701-spi";
> @@ -861,6 +885,16 @@
>   #reset-cells = <1>;
>   };
>  
> + hsdma: dma-controller@1b007000 {
> + compatible = "mediatek,mt7623-hsdma";
> + reg = <0 0x1b007000 0 0x1000>;
> + interrupts = ;
> + clocks = <ðsys CLK_ETHSYS_HSDMA>;
> + clock-names = "hsdma";
> + power-domains = <&scpsys MT2701_POWER_DOMAIN_ETH>;
> + #dma-cells = <1>;
> + };
> +
>   eth: ethernet@1b10 {
>   compatible = "mediatek,mt7623-eth",
>"mediatek,mt2701-eth",
> diff --git a/arch/arm/boot/dts/mt7623n-bananapi-bpi-r2.dts 
> b/arch/arm/boot/dts/mt7623n-bananapi-bpi-r2.dts
> index 3efecc5..ec11e14 100644
> --- a/arch/arm/boot/dts/mt7623n-bananapi-bpi-r2.dts
> +++ b/arch/arm/boot/dts/mt7623n-bananapi-bpi-r2.dts
> @@ -1,5 +1,5 @@
>  /*
> - * Copyright 2017 Sean Wang 
> + * Copyright 2017-2018 Sean Wang 
>   *
>   * SPDX-License-Identifier: (GPL-2.0+ OR MIT)
>   */
> @@ -86,6 +86,10 @@
>   };
>  };
>  
> +&btif {
> + status = "okay";
> +};
> +
>  &cir {
>   pinctrl-names = "default";
>   pinctrl-0 = <&cir_pins_a>;
>