Re: [PATCH v2] clk: hisilicon: add CRG driver for Hi3798CV200 SoC

2016-10-10 Thread Jiancheng Xue
在 2016/9/24 9:45, Jiancheng Xue 写道: > 在 2016/9/24 1:47, Rob Herring 写道: >> On Sun, Sep 18, 2016 at 03:30:21PM +0800, Jiancheng Xue wrote: >>> Add CRG driver for Hi3798CV200 SoC. CRG(Clock and Reset >>> Generator) module generates clock and reset signals used >>> by other module blocks on SoC.

Re: [PATCH v2] clk: hisilicon: add CRG driver for Hi3798CV200 SoC

2016-10-10 Thread Jiancheng Xue
在 2016/9/24 9:45, Jiancheng Xue 写道: > 在 2016/9/24 1:47, Rob Herring 写道: >> On Sun, Sep 18, 2016 at 03:30:21PM +0800, Jiancheng Xue wrote: >>> Add CRG driver for Hi3798CV200 SoC. CRG(Clock and Reset >>> Generator) module generates clock and reset signals used >>> by other module blocks on SoC.

Re: [PATCH v2] clk: hisilicon: add CRG driver for Hi3798CV200 SoC

2016-09-23 Thread Jiancheng Xue
在 2016/9/24 1:47, Rob Herring 写道: > On Sun, Sep 18, 2016 at 03:30:21PM +0800, Jiancheng Xue wrote: >> Add CRG driver for Hi3798CV200 SoC. CRG(Clock and Reset >> Generator) module generates clock and reset signals used >> by other module blocks on SoC. >> >> Signed-off-by: Jiancheng Xue

Re: [PATCH v2] clk: hisilicon: add CRG driver for Hi3798CV200 SoC

2016-09-23 Thread Jiancheng Xue
在 2016/9/24 1:47, Rob Herring 写道: > On Sun, Sep 18, 2016 at 03:30:21PM +0800, Jiancheng Xue wrote: >> Add CRG driver for Hi3798CV200 SoC. CRG(Clock and Reset >> Generator) module generates clock and reset signals used >> by other module blocks on SoC. >> >> Signed-off-by: Jiancheng Xue >> --- >>

Re: [PATCH v2] clk: hisilicon: add CRG driver for Hi3798CV200 SoC

2016-09-23 Thread Rob Herring
On Sun, Sep 18, 2016 at 03:30:21PM +0800, Jiancheng Xue wrote: > Add CRG driver for Hi3798CV200 SoC. CRG(Clock and Reset > Generator) module generates clock and reset signals used > by other module blocks on SoC. > > Signed-off-by: Jiancheng Xue > --- > change log >

Re: [PATCH v2] clk: hisilicon: add CRG driver for Hi3798CV200 SoC

2016-09-23 Thread Rob Herring
On Sun, Sep 18, 2016 at 03:30:21PM +0800, Jiancheng Xue wrote: > Add CRG driver for Hi3798CV200 SoC. CRG(Clock and Reset > Generator) module generates clock and reset signals used > by other module blocks on SoC. > > Signed-off-by: Jiancheng Xue > --- > change log > v2: > - Fixed compiling error