On July 14, 2020 5:03:31 PM PDT, "Zhang, Cathy" wrote:
>On 7/15/2020 7:05 AM, h...@zytor.com wrote:
>> On July 14, 2020 3:42:08 PM PDT, "Zhang, Cathy"
> wrote:
>>> On 7/14/2020 11:00 AM, Sean Christopherson wrote:
On Tue, Jul 07, 2020 at 10:16:22AM +0800, Cathy Zhang wrote:
> SERIALIZE
On 7/15/2020 7:05 AM, h...@zytor.com wrote:
On July 14, 2020 3:42:08 PM PDT, "Zhang, Cathy" wrote:
On 7/14/2020 11:00 AM, Sean Christopherson wrote:
On Tue, Jul 07, 2020 at 10:16:22AM +0800, Cathy Zhang wrote:
SERIALIZE instruction is supported by intel processors,
like Sapphire Rapids.
On July 14, 2020 3:42:08 PM PDT, "Zhang, Cathy" wrote:
>On 7/14/2020 11:00 AM, Sean Christopherson wrote:
>> On Tue, Jul 07, 2020 at 10:16:22AM +0800, Cathy Zhang wrote:
>>> SERIALIZE instruction is supported by intel processors,
>>> like Sapphire Rapids. Expose it in KVM supported cpuid.
>>
On 7/14/2020 11:00 AM, Sean Christopherson wrote:
On Tue, Jul 07, 2020 at 10:16:22AM +0800, Cathy Zhang wrote:
SERIALIZE instruction is supported by intel processors,
like Sapphire Rapids. Expose it in KVM supported cpuid.
Providing at least a rough overview of the instruction, e.g. its
On Tue, Jul 07, 2020 at 10:16:22AM +0800, Cathy Zhang wrote:
> SERIALIZE instruction is supported by intel processors,
> like Sapphire Rapids. Expose it in KVM supported cpuid.
Providing at least a rough overview of the instruction, e.g. its enumeration,
usage, fault rules, controls, etc... would
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