Re: [PATCH v3 01/11] net: phy: Add rockchip phy driver support

2017-08-09 Thread David.Wu

Hi Andrew,

在 2017/8/2 21:21, Andrew Lunn 写道:

+static struct phy_driver rockchip_phy_driver[] = {
+{
+   .phy_id = 0x1234d400,
+   .phy_id_mask= 0xfff0,
+   .name   = "Rockchip internal EPHY",
+   .features   = (PHY_BASIC_FEATURES | SUPPORTED_Pause
+  | SUPPORTED_Asym_Pause),


Please take a look at Documentation/networking/phy.txt and
Fixes: 529ed1275263 ("net: phy: phy drivers should not set 
SUPPORTED_[Asym_]Pause")

Pause frames / flow control

  The PHY does not participate directly in flow control/pause frames except by
  making sure that the SUPPORTED_Pause and SUPPORTED_AsymPause bits are set in
  MII_ADVERTISE to indicate towards the link partner that the Ethernet MAC
  controller supports such a thing. Since flow control/pause frames generation
  involves the Ethernet MAC driver, it is recommended that this driver takes 
care
  of properly indicating advertisement and support for such features by setting
  the SUPPORTED_Pause and SUPPORTED_AsymPause bits accordingly. This can be done
  either before or after phy_connect() and/or as a result of implementing the
  ethtool::set_pauseparam feature.



Thanks for the reminder, I'll remove it.


Andrew







Re: [PATCH v3 01/11] net: phy: Add rockchip phy driver support

2017-08-09 Thread David.Wu

Hi Andrew,

在 2017/8/2 21:21, Andrew Lunn 写道:

+static struct phy_driver rockchip_phy_driver[] = {
+{
+   .phy_id = 0x1234d400,
+   .phy_id_mask= 0xfff0,
+   .name   = "Rockchip internal EPHY",
+   .features   = (PHY_BASIC_FEATURES | SUPPORTED_Pause
+  | SUPPORTED_Asym_Pause),


Please take a look at Documentation/networking/phy.txt and
Fixes: 529ed1275263 ("net: phy: phy drivers should not set 
SUPPORTED_[Asym_]Pause")

Pause frames / flow control

  The PHY does not participate directly in flow control/pause frames except by
  making sure that the SUPPORTED_Pause and SUPPORTED_AsymPause bits are set in
  MII_ADVERTISE to indicate towards the link partner that the Ethernet MAC
  controller supports such a thing. Since flow control/pause frames generation
  involves the Ethernet MAC driver, it is recommended that this driver takes 
care
  of properly indicating advertisement and support for such features by setting
  the SUPPORTED_Pause and SUPPORTED_AsymPause bits accordingly. This can be done
  either before or after phy_connect() and/or as a result of implementing the
  ethtool::set_pauseparam feature.



Thanks for the reminder, I'll remove it.


Andrew







Re: [PATCH v3 01/11] net: phy: Add rockchip phy driver support

2017-08-02 Thread Andrew Lunn
> +static struct phy_driver rockchip_phy_driver[] = {
> +{
> + .phy_id = 0x1234d400,
> + .phy_id_mask= 0xfff0,
> + .name   = "Rockchip internal EPHY",
> + .features   = (PHY_BASIC_FEATURES | SUPPORTED_Pause
> +| SUPPORTED_Asym_Pause),

Please take a look at Documentation/networking/phy.txt and
Fixes: 529ed1275263 ("net: phy: phy drivers should not set 
SUPPORTED_[Asym_]Pause")

Pause frames / flow control

 The PHY does not participate directly in flow control/pause frames except by
 making sure that the SUPPORTED_Pause and SUPPORTED_AsymPause bits are set in
 MII_ADVERTISE to indicate towards the link partner that the Ethernet MAC
 controller supports such a thing. Since flow control/pause frames generation
 involves the Ethernet MAC driver, it is recommended that this driver takes care
 of properly indicating advertisement and support for such features by setting
 the SUPPORTED_Pause and SUPPORTED_AsymPause bits accordingly. This can be done
 either before or after phy_connect() and/or as a result of implementing the
 ethtool::set_pauseparam feature.

Andrew


Re: [PATCH v3 01/11] net: phy: Add rockchip phy driver support

2017-08-02 Thread Andrew Lunn
> +static struct phy_driver rockchip_phy_driver[] = {
> +{
> + .phy_id = 0x1234d400,
> + .phy_id_mask= 0xfff0,
> + .name   = "Rockchip internal EPHY",
> + .features   = (PHY_BASIC_FEATURES | SUPPORTED_Pause
> +| SUPPORTED_Asym_Pause),

Please take a look at Documentation/networking/phy.txt and
Fixes: 529ed1275263 ("net: phy: phy drivers should not set 
SUPPORTED_[Asym_]Pause")

Pause frames / flow control

 The PHY does not participate directly in flow control/pause frames except by
 making sure that the SUPPORTED_Pause and SUPPORTED_AsymPause bits are set in
 MII_ADVERTISE to indicate towards the link partner that the Ethernet MAC
 controller supports such a thing. Since flow control/pause frames generation
 involves the Ethernet MAC driver, it is recommended that this driver takes care
 of properly indicating advertisement and support for such features by setting
 the SUPPORTED_Pause and SUPPORTED_AsymPause bits accordingly. This can be done
 either before or after phy_connect() and/or as a result of implementing the
 ethtool::set_pauseparam feature.

Andrew


Re: [PATCH v3 01/11] net: phy: Add rockchip phy driver support

2017-08-02 Thread Corentin Labbe
Hello I have some minor comment below

> +
> +#include 
> +#include 
> +#include 
> +#include 
> +#include 
> +#include 

in alphabetic order please

[...]
> +static int rockchip_init_tstmode(struct phy_device *phydev)
> +{
> + int ret;
> +
> + /* Enable access to Analog and DSP register banks */
> + ret = phy_write(phydev, SMI_ADDR_TSTCNTL, 0x0400);
> + if (ret)
> + return ret;
> +
> + ret = phy_write(phydev, SMI_ADDR_TSTCNTL, 0x);
> + if (ret)
> + return ret;
> +
> + return phy_write(phydev, SMI_ADDR_TSTCNTL, 0x0400);
> +}
> +
> +static int rockchip_close_tstmode(struct phy_device *phydev)
> +{
> + /* Back to basic register bank */
> + return phy_write(phydev, SMI_ADDR_TSTCNTL, 0x);

The reuse of 0x and 0x0400 seems to promote a define use

[...]
> +static struct phy_driver rockchip_phy_driver[] = {
> +{
> + .phy_id = 0x1234d400,
> + .phy_id_mask= 0xfff0,
> + .name   = "Rockchip internal EPHY",
> + .features   = (PHY_BASIC_FEATURES | SUPPORTED_Pause
> +| SUPPORTED_Asym_Pause),
> + .flags  = PHY_IS_INTERNAL,
> + .link_change_notify = rockchip_link_change_notify,
> + .soft_reset = genphy_soft_reset,
> + .config_init= rockchip_internal_phy_config_init,
> + .config_aneg= rockchip_config_aneg,
> + .read_status= genphy_read_status,
> + .suspend= genphy_suspend,
> + .resume = rockchip_phy_resume,
> +},
> +};
> +
> +module_phy_driver(rockchip_phy_driver);
> +
> +static struct mdio_device_id __maybe_unused rockchip_phy_tbl[] = {
> + { 0x1234d400, 0xfff0 },

Same comment for phy_id, use a define

Regards
Corentin Labbe


Re: [PATCH v3 01/11] net: phy: Add rockchip phy driver support

2017-08-02 Thread Corentin Labbe
Hello I have some minor comment below

> +
> +#include 
> +#include 
> +#include 
> +#include 
> +#include 
> +#include 

in alphabetic order please

[...]
> +static int rockchip_init_tstmode(struct phy_device *phydev)
> +{
> + int ret;
> +
> + /* Enable access to Analog and DSP register banks */
> + ret = phy_write(phydev, SMI_ADDR_TSTCNTL, 0x0400);
> + if (ret)
> + return ret;
> +
> + ret = phy_write(phydev, SMI_ADDR_TSTCNTL, 0x);
> + if (ret)
> + return ret;
> +
> + return phy_write(phydev, SMI_ADDR_TSTCNTL, 0x0400);
> +}
> +
> +static int rockchip_close_tstmode(struct phy_device *phydev)
> +{
> + /* Back to basic register bank */
> + return phy_write(phydev, SMI_ADDR_TSTCNTL, 0x);

The reuse of 0x and 0x0400 seems to promote a define use

[...]
> +static struct phy_driver rockchip_phy_driver[] = {
> +{
> + .phy_id = 0x1234d400,
> + .phy_id_mask= 0xfff0,
> + .name   = "Rockchip internal EPHY",
> + .features   = (PHY_BASIC_FEATURES | SUPPORTED_Pause
> +| SUPPORTED_Asym_Pause),
> + .flags  = PHY_IS_INTERNAL,
> + .link_change_notify = rockchip_link_change_notify,
> + .soft_reset = genphy_soft_reset,
> + .config_init= rockchip_internal_phy_config_init,
> + .config_aneg= rockchip_config_aneg,
> + .read_status= genphy_read_status,
> + .suspend= genphy_suspend,
> + .resume = rockchip_phy_resume,
> +},
> +};
> +
> +module_phy_driver(rockchip_phy_driver);
> +
> +static struct mdio_device_id __maybe_unused rockchip_phy_tbl[] = {
> + { 0x1234d400, 0xfff0 },

Same comment for phy_id, use a define

Regards
Corentin Labbe