Re: [PATCH v3 1/2] net: phy: dp83867: Add binding for the CLK_OUT pin muxing option

[David Miller]

From: Daniel Schultz 
Date: Wed, 14 Feb 2018 17:07:11 +0100

> From: Wadim Egorov 
> 
> The DP83867 has a muxing option for the CLK_OUT pin. It is possible
> to set CLK_OUT for different channels.
> Create a binding to select a specific clock for CLK_OUT pin.
> 
> Signed-off-by: Wadim Egorov 
> Signed-off-by: Daniel Schultz 
> ---
> Changes:
>   v2:
> Added check if clk_output_sel has a valid value
> Only write the clock ouput register if a musing is desired
>   v3:
> -

Applied to net-next.

Re: [PATCH v3 1/2] net: phy: dp83867: Add binding for the CLK_OUT pin muxing option

[David Miller]

From: Daniel Schultz 
Date: Wed, 14 Feb 2018 17:07:11 +0100

> From: Wadim Egorov 
> 
> The DP83867 has a muxing option for the CLK_OUT pin. It is possible
> to set CLK_OUT for different channels.
> Create a binding to select a specific clock for CLK_OUT pin.
> 
> Signed-off-by: Wadim Egorov 
> Signed-off-by: Daniel Schultz 
> ---
> Changes:
>   v2:
> Added check if clk_output_sel has a valid value
> Only write the clock ouput register if a musing is desired
>   v3:
> -

Applied to net-next.

Re: [PATCH v3 1/2] net: phy: dp83867: Add binding for the CLK_OUT pin muxing option

[Florian Fainelli]

On February 14, 2018 8:07:11 AM PST, Daniel Schultz  wrote:
>From: Wadim Egorov 
>
>The DP83867 has a muxing option for the CLK_OUT pin. It is possible
>to set CLK_OUT for different channels.
>Create a binding to select a specific clock for CLK_OUT pin.
>
>Signed-off-by: Wadim Egorov 
>Signed-off-by: Daniel Schultz 
>---
>Changes:
>   v2:
> Added check if clk_output_sel has a valid value
> Only write the clock ouput register if a musing is desired
>   v3:
> -
>
> drivers/net/phy/dp83867.c| 19 +++
> include/dt-bindings/net/ti-dp83867.h | 14 ++
> 2 files changed, 33 insertions(+)
>
>diff --git a/drivers/net/phy/dp83867.c b/drivers/net/phy/dp83867.c
>index c1ab976..a862194 100644
>--- a/drivers/net/phy/dp83867.c
>+++ b/drivers/net/phy/dp83867.c
>@@ -75,6 +75,8 @@
> 
> #define DP83867_IO_MUX_CFG_IO_IMPEDANCE_MAX   0x0
> #define DP83867_IO_MUX_CFG_IO_IMPEDANCE_MIN   0x1f
>+#define DP83867_IO_MUX_CFG_CLK_O_SEL_MASK (0x1f << 8)
>+#define DP83867_IO_MUX_CFG_CLK_O_SEL_SHIFT8
> 

Nit: it looks like you could use the shift constant you define for defining the 
mask as well.

Other than that:

Reviewed-by: Florian Fainelli 

-- 
Florian

Re: [PATCH v3 1/2] net: phy: dp83867: Add binding for the CLK_OUT pin muxing option

[Florian Fainelli]

On February 14, 2018 8:07:11 AM PST, Daniel Schultz  wrote:
>From: Wadim Egorov 
>
>The DP83867 has a muxing option for the CLK_OUT pin. It is possible
>to set CLK_OUT for different channels.
>Create a binding to select a specific clock for CLK_OUT pin.
>
>Signed-off-by: Wadim Egorov 
>Signed-off-by: Daniel Schultz 
>---
>Changes:
>   v2:
> Added check if clk_output_sel has a valid value
> Only write the clock ouput register if a musing is desired
>   v3:
> -
>
> drivers/net/phy/dp83867.c| 19 +++
> include/dt-bindings/net/ti-dp83867.h | 14 ++
> 2 files changed, 33 insertions(+)
>
>diff --git a/drivers/net/phy/dp83867.c b/drivers/net/phy/dp83867.c
>index c1ab976..a862194 100644
>--- a/drivers/net/phy/dp83867.c
>+++ b/drivers/net/phy/dp83867.c
>@@ -75,6 +75,8 @@
> 
> #define DP83867_IO_MUX_CFG_IO_IMPEDANCE_MAX   0x0
> #define DP83867_IO_MUX_CFG_IO_IMPEDANCE_MIN   0x1f
>+#define DP83867_IO_MUX_CFG_CLK_O_SEL_MASK (0x1f << 8)
>+#define DP83867_IO_MUX_CFG_CLK_O_SEL_SHIFT8
> 

Nit: it looks like you could use the shift constant you define for defining the 
mask as well.

Other than that:

Reviewed-by: Florian Fainelli 

-- 
Florian

Re: [PATCH v3 1/2] net: phy: dp83867: Add binding for the CLK_OUT pin muxing option

[Andrew Lunn]

On Wed, Feb 14, 2018 at 05:07:11PM +0100, Daniel Schultz wrote:
> From: Wadim Egorov 
> 
> The DP83867 has a muxing option for the CLK_OUT pin. It is possible
> to set CLK_OUT for different channels.
> Create a binding to select a specific clock for CLK_OUT pin.
> 
> Signed-off-by: Wadim Egorov 
> Signed-off-by: Daniel Schultz 

Reviewed-by: Andrew Lunn 

Andrew

Re: [PATCH v3 1/2] net: phy: dp83867: Add binding for the CLK_OUT pin muxing option

[Andrew Lunn]

On Wed, Feb 14, 2018 at 05:07:11PM +0100, Daniel Schultz wrote:
> From: Wadim Egorov 
> 
> The DP83867 has a muxing option for the CLK_OUT pin. It is possible
> to set CLK_OUT for different channels.
> Create a binding to select a specific clock for CLK_OUT pin.
> 
> Signed-off-by: Wadim Egorov 
> Signed-off-by: Daniel Schultz 

Reviewed-by: Andrew Lunn 

Andrew