Hi James,
I'll send v4 to fix some small issue, for same one who interested
with this feature could test it. For the question you mentioned,
I will study in depth.
Any comments is welcome.
On 2017/9/16 2:33, James Morse wrote:
> Hi Xie XiuQi,
>
> On 11/09/17 15:11, Xie XiuQi wrote:
>> I first
Hi James,
I'll send v4 to fix some small issue, for same one who interested
with this feature could test it. For the question you mentioned,
I will study in depth.
Any comments is welcome.
On 2017/9/16 2:33, James Morse wrote:
> Hi Xie XiuQi,
>
> On 11/09/17 15:11, Xie XiuQi wrote:
>> I first
Hi James,
I try to explain some of following questions.
On 2017/9/16 2:33, James Morse wrote:
> Hi Xie XiuQi,
>
> On 11/09/17 15:11, Xie XiuQi wrote:
>> I first describe the approach of this patchset:
>>
>> A memory access error on the execution path usually triggers SEA.
>> According to the
Hi James,
I try to explain some of following questions.
On 2017/9/16 2:33, James Morse wrote:
> Hi Xie XiuQi,
>
> On 11/09/17 15:11, Xie XiuQi wrote:
>> I first describe the approach of this patchset:
>>
>> A memory access error on the execution path usually triggers SEA.
>> According to the
Hi Xie XiuQi,
On 11/09/17 15:11, Xie XiuQi wrote:
> I first describe the approach of this patchset:
>
> A memory access error on the execution path usually triggers SEA.
> According to the existing process, errors occurred in the kernel,
> leading to direct panic, if it occurred the user-space,
Hi Xie XiuQi,
On 11/09/17 15:11, Xie XiuQi wrote:
> I first describe the approach of this patchset:
>
> A memory access error on the execution path usually triggers SEA.
> According to the existing process, errors occurred in the kernel,
> leading to direct panic, if it occurred the user-space,
Hi James,
Thank you very much for your carefully review.
I first describe the approach of this patchset:
A memory access error on the execution path usually triggers SEA.
According to the existing process, errors occurred in the kernel,
leading to direct panic, if it occurred the user-space, we
Hi James,
Thank you very much for your carefully review.
I first describe the approach of this patchset:
A memory access error on the execution path usually triggers SEA.
According to the existing process, errors occurred in the kernel,
leading to direct panic, if it occurred the user-space, we
Hi James,
Thanks for your comments.
On 2017/9/9 2:15, James Morse wrote:
> Hi Xie XiuQi,
>
> (Sorry a few versions of this went past before I caught up with it)
>
> On 07/09/17 08:45, Xie XiuQi wrote:
>> With ARM v8.2 RAS Extension, SEA are usually triggered when memory errors
>> are consumed.
Hi James,
Thanks for your comments.
On 2017/9/9 2:15, James Morse wrote:
> Hi Xie XiuQi,
>
> (Sorry a few versions of this went past before I caught up with it)
>
> On 07/09/17 08:45, Xie XiuQi wrote:
>> With ARM v8.2 RAS Extension, SEA are usually triggered when memory errors
>> are consumed.
Hi Xie XiuQi,
(Sorry a few versions of this went past before I caught up with it)
On 07/09/17 08:45, Xie XiuQi wrote:
> With ARM v8.2 RAS Extension, SEA are usually triggered when memory errors
> are consumed. In some cases, if the error address is in a clean page or a
> read-only page, there is
Hi Xie XiuQi,
(Sorry a few versions of this went past before I caught up with it)
On 07/09/17 08:45, Xie XiuQi wrote:
> With ARM v8.2 RAS Extension, SEA are usually triggered when memory errors
> are consumed. In some cases, if the error address is in a clean page or a
> read-only page, there is
On Thu, Sep 07, 2017 at 03:45:14PM +0800, Xie XiuQi wrote:
> With ARM v8.2 RAS Extension, SEA are usually triggered when memory errors
> are consumed. In some cases, if the error address is in a clean page or a
> read-only page, there is a chance to recover. Such as error occurs in a
> instruction
On Thu, Sep 07, 2017 at 03:45:14PM +0800, Xie XiuQi wrote:
> With ARM v8.2 RAS Extension, SEA are usually triggered when memory errors
> are consumed. In some cases, if the error address is in a clean page or a
> read-only page, there is a chance to recover. Such as error occurs in a
> instruction
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