Re: [PATCH v3 3/5] arm64: dts: renesas: r8a7795-es1: Fix register mappings on VSPs
On Wed, Feb 14, 2018 at 12:08:56PM +0200, Laurent Pinchart wrote: > Hi Kieran, > > Thank you for the patch. > > On Wednesday, 14 February 2018 11:55:06 EET Kieran Bingham wrote: > > From: Kieran Bingham> > > > The VSPD includes a CLUT on RPF2. Ensure that the register space is > > mapped correctly to support this. > > > > Signed-off-by: Kieran Bingham > > Reviewed-by: Laurent Pinchart Thanks, applied.
Re: [PATCH v3 3/5] arm64: dts: renesas: r8a7795-es1: Fix register mappings on VSPs
On Wed, Feb 14, 2018 at 12:08:56PM +0200, Laurent Pinchart wrote: > Hi Kieran, > > Thank you for the patch. > > On Wednesday, 14 February 2018 11:55:06 EET Kieran Bingham wrote: > > From: Kieran Bingham > > > > The VSPD includes a CLUT on RPF2. Ensure that the register space is > > mapped correctly to support this. > > > > Signed-off-by: Kieran Bingham > > Reviewed-by: Laurent Pinchart Thanks, applied.
Re: [PATCH v3 3/5] arm64: dts: renesas: r8a7795-es1: Fix register mappings on VSPs
Hi Kieran, Thank you for the patch. On Wednesday, 14 February 2018 11:55:06 EET Kieran Bingham wrote: > From: Kieran Bingham> > The VSPD includes a CLUT on RPF2. Ensure that the register space is > mapped correctly to support this. > > Signed-off-by: Kieran Bingham Reviewed-by: Laurent Pinchart > --- > arch/arm64/boot/dts/renesas/r8a7795-es1.dtsi | 2 +- > 1 file changed, 1 insertion(+), 1 deletion(-) > > diff --git a/arch/arm64/boot/dts/renesas/r8a7795-es1.dtsi > b/arch/arm64/boot/dts/renesas/r8a7795-es1.dtsi index > ed553338b4d4..1adfe6cad268 100644 > --- a/arch/arm64/boot/dts/renesas/r8a7795-es1.dtsi > +++ b/arch/arm64/boot/dts/renesas/r8a7795-es1.dtsi > @@ -80,7 +80,7 @@ > > vspd3: vsp@fea38000 { > compatible = "renesas,vsp2"; > - reg = <0 0xfea38000 0 0x4000>; > + reg = <0 0xfea38000 0 0x8000>; > interrupts = ; > clocks = < CPG_MOD 620>; > power-domains = < R8A7795_PD_ALWAYS_ON>; -- Regards, Laurent Pinchart
Re: [PATCH v3 3/5] arm64: dts: renesas: r8a7795-es1: Fix register mappings on VSPs
Hi Kieran, Thank you for the patch. On Wednesday, 14 February 2018 11:55:06 EET Kieran Bingham wrote: > From: Kieran Bingham > > The VSPD includes a CLUT on RPF2. Ensure that the register space is > mapped correctly to support this. > > Signed-off-by: Kieran Bingham Reviewed-by: Laurent Pinchart > --- > arch/arm64/boot/dts/renesas/r8a7795-es1.dtsi | 2 +- > 1 file changed, 1 insertion(+), 1 deletion(-) > > diff --git a/arch/arm64/boot/dts/renesas/r8a7795-es1.dtsi > b/arch/arm64/boot/dts/renesas/r8a7795-es1.dtsi index > ed553338b4d4..1adfe6cad268 100644 > --- a/arch/arm64/boot/dts/renesas/r8a7795-es1.dtsi > +++ b/arch/arm64/boot/dts/renesas/r8a7795-es1.dtsi > @@ -80,7 +80,7 @@ > > vspd3: vsp@fea38000 { > compatible = "renesas,vsp2"; > - reg = <0 0xfea38000 0 0x4000>; > + reg = <0 0xfea38000 0 0x8000>; > interrupts = ; > clocks = < CPG_MOD 620>; > power-domains = < R8A7795_PD_ALWAYS_ON>; -- Regards, Laurent Pinchart