On Thu, Dec 01, 2016 at 06:27:07PM -0800, Duc Dang wrote:
> PCIe controllers in X-Gene SoCs is not ECAM compliant: software
> needs to configure additional controller's register to address
> device at bus:dev:function.
>
> The quirk will discover controller MMIO register space and configure
>
On Thu, Dec 01, 2016 at 06:27:07PM -0800, Duc Dang wrote:
> PCIe controllers in X-Gene SoCs is not ECAM compliant: software
> needs to configure additional controller's register to address
> device at bus:dev:function.
>
> The quirk will discover controller MMIO register space and configure
>
On 12/02/2016 02:39 PM, Duc Dang wrote:
> On Fri, Dec 2, 2016 at 12:11 AM, Jon Masters wrote:
>> You're welcome.
>>
>> (Unrelated) Note that I added a console= and earlycon in my test (and got
>> the baud rate wrong for the console but nevermind...was ssh'd in after the
>>
On 12/02/2016 02:39 PM, Duc Dang wrote:
> On Fri, Dec 2, 2016 at 12:11 AM, Jon Masters wrote:
>> You're welcome.
>>
>> (Unrelated) Note that I added a console= and earlycon in my test (and got
>> the baud rate wrong for the console but nevermind...was ssh'd in after the
>> earlycon output I
On Fri, Dec 2, 2016 at 12:11 AM, Jon Masters wrote:
> You're welcome.
>
> (Unrelated) Note that I added a console= and earlycon in my test (and got the
> baud rate wrong for the console but nevermind...was ssh'd in after the
> earlycon output I cared about anyway) because of
On Fri, Dec 2, 2016 at 12:11 AM, Jon Masters wrote:
> You're welcome.
>
> (Unrelated) Note that I added a console= and earlycon in my test (and got the
> baud rate wrong for the console but nevermind...was ssh'd in after the
> earlycon output I cared about anyway) because of some other cleanup
You're welcome.
(Unrelated) Note that I added a console= and earlycon in my test (and got the
baud rate wrong for the console but nevermind...was ssh'd in after the earlycon
output I cared about anyway) because of some other cleanup work for the SPCR
parsing that apparently is still not quite
You're welcome.
(Unrelated) Note that I added a console= and earlycon in my test (and got the
baud rate wrong for the console but nevermind...was ssh'd in after the earlycon
output I cared about anyway) because of some other cleanup work for the SPCR
parsing that apparently is still not quite
On Thu, Dec 1, 2016 at 11:12 PM, Jon Masters wrote:
> On 12/01/2016 09:27 PM, Duc Dang wrote:
>> PCIe controllers in X-Gene SoCs is not ECAM compliant: software
>> needs to configure additional controller's register to address
>> device at bus:dev:function.
>>
>> The quirk will
On Thu, Dec 1, 2016 at 11:12 PM, Jon Masters wrote:
> On 12/01/2016 09:27 PM, Duc Dang wrote:
>> PCIe controllers in X-Gene SoCs is not ECAM compliant: software
>> needs to configure additional controller's register to address
>> device at bus:dev:function.
>>
>> The quirk will discover
On 12/01/2016 09:27 PM, Duc Dang wrote:
> PCIe controllers in X-Gene SoCs is not ECAM compliant: software
> needs to configure additional controller's register to address
> device at bus:dev:function.
>
> The quirk will discover controller MMIO register space and configure
> controller registers
On 12/01/2016 09:27 PM, Duc Dang wrote:
> PCIe controllers in X-Gene SoCs is not ECAM compliant: software
> needs to configure additional controller's register to address
> device at bus:dev:function.
>
> The quirk will discover controller MMIO register space and configure
> controller registers
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