Re: [PATCH v4 20/24] fpga: dfl: add FPGA Accelerated Function Unit driver basic framework
On Thu, Apr 05, 2018 at 01:26:57PM -0500, Alan Tull wrote: > On Tue, Feb 13, 2018 at 3:24 AM, Wu Hao wrote: > > Hi Hao, > > One minor thing below. > > > On DFL FPGA devices, the Accelerated Function Unit (AFU), can be > > reprogrammed for different functions. It connects to the FPGA > > infrastructure("blue bistream") via a Port. Port CSRs are implemented > > separately from the AFU CSRs to provide control and status of the Port. > > Once valid green bitstream is programmed into the AFU, it allows access > > to the AFU CSRs in the AFU MMIO space. > > > > This patch only implements basic driver framework for AFU, including > > device file operation framework. > > > > Signed-off-by: Tim Whisonant > > Signed-off-by: Enno Luebbers > > Signed-off-by: Shiva Rao > > Signed-off-by: Christopher Rauer > > Signed-off-by: Xiao Guangrong > > Signed-off-by: Wu Hao > > --- > > v3: rename driver to dfl-afu-main.c > > v4: rename to dfl-port and fix SPDX license issue. > > --- > > drivers/fpga/Kconfig| 9 +++ > > drivers/fpga/Makefile | 2 + > > drivers/fpga/dfl-afu-main.c | 159 > > > > 3 files changed, 170 insertions(+) > > create mode 100644 drivers/fpga/dfl-afu-main.c > > > > diff --git a/drivers/fpga/Kconfig b/drivers/fpga/Kconfig > > index 65d54a4..4c6b45f 100644 > > --- a/drivers/fpga/Kconfig > > +++ b/drivers/fpga/Kconfig > > @@ -168,6 +168,15 @@ config FPGA_DFL_FME_REGION > > help > > Say Y to enable FPGA Region driver for FPGA Management Engine. > > > > +config FPGA_DFL_AFU > > + tristate "FPGA DFL AFU Driver" > > + depends on FPGA_DFL > > + help > > + This is the driver for FPGA Accelerated Function Unit (AFU) which > > + implements AFU and Port management features. A User AFU connects > > + to the FPGA infrastructure via a Port. There may be more than 1 > > + Port/AFU per DFL based FPGA device. > > + > > config FPGA_DFL_PCI > > tristate "FPGA Device Feature List (DFL) PCIe Device Driver" > > depends on PCI && FPGA_DFL > > diff --git a/drivers/fpga/Makefile b/drivers/fpga/Makefile > > index 163894e..5c9607b 100644 > > --- a/drivers/fpga/Makefile > > +++ b/drivers/fpga/Makefile > > @@ -34,8 +34,10 @@ obj-$(CONFIG_FPGA_DFL_FME) += dfl-fme.o > > obj-$(CONFIG_FPGA_DFL_FME_MGR) += dfl-fme-mgr.o > > obj-$(CONFIG_FPGA_DFL_FME_BRIDGE) += dfl-fme-br.o > > obj-$(CONFIG_FPGA_DFL_FME_REGION) += dfl-fme-region.o > > +obj-$(CONFIG_FPGA_DFL_AFU) += dfl-afu.o > > > > dfl-fme-objs := dfl-fme-main.o dfl-fme-pr.o > > +dfl-afu-objs := dfl-afu-main.o > > > > # Drivers for FPGAs which implement DFL > > obj-$(CONFIG_FPGA_DFL_PCI) += dfl-pci.o > > diff --git a/drivers/fpga/dfl-afu-main.c b/drivers/fpga/dfl-afu-main.c > > new file mode 100644 > > index 000..70db28c > > --- /dev/null > > +++ b/drivers/fpga/dfl-afu-main.c > > @@ -0,0 +1,159 @@ > > +// SPDX-License-Identifier: GPL-2.0 > > +/* > > + * Driver for FPGA Accelerated Function Unit (AFU) > > + * > > + * Copyright (C) 2017 Intel Corporation, Inc. > > + * > > + * Authors: > > + * Wu Hao > > + * Xiao Guangrong > > + * Joseph Grecco > > + * Enno Luebbers > > + * Tim Whisonant > > + * Ananda Ravuri > > + * Henry Mitchel > > + */ > > + > > +#include > > +#include > > + > > +#include "dfl.h" > > + > > +static int port_hdr_init(struct platform_device *pdev, struct feature > > *feature) > > +{ > > + dev_dbg(&pdev->dev, "PORT HDR Init.\n"); > > + > > + return 0; > > +} > > + > > +static void port_hdr_uinit(struct platform_device *pdev, > > + struct feature *feature) > > +{ > > + dev_dbg(&pdev->dev, "PORT HDR UInit.\n"); > > +} > > + > > +static const struct feature_ops port_hdr_ops = { > > + .init = port_hdr_init, > > + .uinit = port_hdr_uinit, > > +}; > > + > > +static struct feature_driver port_feature_drvs[] = { > > + { > > + .id = PORT_FEATURE_ID_HEADER, > > + .ops = &port_hdr_ops, > > + }, > > + { > > + .ops = NULL, > > + } > > +}; > > + > > +static int afu_open(struct inode *inode, struct file *filp) > > +{ > > + struct platform_device *fdev = fpga_inode_to_feature_dev(inode); > > + struct feature_platform_data *pdata; > > + int ret; > > + > > + pdata = dev_get_platdata(&fdev->dev); > > + if (WARN_ON(!pdata)) > > + return -ENODEV; > > + > > + ret = feature_dev_use_begin(pdata); > > + if (ret) > > + return ret; > > + > > + dev_dbg(&fdev->dev, "Device File Open\n"); > > + filp->private_data = fdev; > > + > > + return 0; > > +} > > + > > +static int afu_release(struct inode *inode, struct file *filp) > > +{ > > + struct platform_device *pdev = filp->private_data; > > + struct feature_platform_data *pdata = dev_get_platdata(&pdev
Re: [PATCH v4 20/24] fpga: dfl: add FPGA Accelerated Function Unit driver basic framework
On Tue, Feb 13, 2018 at 3:24 AM, Wu Hao wrote: Hi Hao, One minor thing below. > On DFL FPGA devices, the Accelerated Function Unit (AFU), can be > reprogrammed for different functions. It connects to the FPGA > infrastructure("blue bistream") via a Port. Port CSRs are implemented > separately from the AFU CSRs to provide control and status of the Port. > Once valid green bitstream is programmed into the AFU, it allows access > to the AFU CSRs in the AFU MMIO space. > > This patch only implements basic driver framework for AFU, including > device file operation framework. > > Signed-off-by: Tim Whisonant > Signed-off-by: Enno Luebbers > Signed-off-by: Shiva Rao > Signed-off-by: Christopher Rauer > Signed-off-by: Xiao Guangrong > Signed-off-by: Wu Hao > --- > v3: rename driver to dfl-afu-main.c > v4: rename to dfl-port and fix SPDX license issue. > --- > drivers/fpga/Kconfig| 9 +++ > drivers/fpga/Makefile | 2 + > drivers/fpga/dfl-afu-main.c | 159 > > 3 files changed, 170 insertions(+) > create mode 100644 drivers/fpga/dfl-afu-main.c > > diff --git a/drivers/fpga/Kconfig b/drivers/fpga/Kconfig > index 65d54a4..4c6b45f 100644 > --- a/drivers/fpga/Kconfig > +++ b/drivers/fpga/Kconfig > @@ -168,6 +168,15 @@ config FPGA_DFL_FME_REGION > help > Say Y to enable FPGA Region driver for FPGA Management Engine. > > +config FPGA_DFL_AFU > + tristate "FPGA DFL AFU Driver" > + depends on FPGA_DFL > + help > + This is the driver for FPGA Accelerated Function Unit (AFU) which > + implements AFU and Port management features. A User AFU connects > + to the FPGA infrastructure via a Port. There may be more than 1 > + Port/AFU per DFL based FPGA device. > + > config FPGA_DFL_PCI > tristate "FPGA Device Feature List (DFL) PCIe Device Driver" > depends on PCI && FPGA_DFL > diff --git a/drivers/fpga/Makefile b/drivers/fpga/Makefile > index 163894e..5c9607b 100644 > --- a/drivers/fpga/Makefile > +++ b/drivers/fpga/Makefile > @@ -34,8 +34,10 @@ obj-$(CONFIG_FPGA_DFL_FME) += dfl-fme.o > obj-$(CONFIG_FPGA_DFL_FME_MGR) += dfl-fme-mgr.o > obj-$(CONFIG_FPGA_DFL_FME_BRIDGE) += dfl-fme-br.o > obj-$(CONFIG_FPGA_DFL_FME_REGION) += dfl-fme-region.o > +obj-$(CONFIG_FPGA_DFL_AFU) += dfl-afu.o > > dfl-fme-objs := dfl-fme-main.o dfl-fme-pr.o > +dfl-afu-objs := dfl-afu-main.o > > # Drivers for FPGAs which implement DFL > obj-$(CONFIG_FPGA_DFL_PCI) += dfl-pci.o > diff --git a/drivers/fpga/dfl-afu-main.c b/drivers/fpga/dfl-afu-main.c > new file mode 100644 > index 000..70db28c > --- /dev/null > +++ b/drivers/fpga/dfl-afu-main.c > @@ -0,0 +1,159 @@ > +// SPDX-License-Identifier: GPL-2.0 > +/* > + * Driver for FPGA Accelerated Function Unit (AFU) > + * > + * Copyright (C) 2017 Intel Corporation, Inc. > + * > + * Authors: > + * Wu Hao > + * Xiao Guangrong > + * Joseph Grecco > + * Enno Luebbers > + * Tim Whisonant > + * Ananda Ravuri > + * Henry Mitchel > + */ > + > +#include > +#include > + > +#include "dfl.h" > + > +static int port_hdr_init(struct platform_device *pdev, struct feature > *feature) > +{ > + dev_dbg(&pdev->dev, "PORT HDR Init.\n"); > + > + return 0; > +} > + > +static void port_hdr_uinit(struct platform_device *pdev, > + struct feature *feature) > +{ > + dev_dbg(&pdev->dev, "PORT HDR UInit.\n"); > +} > + > +static const struct feature_ops port_hdr_ops = { > + .init = port_hdr_init, > + .uinit = port_hdr_uinit, > +}; > + > +static struct feature_driver port_feature_drvs[] = { > + { > + .id = PORT_FEATURE_ID_HEADER, > + .ops = &port_hdr_ops, > + }, > + { > + .ops = NULL, > + } > +}; > + > +static int afu_open(struct inode *inode, struct file *filp) > +{ > + struct platform_device *fdev = fpga_inode_to_feature_dev(inode); > + struct feature_platform_data *pdata; > + int ret; > + > + pdata = dev_get_platdata(&fdev->dev); > + if (WARN_ON(!pdata)) > + return -ENODEV; > + > + ret = feature_dev_use_begin(pdata); > + if (ret) > + return ret; > + > + dev_dbg(&fdev->dev, "Device File Open\n"); > + filp->private_data = fdev; > + > + return 0; > +} > + > +static int afu_release(struct inode *inode, struct file *filp) > +{ > + struct platform_device *pdev = filp->private_data; > + struct feature_platform_data *pdata = dev_get_platdata(&pdev->dev); > + > + dev_dbg(&pdev->dev, "Device File Release\n"); > + > + feature_dev_use_end(pdata); > + > + return 0; > +} > + > +static long afu_ioctl(struct file *filp, unsigned int cmd, unsigned long arg) > +{ > + struct platform_device *pdev = filp->private_data; > + struct feature_platform_data *pdata = dev_get_platdata(
Re: [PATCH v4 20/24] fpga: dfl: add FPGA Accelerated Function Unit driver basic framework
On Tue, Feb 13, 2018 at 3:24 AM, Wu Hao wrote: Hi Hao, I acked this back in v2. > On DFL FPGA devices, the Accelerated Function Unit (AFU), can be > reprogrammed for different functions. It connects to the FPGA > infrastructure("blue bistream") via a Port. Port CSRs are implemented > separately from the AFU CSRs to provide control and status of the Port. > Once valid green bitstream is programmed into the AFU, it allows access > to the AFU CSRs in the AFU MMIO space. > > This patch only implements basic driver framework for AFU, including > device file operation framework. > > Signed-off-by: Tim Whisonant > Signed-off-by: Enno Luebbers > Signed-off-by: Shiva Rao > Signed-off-by: Christopher Rauer > Signed-off-by: Xiao Guangrong > Signed-off-by: Wu Hao Acked-by: Alan Tull Alan