Re: [PATCH v8 00/18] KVM PCIe/MSI passthrough on ARM/ARM64 and IOVA reserved regions
Hi Tomasz, On 13/01/2017 14:59, Tomasz Nowicki wrote: > Hello Eric, > > On 11.01.2017 10:41, Eric Auger wrote: >> Following LPC discussions, we now report reserved regions through >> the iommu-group sysfs reserved_regions attribute file. >> >> Reserved regions are populated through the IOMMU get_resv_region >> callback (former get_dm_regions), now implemented by amd-iommu, >> intel-iommu and arm-smmu: >> - the intel-iommu reports the [0xfee0 - 0xfeef] MSI window >> as a reserved region and RMRR regions as direct-mapped regions. >> - the amd-iommu reports device direct mapped regions, the MSI region >> and HT regions. >> - the arm-smmu reports the MSI window (arbitrarily located at >> 0x800 and 1MB large). >> >> Unsafe interrupt assignment is tested by enumerating all MSI irq >> domains and checking MSI remapping is supported in the above hierarchy. >> This check is done in case we detect the iommu translates MSI >> (an IOMMU_RESV_MSI window exists). Otherwise the IRQ remapping >> capability is checked at IOMMU level. Obviously this is a defensive >> IRQ safety assessment: Assuming there are several MSI controllers >> in the system and at least one does not implement IRQ remapping, >> the assignment will be considered as unsafe (even if this controller >> is not acessible from the assigned devices). >> >> The series first patch stems from Robin's branch: >> http://linux-arm.org/git?p=linux-rm.git;a=shortlog;h=refs/heads/iommu/misc >> >> >> Best Regards >> >> Eric >> >> Git: complete series available at >> https://github.com/eauger/linux/tree/v4.10-rc3-reserved-v8 > > I tested the series on ThunderX with internal 10G VNIC and Intel IXGBE > NIC. Please feel free to add my: > Tested-by: Tomasz Nowicki Thank you for your review. I will respin tomorrow adding the comment we discussed in [PATCH v8 14/18] irqdomain: irq_domain_check_msi_remap. I will also apply Bharat's Tested-by, your T-b and your R-b's. Thanks Eric > > Thanks, > Tomasz > > > ___ > linux-arm-kernel mailing list > linux-arm-ker...@lists.infradead.org > http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
Re: [PATCH v8 00/18] KVM PCIe/MSI passthrough on ARM/ARM64 and IOVA reserved regions
Hi Tomasz, On 13/01/2017 14:59, Tomasz Nowicki wrote: > Hello Eric, > > On 11.01.2017 10:41, Eric Auger wrote: >> Following LPC discussions, we now report reserved regions through >> the iommu-group sysfs reserved_regions attribute file. >> >> Reserved regions are populated through the IOMMU get_resv_region >> callback (former get_dm_regions), now implemented by amd-iommu, >> intel-iommu and arm-smmu: >> - the intel-iommu reports the [0xfee0 - 0xfeef] MSI window >> as a reserved region and RMRR regions as direct-mapped regions. >> - the amd-iommu reports device direct mapped regions, the MSI region >> and HT regions. >> - the arm-smmu reports the MSI window (arbitrarily located at >> 0x800 and 1MB large). >> >> Unsafe interrupt assignment is tested by enumerating all MSI irq >> domains and checking MSI remapping is supported in the above hierarchy. >> This check is done in case we detect the iommu translates MSI >> (an IOMMU_RESV_MSI window exists). Otherwise the IRQ remapping >> capability is checked at IOMMU level. Obviously this is a defensive >> IRQ safety assessment: Assuming there are several MSI controllers >> in the system and at least one does not implement IRQ remapping, >> the assignment will be considered as unsafe (even if this controller >> is not acessible from the assigned devices). >> >> The series first patch stems from Robin's branch: >> http://linux-arm.org/git?p=linux-rm.git;a=shortlog;h=refs/heads/iommu/misc >> >> >> Best Regards >> >> Eric >> >> Git: complete series available at >> https://github.com/eauger/linux/tree/v4.10-rc3-reserved-v8 > > I tested the series on ThunderX with internal 10G VNIC and Intel IXGBE > NIC. Please feel free to add my: > Tested-by: Tomasz Nowicki Many thanks! Eric > > Thanks, > Tomasz > > > ___ > linux-arm-kernel mailing list > linux-arm-ker...@lists.infradead.org > http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
Re: [PATCH v8 00/18] KVM PCIe/MSI passthrough on ARM/ARM64 and IOVA reserved regions
Hello Eric, On 11.01.2017 10:41, Eric Auger wrote: Following LPC discussions, we now report reserved regions through the iommu-group sysfs reserved_regions attribute file. Reserved regions are populated through the IOMMU get_resv_region callback (former get_dm_regions), now implemented by amd-iommu, intel-iommu and arm-smmu: - the intel-iommu reports the [0xfee0 - 0xfeef] MSI window as a reserved region and RMRR regions as direct-mapped regions. - the amd-iommu reports device direct mapped regions, the MSI region and HT regions. - the arm-smmu reports the MSI window (arbitrarily located at 0x800 and 1MB large). Unsafe interrupt assignment is tested by enumerating all MSI irq domains and checking MSI remapping is supported in the above hierarchy. This check is done in case we detect the iommu translates MSI (an IOMMU_RESV_MSI window exists). Otherwise the IRQ remapping capability is checked at IOMMU level. Obviously this is a defensive IRQ safety assessment: Assuming there are several MSI controllers in the system and at least one does not implement IRQ remapping, the assignment will be considered as unsafe (even if this controller is not acessible from the assigned devices). The series first patch stems from Robin's branch: http://linux-arm.org/git?p=linux-rm.git;a=shortlog;h=refs/heads/iommu/misc Best Regards Eric Git: complete series available at https://github.com/eauger/linux/tree/v4.10-rc3-reserved-v8 I tested the series on ThunderX with internal 10G VNIC and Intel IXGBE NIC. Please feel free to add my: Tested-by: Tomasz Nowicki Thanks, Tomasz
Re: [PATCH v8 00/18] KVM PCIe/MSI passthrough on ARM/ARM64 and IOVA reserved regions
Hi Bharat, On 12/01/2017 04:59, Bharat Bhushan wrote: > > >> -Original Message- >> From: Eric Auger [mailto:eric.au...@redhat.com] >> Sent: Wednesday, January 11, 2017 3:12 PM >> To: eric.au...@redhat.com; eric.auger@gmail.com; >> christoffer.d...@linaro.org; marc.zyng...@arm.com; >> robin.mur...@arm.com; alex.william...@redhat.com; >> will.dea...@arm.com; j...@8bytes.org; t...@linutronix.de; >> ja...@lakedaemon.net; linux-arm-ker...@lists.infradead.org >> Cc: k...@vger.kernel.org; drjo...@redhat.com; linux- >> ker...@vger.kernel.org; pranav.sawargaon...@gmail.com; >> io...@lists.linux-foundation.org; punit.agra...@arm.com; Diana Madalina >> Craciun ; gpkulka...@gmail.com; >> shank...@codeaurora.org; Bharat Bhushan ; >> geethasowjanya.ak...@gmail.com >> Subject: [PATCH v8 00/18] KVM PCIe/MSI passthrough on ARM/ARM64 and >> IOVA reserved regions >> >> Following LPC discussions, we now report reserved regions through the >> iommu-group sysfs reserved_regions attribute file. >> >> Reserved regions are populated through the IOMMU get_resv_region >> callback (former get_dm_regions), now implemented by amd-iommu, intel- >> iommu and arm-smmu: >> - the intel-iommu reports the [0xfee0 - 0xfeef] MSI window >> as a reserved region and RMRR regions as direct-mapped regions. >> - the amd-iommu reports device direct mapped regions, the MSI region >> and HT regions. >> - the arm-smmu reports the MSI window (arbitrarily located at >> 0x800 and 1MB large). >> >> Unsafe interrupt assignment is tested by enumerating all MSI irq domains >> and checking MSI remapping is supported in the above hierarchy. >> This check is done in case we detect the iommu translates MSI (an >> IOMMU_RESV_MSI window exists). Otherwise the IRQ remapping capability >> is checked at IOMMU level. Obviously this is a defensive IRQ safety >> assessment: Assuming there are several MSI controllers in the system and at >> least one does not implement IRQ remapping, the assignment will be >> considered as unsafe (even if this controller is not acessible from the >> assigned devices). >> >> The series first patch stems from Robin's branch: >> http://linux-arm.org/git?p=linux- >> rm.git;a=shortlog;h=refs/heads/iommu/misc >> >> Best Regards >> >> Eric >> >> Git: complete series available at >> https://github.com/eauger/linux/tree/v4.10-rc3-reserved-v8 > > This series is tested on NXP platform, if you want you can add my tested by > Tested-by: Bharat Bhushan Thank you for this! Best Regards Eric > > Thanks > -Bharat > >> >> istory: >> >> PATCHv7 -> PATCHv8 >> - take into account Marc's comments and apply his R-b >> - remove iommu_group_remove_file call in iommu_group_release >> - add Will's A-b >> - removed [PATCH v7 01/19] iommu/dma: Implement PCI allocation >> optimisation and updated iommu/dma: Allow MSI-only cookies >> as per Robin's indications >> >> PATCHv6 -> PATCHv7: >> - iommu/dma: Implement PCI allocation optimisation was added to apply >> iommu/dma: Allow MSI-only cookies >> - report Intel RMRR as direct-mapped regions >> - report the type in the iommu group sysfs reserved_regions file >> - do not merge regions of different types when building the list >> of reserved regions >> - intgeration Robin's "iommu/dma: Allow MSI-only cookies" last >> version >> - update Documentation/ABI/testing/sysfs-kernel-iommu_groups >> - rename IOMMU_RESV_NOMAP into IOMMU_RESV_RESERVED >> >> PATCHv5 -> PATCHv6 >> - Introduce IRQ_DOMAIN_FLAG_MSI as suggested by Marc >> - irq_domain_is_msi, irq_domain_is_msi_remap, >> irq_domain_hierarchical_is_msi_remap, >> - set IRQ_DOMAIN_FLAG_MSI in msi_create_irq_domain >> - fix compil issue on i386 >> - rework test at VFIO level >> >> RFCv4 -> PATCHv5 >> - fix IRQ security assessment by looking at irq domain parents >> - check DOMAIN_BUS_FSL_MC_MSI irq domains >> - AMD MSI and HT regions are exposed in iommu group sysfs >> >> RFCv3 -> RFCv4: >> - arm-smmu driver does not register PCI host bridge windows as >> reserved regions anymore >> - Implement reserved region get/put callbacks also in arm-smmuv3 >> - take the iommu_group lock on iommu_get_group_resv_regions >> - add a type field in iommu_resv_region instead of using prot >> - init the region list_head in iommu_alloc_resv_region, also >> add type parameter >> - iommu_insert_resv_region manage overlaps and sort reserved >> windows >> - address IRQ safety assessment by enumerating all the MSI irq >> domains and checking the MSI_REMAP flag >> - update Documentation/ABI/testing/sysfs-kernel-iommu_groups >> >> RFC v2 -> v3: >> - switch to an iommu-group sysfs API >> - use new dummy allocator provided by Robin >> - dummy allocator initialized by vfio-iommu-type1 after enumerating >> the reserved regions >> - at the moment ARM MSI base address/size is left unchanged compared >> to v2 >> - we currently report reserved regions and not usable IOVA regions as >> requested by Alex >> >> RFC v1 -> v2: >> - fix intel_add_reserve
RE: [PATCH v8 00/18] KVM PCIe/MSI passthrough on ARM/ARM64 and IOVA reserved regions
> -Original Message- > From: Eric Auger [mailto:eric.au...@redhat.com] > Sent: Wednesday, January 11, 2017 3:12 PM > To: eric.au...@redhat.com; eric.auger@gmail.com; > christoffer.d...@linaro.org; marc.zyng...@arm.com; > robin.mur...@arm.com; alex.william...@redhat.com; > will.dea...@arm.com; j...@8bytes.org; t...@linutronix.de; > ja...@lakedaemon.net; linux-arm-ker...@lists.infradead.org > Cc: k...@vger.kernel.org; drjo...@redhat.com; linux- > ker...@vger.kernel.org; pranav.sawargaon...@gmail.com; > io...@lists.linux-foundation.org; punit.agra...@arm.com; Diana Madalina > Craciun ; gpkulka...@gmail.com; > shank...@codeaurora.org; Bharat Bhushan ; > geethasowjanya.ak...@gmail.com > Subject: [PATCH v8 00/18] KVM PCIe/MSI passthrough on ARM/ARM64 and > IOVA reserved regions > > Following LPC discussions, we now report reserved regions through the > iommu-group sysfs reserved_regions attribute file. > > Reserved regions are populated through the IOMMU get_resv_region > callback (former get_dm_regions), now implemented by amd-iommu, intel- > iommu and arm-smmu: > - the intel-iommu reports the [0xfee0 - 0xfeef] MSI window > as a reserved region and RMRR regions as direct-mapped regions. > - the amd-iommu reports device direct mapped regions, the MSI region > and HT regions. > - the arm-smmu reports the MSI window (arbitrarily located at > 0x800 and 1MB large). > > Unsafe interrupt assignment is tested by enumerating all MSI irq domains > and checking MSI remapping is supported in the above hierarchy. > This check is done in case we detect the iommu translates MSI (an > IOMMU_RESV_MSI window exists). Otherwise the IRQ remapping capability > is checked at IOMMU level. Obviously this is a defensive IRQ safety > assessment: Assuming there are several MSI controllers in the system and at > least one does not implement IRQ remapping, the assignment will be > considered as unsafe (even if this controller is not acessible from the > assigned devices). > > The series first patch stems from Robin's branch: > http://linux-arm.org/git?p=linux- > rm.git;a=shortlog;h=refs/heads/iommu/misc > > Best Regards > > Eric > > Git: complete series available at > https://github.com/eauger/linux/tree/v4.10-rc3-reserved-v8 This series is tested on NXP platform, if you want you can add my tested by Tested-by: Bharat Bhushan Thanks -Bharat > > istory: > > PATCHv7 -> PATCHv8 > - take into account Marc's comments and apply his R-b > - remove iommu_group_remove_file call in iommu_group_release > - add Will's A-b > - removed [PATCH v7 01/19] iommu/dma: Implement PCI allocation > optimisation and updated iommu/dma: Allow MSI-only cookies > as per Robin's indications > > PATCHv6 -> PATCHv7: > - iommu/dma: Implement PCI allocation optimisation was added to apply > iommu/dma: Allow MSI-only cookies > - report Intel RMRR as direct-mapped regions > - report the type in the iommu group sysfs reserved_regions file > - do not merge regions of different types when building the list > of reserved regions > - intgeration Robin's "iommu/dma: Allow MSI-only cookies" last > version > - update Documentation/ABI/testing/sysfs-kernel-iommu_groups > - rename IOMMU_RESV_NOMAP into IOMMU_RESV_RESERVED > > PATCHv5 -> PATCHv6 > - Introduce IRQ_DOMAIN_FLAG_MSI as suggested by Marc > - irq_domain_is_msi, irq_domain_is_msi_remap, > irq_domain_hierarchical_is_msi_remap, > - set IRQ_DOMAIN_FLAG_MSI in msi_create_irq_domain > - fix compil issue on i386 > - rework test at VFIO level > > RFCv4 -> PATCHv5 > - fix IRQ security assessment by looking at irq domain parents > - check DOMAIN_BUS_FSL_MC_MSI irq domains > - AMD MSI and HT regions are exposed in iommu group sysfs > > RFCv3 -> RFCv4: > - arm-smmu driver does not register PCI host bridge windows as > reserved regions anymore > - Implement reserved region get/put callbacks also in arm-smmuv3 > - take the iommu_group lock on iommu_get_group_resv_regions > - add a type field in iommu_resv_region instead of using prot > - init the region list_head in iommu_alloc_resv_region, also > add type parameter > - iommu_insert_resv_region manage overlaps and sort reserved > windows > - address IRQ safety assessment by enumerating all the MSI irq > domains and checking the MSI_REMAP flag > - update Documentation/ABI/testing/sysfs-kernel-iommu_groups > > RFC v2 -> v3: > - switch to an iommu-group sysfs API > - use new dummy allocator provided by Robin > - dummy allocator initialized by vfio-iommu-type1 after enumerating > the reserved regions > - at the moment ARM MSI base address/size is left unchanged compared > to v2 > - we currently report reserved regions and not usable IOVA regions as > requested by Alex > > RFC v1 -> v2: > - fix intel_add_reserved_regions > - add mutex lock/unlock in vfio_iommu_type1 > > > Eric Auger (17): > iommu: Rename iommu_dm_regions into iommu_resv_regions > iommu: Add a new type field in iommu_resv_region > iommu: iommu
