Re: [PATCHv3 2/2] x86/selftests: Add test for mapping placement for 5-level paging

On Wed, Nov 22, 2017 at 05:06:27PM +0530, Aneesh Kumar K.V wrote: > "Kirill A. Shutemov" writes: > > > On Wed, Nov 22, 2017 at 11:11:36AM +0530, Aneesh Kumar K.V wrote: > >> "Kirill A. Shutemov" writes: > >> > >> > With 5-level paging, we

Re: [PATCHv3 2/2] x86/selftests: Add test for mapping placement for 5-level paging

On Wed, Nov 22, 2017 at 05:06:27PM +0530, Aneesh Kumar K.V wrote: > "Kirill A. Shutemov" writes: > > > On Wed, Nov 22, 2017 at 11:11:36AM +0530, Aneesh Kumar K.V wrote: > >> "Kirill A. Shutemov" writes: > >> > >> > With 5-level paging, we have 56-bit virtual address space available for > >> >

Re: [PATCHv3 2/2] x86/selftests: Add test for mapping placement for 5-level paging

"Kirill A. Shutemov" writes: > On Wed, Nov 22, 2017 at 11:11:36AM +0530, Aneesh Kumar K.V wrote: >> "Kirill A. Shutemov" writes: >> >> > With 5-level paging, we have 56-bit virtual address space available for >> > userspace. But we don't

Re: [PATCHv3 2/2] x86/selftests: Add test for mapping placement for 5-level paging

"Kirill A. Shutemov" writes: > On Wed, Nov 22, 2017 at 11:11:36AM +0530, Aneesh Kumar K.V wrote: >> "Kirill A. Shutemov" writes: >> >> > With 5-level paging, we have 56-bit virtual address space available for >> > userspace. But we don't want to expose userspace to addresses above >> >

Re: [PATCHv3 2/2] x86/selftests: Add test for mapping placement for 5-level paging

On Wed, Nov 22, 2017 at 11:11:36AM +0530, Aneesh Kumar K.V wrote: > "Kirill A. Shutemov" writes: > > > With 5-level paging, we have 56-bit virtual address space available for > > userspace. But we don't want to expose userspace to addresses above > > 47-bits,

Re: [PATCHv3 2/2] x86/selftests: Add test for mapping placement for 5-level paging

On Wed, Nov 22, 2017 at 11:11:36AM +0530, Aneesh Kumar K.V wrote: > "Kirill A. Shutemov" writes: > > > With 5-level paging, we have 56-bit virtual address space available for > > userspace. But we don't want to expose userspace to addresses above > > 47-bits, unless it asked specifically for it.

Re: [PATCHv3 2/2] x86/selftests: Add test for mapping placement for 5-level paging

"Kirill A. Shutemov" writes: > With 5-level paging, we have 56-bit virtual address space available for > userspace. But we don't want to expose userspace to addresses above > 47-bits, unless it asked specifically for it. > > We use mmap(2) hint address as a way

Re: [PATCHv3 2/2] x86/selftests: Add test for mapping placement for 5-level paging

"Kirill A. Shutemov" writes: > With 5-level paging, we have 56-bit virtual address space available for > userspace. But we don't want to expose userspace to addresses above > 47-bits, unless it asked specifically for it. > > We use mmap(2) hint address as a way for kernel to know if it's okay to