Re: [RESEND PATCH 2/4] dt-bindings: add "reduced-width" property for Armada XP SDRAM controller

2017-08-11 Thread Jan Lübbe
On Thu, 2017-08-10 at 21:17 +, Chris Packham wrote:
> On 11/08/17 08:38, Rob Herring wrote:
> > On Mon, Aug 07, 2017 at 01:46:39PM +1200, Chris Packham wrote:
[...]  
> > > +Optional properties:
> > > + - marvell,reduced-width: some SoCs that use this SDRAM controller have
> > > +   a reduced pin count. On such systems "full" width is 32-bits and
> > > +   "half" width is 16-bits. Set this property to indicate that the SoC
> > > +   used is such a system.
> > 
> > Maybe you should just state what the width is.
> 
> Specifying a number like 64/32/16 is done in for some other properties I 
> dismissed that because what this is about how we interpret a 
> pin-strapping option. I guess "max-width = <64>;" and "max-width = 
> <32>"; would achieve the same.
> 
> > Or your compatible string should just be specific enough to know the
> > width.
> 
> I decided against a new compatible sting that because the IP block 
> really is the Armada-XP one and the existing compatible string is used 
> in other places (using multiple compatible strings would solve that).
> 
> I'm not too fussed which of the 3 options are used. Is there any 
> particular preference?

I'd prefer a specific compatible string, as it would avoid adding even
more properties if further difference turn up.

Rob, I seem to remember that some drivers match the top-level
compatible against a list of SoC variants to detect SoC-dependent
features in a generic IP block. Is that something you'd prefer instead?

Regards,
Jan


Re: [RESEND PATCH 2/4] dt-bindings: add "reduced-width" property for Armada XP SDRAM controller

2017-08-11 Thread Jan Lübbe
On Thu, 2017-08-10 at 21:17 +, Chris Packham wrote:
> On 11/08/17 08:38, Rob Herring wrote:
> > On Mon, Aug 07, 2017 at 01:46:39PM +1200, Chris Packham wrote:
[...]  
> > > +Optional properties:
> > > + - marvell,reduced-width: some SoCs that use this SDRAM controller have
> > > +   a reduced pin count. On such systems "full" width is 32-bits and
> > > +   "half" width is 16-bits. Set this property to indicate that the SoC
> > > +   used is such a system.
> > 
> > Maybe you should just state what the width is.
> 
> Specifying a number like 64/32/16 is done in for some other properties I 
> dismissed that because what this is about how we interpret a 
> pin-strapping option. I guess "max-width = <64>;" and "max-width = 
> <32>"; would achieve the same.
> 
> > Or your compatible string should just be specific enough to know the
> > width.
> 
> I decided against a new compatible sting that because the IP block 
> really is the Armada-XP one and the existing compatible string is used 
> in other places (using multiple compatible strings would solve that).
> 
> I'm not too fussed which of the 3 options are used. Is there any 
> particular preference?

I'd prefer a specific compatible string, as it would avoid adding even
more properties if further difference turn up.

Rob, I seem to remember that some drivers match the top-level
compatible against a list of SoC variants to detect SoC-dependent
features in a generic IP block. Is that something you'd prefer instead?

Regards,
Jan


Re: [RESEND PATCH 2/4] dt-bindings: add "reduced-width" property for Armada XP SDRAM controller

2017-08-10 Thread Chris Packham
On 11/08/17 08:38, Rob Herring wrote:
> On Mon, Aug 07, 2017 at 01:46:39PM +1200, Chris Packham wrote:
>> Some SoC implementations that use this controller have a reduced pin
>> count so the meaning of "full" and "half" with change.
> 
> s/with/width/ ?
> 

Yes will include in v2.

>>
>> Signed-off-by: Chris Packham 
>> ---
>>   .../bindings/memory-controllers/mvebu-sdram-controller.txt  | 6 
>> ++
>>   1 file changed, 6 insertions(+)
>>
>> diff --git 
>> a/Documentation/devicetree/bindings/memory-controllers/mvebu-sdram-controller.txt
>>  
>> b/Documentation/devicetree/bindings/memory-controllers/mvebu-sdram-controller.txt
>> index 89657d1d4cd4..3041868321c8 100644
>> --- 
>> a/Documentation/devicetree/bindings/memory-controllers/mvebu-sdram-controller.txt
>> +++ 
>> b/Documentation/devicetree/bindings/memory-controllers/mvebu-sdram-controller.txt
>> @@ -13,6 +13,12 @@ Required properties:
>>- reg: a resource specifier for the register space, which should
>>  include all SDRAM controller registers as per the datasheet.
>>   
>> +Optional properties:
>> + - marvell,reduced-width: some SoCs that use this SDRAM controller have
>> +   a reduced pin count. On such systems "full" width is 32-bits and
>> +   "half" width is 16-bits. Set this property to indicate that the SoC
>> +   used is such a system.
> 
> Maybe you should just state what the width is.


Specifying a number like 64/32/16 is done in for some other properties I 
dismissed that because what this is about how we interpret a 
pin-strapping option. I guess "max-width = <64>;" and "max-width = 
<32>"; would achieve the same.


> Or your compatible string should just be specific enough to know the
> width.

I decided against a new compatible sting that because the IP block 
really is the Armada-XP one and the existing compatible string is used 
in other places (using multiple compatible strings would solve that).

I'm not too fussed which of the 3 options are used. Is there any 
particular preference?


Re: [RESEND PATCH 2/4] dt-bindings: add "reduced-width" property for Armada XP SDRAM controller

2017-08-10 Thread Chris Packham
On 11/08/17 08:38, Rob Herring wrote:
> On Mon, Aug 07, 2017 at 01:46:39PM +1200, Chris Packham wrote:
>> Some SoC implementations that use this controller have a reduced pin
>> count so the meaning of "full" and "half" with change.
> 
> s/with/width/ ?
> 

Yes will include in v2.

>>
>> Signed-off-by: Chris Packham 
>> ---
>>   .../bindings/memory-controllers/mvebu-sdram-controller.txt  | 6 
>> ++
>>   1 file changed, 6 insertions(+)
>>
>> diff --git 
>> a/Documentation/devicetree/bindings/memory-controllers/mvebu-sdram-controller.txt
>>  
>> b/Documentation/devicetree/bindings/memory-controllers/mvebu-sdram-controller.txt
>> index 89657d1d4cd4..3041868321c8 100644
>> --- 
>> a/Documentation/devicetree/bindings/memory-controllers/mvebu-sdram-controller.txt
>> +++ 
>> b/Documentation/devicetree/bindings/memory-controllers/mvebu-sdram-controller.txt
>> @@ -13,6 +13,12 @@ Required properties:
>>- reg: a resource specifier for the register space, which should
>>  include all SDRAM controller registers as per the datasheet.
>>   
>> +Optional properties:
>> + - marvell,reduced-width: some SoCs that use this SDRAM controller have
>> +   a reduced pin count. On such systems "full" width is 32-bits and
>> +   "half" width is 16-bits. Set this property to indicate that the SoC
>> +   used is such a system.
> 
> Maybe you should just state what the width is.


Specifying a number like 64/32/16 is done in for some other properties I 
dismissed that because what this is about how we interpret a 
pin-strapping option. I guess "max-width = <64>;" and "max-width = 
<32>"; would achieve the same.


> Or your compatible string should just be specific enough to know the
> width.

I decided against a new compatible sting that because the IP block 
really is the Armada-XP one and the existing compatible string is used 
in other places (using multiple compatible strings would solve that).

I'm not too fussed which of the 3 options are used. Is there any 
particular preference?


Re: [RESEND PATCH 2/4] dt-bindings: add "reduced-width" property for Armada XP SDRAM controller

2017-08-10 Thread Rob Herring
On Mon, Aug 07, 2017 at 01:46:39PM +1200, Chris Packham wrote:
> Some SoC implementations that use this controller have a reduced pin
> count so the meaning of "full" and "half" with change.

s/with/width/ ?

> 
> Signed-off-by: Chris Packham 
> ---
>  .../bindings/memory-controllers/mvebu-sdram-controller.txt  | 6 
> ++
>  1 file changed, 6 insertions(+)
> 
> diff --git 
> a/Documentation/devicetree/bindings/memory-controllers/mvebu-sdram-controller.txt
>  
> b/Documentation/devicetree/bindings/memory-controllers/mvebu-sdram-controller.txt
> index 89657d1d4cd4..3041868321c8 100644
> --- 
> a/Documentation/devicetree/bindings/memory-controllers/mvebu-sdram-controller.txt
> +++ 
> b/Documentation/devicetree/bindings/memory-controllers/mvebu-sdram-controller.txt
> @@ -13,6 +13,12 @@ Required properties:
>   - reg: a resource specifier for the register space, which should
> include all SDRAM controller registers as per the datasheet.
>  
> +Optional properties:
> + - marvell,reduced-width: some SoCs that use this SDRAM controller have
> +   a reduced pin count. On such systems "full" width is 32-bits and
> +   "half" width is 16-bits. Set this property to indicate that the SoC
> +   used is such a system.

Maybe you should just state what the width is.

Or your compatible string should just be specific enough to know the 
width.

Rob


Re: [RESEND PATCH 2/4] dt-bindings: add "reduced-width" property for Armada XP SDRAM controller

2017-08-10 Thread Rob Herring
On Mon, Aug 07, 2017 at 01:46:39PM +1200, Chris Packham wrote:
> Some SoC implementations that use this controller have a reduced pin
> count so the meaning of "full" and "half" with change.

s/with/width/ ?

> 
> Signed-off-by: Chris Packham 
> ---
>  .../bindings/memory-controllers/mvebu-sdram-controller.txt  | 6 
> ++
>  1 file changed, 6 insertions(+)
> 
> diff --git 
> a/Documentation/devicetree/bindings/memory-controllers/mvebu-sdram-controller.txt
>  
> b/Documentation/devicetree/bindings/memory-controllers/mvebu-sdram-controller.txt
> index 89657d1d4cd4..3041868321c8 100644
> --- 
> a/Documentation/devicetree/bindings/memory-controllers/mvebu-sdram-controller.txt
> +++ 
> b/Documentation/devicetree/bindings/memory-controllers/mvebu-sdram-controller.txt
> @@ -13,6 +13,12 @@ Required properties:
>   - reg: a resource specifier for the register space, which should
> include all SDRAM controller registers as per the datasheet.
>  
> +Optional properties:
> + - marvell,reduced-width: some SoCs that use this SDRAM controller have
> +   a reduced pin count. On such systems "full" width is 32-bits and
> +   "half" width is 16-bits. Set this property to indicate that the SoC
> +   used is such a system.

Maybe you should just state what the width is.

Or your compatible string should just be specific enough to know the 
width.

Rob