Hi,
On Wed, Oct 17, 2018 at 9:01 AM Atish Patra wrote:
>
> On 10/10/18 5:35 AM, Linus Walleij wrote:
> > Hi Atish,
> >
> > thanks for your patch!
> >
> > On Tue, Oct 9, 2018 at 8:51 PM Atish Patra wrote:
> >
> >> From: "Wesley W. Terpstra"
> >>
> >> Adds the GPIO driver for SiFive RISC-V SoCs.
On 10/10/18 5:35 AM, Linus Walleij wrote:
Hi Atish,
thanks for your patch!
On Tue, Oct 9, 2018 at 8:51 PM Atish Patra wrote:
From: "Wesley W. Terpstra"
Adds the GPIO driver for SiFive RISC-V SoCs.
Signed-off-by: Wesley W. Terpstra
[Atish: Various fixes and code cleanup]
Signed-off-by:
On 10/10/18 5:35 AM, Linus Walleij wrote:
Hi Atish,
thanks for your patch!
On Tue, Oct 9, 2018 at 8:51 PM Atish Patra wrote:
From: "Wesley W. Terpstra"
Adds the GPIO driver for SiFive RISC-V SoCs.
Signed-off-by: Wesley W. Terpstra
[Atish: Various fixes and code cleanup]
Signed-off-by:
On Okt 10 2018, Christoph Hellwig wrote:
> On Wed, Oct 10, 2018 at 03:01:29PM +0200, Andreas Schwab wrote:
>> On Okt 09 2018, Atish Patra wrote:
>>
>> > +static void sifive_set_ie(struct sifive_gpio *chip, unsigned int offset)
>> > +{
>> > + unsigned long flags;
>> > + unsigned int trigger;
On Okt 10 2018, Christoph Hellwig wrote:
> On Wed, Oct 10, 2018 at 03:01:29PM +0200, Andreas Schwab wrote:
>> On Okt 09 2018, Atish Patra wrote:
>>
>> > +static void sifive_set_ie(struct sifive_gpio *chip, unsigned int offset)
>> > +{
>> > + unsigned long flags;
>> > + unsigned int trigger;
On Wed, Oct 10, 2018 at 03:01:29PM +0200, Andreas Schwab wrote:
> On Okt 09 2018, Atish Patra wrote:
>
> > +static void sifive_set_ie(struct sifive_gpio *chip, unsigned int offset)
> > +{
> > + unsigned long flags;
> > + unsigned int trigger;
> > +
> > + raw_spin_lock_irqsave(>lock,
On Wed, Oct 10, 2018 at 03:01:29PM +0200, Andreas Schwab wrote:
> On Okt 09 2018, Atish Patra wrote:
>
> > +static void sifive_set_ie(struct sifive_gpio *chip, unsigned int offset)
> > +{
> > + unsigned long flags;
> > + unsigned int trigger;
> > +
> > + raw_spin_lock_irqsave(>lock,
On Okt 09 2018, Atish Patra wrote:
> +static void sifive_set_ie(struct sifive_gpio *chip, unsigned int offset)
> +{
> + unsigned long flags;
> + unsigned int trigger;
> +
> + raw_spin_lock_irqsave(>lock, flags);
> + trigger = (chip->enabled & BIT(offset)) ? chip->trigger[offset]
On Okt 09 2018, Atish Patra wrote:
> +static void sifive_set_ie(struct sifive_gpio *chip, unsigned int offset)
> +{
> + unsigned long flags;
> + unsigned int trigger;
> +
> + raw_spin_lock_irqsave(>lock, flags);
> + trigger = (chip->enabled & BIT(offset)) ? chip->trigger[offset]
Hi Atish,
thanks for your patch!
On Tue, Oct 9, 2018 at 8:51 PM Atish Patra wrote:
> From: "Wesley W. Terpstra"
>
> Adds the GPIO driver for SiFive RISC-V SoCs.
>
> Signed-off-by: Wesley W. Terpstra
> [Atish: Various fixes and code cleanup]
> Signed-off-by: Atish Patra
(...)
> +config
Hi Atish,
thanks for your patch!
On Tue, Oct 9, 2018 at 8:51 PM Atish Patra wrote:
> From: "Wesley W. Terpstra"
>
> Adds the GPIO driver for SiFive RISC-V SoCs.
>
> Signed-off-by: Wesley W. Terpstra
> [Atish: Various fixes and code cleanup]
> Signed-off-by: Atish Patra
(...)
> +config
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