From: Ettore Chimenti
Introduce support for Consumer-IR into seco-cec driver, as it shares the
same interrupt for receiving messages.
The device decodes RC5 signals only, defaults to hauppauge mapping.
It will spawn an input interface using the RC framework (like CEC
device).
Signed-off-by: Etto
From: Ettore Chimenti
This patch adds support to the CEC device implemented with a STM32
microcontroller in X86 SECO Boards, including UDOO X86.
The communication is achieved via Braswell integrated SMBus
(i2c-i801). The driver use direct access to the PCI addresses, due to
the limitations of th
This series of patches aims to add CEC functionalities to SECO
devices, in particular UDOO X86.
The communication is achieved via Braswell SMBus (i2c-i801) to the
onboard STM32 microcontroller that handles the CEC signals. The driver
use direct access to the PCI addresses, due to the limitations o
On Thu, Oct 18, 2018 at 10:47:28AM +0200, jacopo mondi wrote:
> Hi Ettore,
>thanks for the patches.
>
> A few other things, please see below.
>
> On Wed, Oct 17, 2018 at 11:31:41PM +0200, ektor5 wrote:
> > From: Ettore Chimenti
> >
> > This patch adds s
Hi Hans,
On Thu, Oct 18, 2018 at 09:14:55AM +0200, Hans Verkuil wrote:
> Hi Ettore,
>
> Just a few small things and it is ready to go:
>
> On 10/17/2018 11:31 PM, ektor5 wrote:
> > From: Ettore Chimenti
> >
> > This patch adds support to the CE
From: Ettore Chimenti
Introduce support for Consumer-IR into seco-cec driver, as it shares the
same interrupt for receiving messages.
The device decodes RC5 signals only, defaults to hauppauge mapping.
It will spawn an input interface using the RC framework (like CEC
device).
Signed-off-by: Etto
From: Ettore Chimenti
This patch adds support to the CEC device implemented with a STM32
microcontroller in X86 SECO Boards, including UDOO X86.
The communication is achieved via Braswell integrated SMBus
(i2c-i801). The driver use direct access to the PCI addresses, due to
the limitations of th
This series of patches aims to add CEC functionalities to SECO
devices, in particular UDOO X86.
The communication is achieved via Braswell SMBus (i2c-i801) to the
onboard STM32 microcontroller that handles the CEC signals. The driver
use direct access to the PCI addresses, due to the limitations o
On Wed, Oct 10, 2018 at 03:45:35PM +0200, Hans Verkuil wrote:
> On 10/10/18 14:09, ektor5 wrote:
> > Hi Hans,
> >
> > On Sat, Oct 06, 2018 at 11:54:38AM +0200, Hans Verkuil wrote:
> >> Hi Ettore,
> >>
> >> On 10/05/2018 07:33 PM, ektor5 wro
Hi Hans,
On Sat, Oct 06, 2018 at 11:54:38AM +0200, Hans Verkuil wrote:
> Hi Ettore,
>
> On 10/05/2018 07:33 PM, ektor5 wrote:
> > This series of patches aims to add CEC functionalities to SECO
> > devices, in particular UDOO X86.
> >
> > The communication is
On Sat, Oct 06, 2018 at 03:49:18PM +0200, jacopo mondi wrote:
> Hi Ettore,
>some more comments below.
>
> On Fri, Oct 05, 2018 at 07:33:58PM +0200, ektor5 wrote:
> > From: Ettore Chimenti
> >
> > This patch adds support to the CEC device implemented with a ST
From: Ettore Chimenti
Introduce support for Consumer-IR into seco-cec driver, as it shares the
same interrupt for receiving messages.
The device decodes RC5 signals only, defaults to hauppauge mapping.
It will spawn an input interface using the RC framework (like CEC
device).
Signed-off-by: Etto
From: Ettore Chimenti
This patch adds support to the CEC device implemented with a STM32
microcontroller in X86 SECO Boards, including UDOO X86.
The communication is achieved via Braswell integrated SMBus
(i2c-i801). The driver use direct access to the PCI addresses, due to
the limitations of th
This series of patches aims to add CEC functionalities to SECO
devices, in particular UDOO X86.
The communication is achieved via Braswell SMBus (i2c-i801) to the
onboard STM32 microcontroller that handles the CEC signals. The driver
use direct access to the PCI addresses, due to the limitations o
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