On 06/02/2017 11:58 PM, Jacek Anaszewski wrote:
On 06/02/2017 06:02 PM, Thierry Escande wrote:
From: henryhsu
The default clock parent of jpeg on Exynos5250 is fin_pll, which is
24MHz. We have to change the clock parent to CPLL, which is 333MHz,
and set sclk_jpeg to
Cc Marek and Sylwester.
On 06/02/2017 06:02 PM, Thierry Escande wrote:
> From: henryhsu
>
> The default clock parent of jpeg on Exynos5250 is fin_pll, which is
> 24MHz. We have to change the clock parent to CPLL, which is 333MHz,
> and set sclk_jpeg to 166MHz.
>
>
From: henryhsu
The default clock parent of jpeg on Exynos5250 is fin_pll, which is
24MHz. We have to change the clock parent to CPLL, which is 333MHz,
and set sclk_jpeg to 166MHz.
Signed-off-by: Heng-Ruey Hsu
Signed-off-by: Thierry Escande