Re: [PATCH 8/9] Documentation: devicetree: Document sclk-jpeg clock for exynos3250 SoC

On 07/07/14 18:32, Jacek Anaszewski wrote: JPEG IP on Exynos3250 SoC requires enabling two clock gates for its operation. This patch documents this requirement. Signed-off-by: Jacek Anaszewski j.anaszew...@samsung.com Signed-off-by: Kyungmin Park kyungmin.p...@samsung.com Cc: Rob Herring

[PATCH 8/9] Documentation: devicetree: Document sclk-jpeg clock for exynos3250 SoC

JPEG IP on Exynos3250 SoC requires enabling two clock gates for its operation. This patch documents this requirement. Signed-off-by: Jacek Anaszewski j.anaszew...@samsung.com Signed-off-by: Kyungmin Park kyungmin.p...@samsung.com Cc: Rob Herring robh...@kernel.org Cc: Pawel Moll