Hi Steve,
Am Samstag, den 31.01.2015, 20:54 +0100 schrieb Steve Cotton:
On Wed, Jan 28, 2015 at 05:55:06PM +0100, Philipp Zabel wrote:
+ paraOn LVDS buses, usually each sample is transferred serialized in
+ seven time slots per pixel clock, on three (18-bit) or four (24-bit)
+
On Wed, Jan 28, 2015 at 05:55:06PM +0100, Philipp Zabel wrote:
+ paraOn LVDS buses, usually each sample is transferred serialized in
+ seven time slots per pixel clock, on three (18-bit) or four (24-bit)
+ differential data pairs at the same time. The remaining bits are used
This patch adds three new RGB media bus formats that describe
18-bit or 24-bit samples transferred over an LVDS bus with three
or four differential data pairs, serialized into 7 time slots,
using standard SPWG/PSWG/VESA or JEIDA data ordering.
Signed-off-by: Philipp Zabel p.za...@pengutronix.de
