From: Icenowy Zheng <icen...@aosc.io>

The H3 SoC has a DesignWare HDMI controller with some Allwinner-specific
glue and custom PHY.

Since H3 and H5 have same HDMI controller, add related device node in
shared dtsi file.

Signed-off-by: Icenowy Zheng <icen...@aosc.io>
Signed-off-by: Jernej Skrabec <jernej.skra...@siol.net>
---
 arch/arm/boot/dts/sun8i-h3.dtsi    |  5 +++++
 arch/arm/boot/dts/sunxi-h3-h5.dtsi | 36 ++++++++++++++++++++++++++++++++++++
 2 files changed, 41 insertions(+)

diff --git a/arch/arm/boot/dts/sun8i-h3.dtsi b/arch/arm/boot/dts/sun8i-h3.dtsi
index 75ad7b65a7fc..b01f5ac60059 100644
--- a/arch/arm/boot/dts/sun8i-h3.dtsi
+++ b/arch/arm/boot/dts/sun8i-h3.dtsi
@@ -197,6 +197,11 @@
                                        #address-cells = <1>;
                                        #size-cells = <0>;
                                        reg = <1>;
+
+                                       tcon0_out_hdmi: endpoint@1 {
+                                               reg = <1>;
+                                               remote-endpoint = 
<&hdmi_in_tcon0>;
+                                       };
                                };
                        };
                };
diff --git a/arch/arm/boot/dts/sunxi-h3-h5.dtsi 
b/arch/arm/boot/dts/sunxi-h3-h5.dtsi
index d38282b9e5d4..28f4df82300e 100644
--- a/arch/arm/boot/dts/sunxi-h3-h5.dtsi
+++ b/arch/arm/boot/dts/sunxi-h3-h5.dtsi
@@ -592,6 +592,42 @@
                        interrupts = <GIC_PPI 9 (GIC_CPU_MASK_SIMPLE(4) | 
IRQ_TYPE_LEVEL_HIGH)>;
                };
 
+               hdmi: hdmi@1ee0000 {
+                       compatible = "allwinner,sun8i-h3-dw-hdmi";
+                       reg = <0x01ee0000 0x10000>,
+                             <0x01ef0000 0x10000>;
+                       reg-io-width = <1>;
+                       interrupts = <GIC_SPI 88 IRQ_TYPE_LEVEL_HIGH>;
+                       clocks = <&ccu CLK_BUS_HDMI>, <&ccu CLK_HDMI>,
+                                <&ccu CLK_HDMI_DDC>;
+                       clock-names = "iahb", "isfr", "ddc";
+                       resets = <&ccu RST_BUS_HDMI0>, <&ccu RST_BUS_HDMI1>;
+                       reset-names = "hdmi", "ddc";
+                       status = "disabled";
+
+                       ports {
+                               #address-cells = <1>;
+                               #size-cells = <0>;
+
+                               hdmi_in: port@0 {
+                                       #address-cells = <1>;
+                                       #size-cells = <0>;
+                                       reg = <0>;
+
+                                       hdmi_in_tcon0: endpoint@0 {
+                                               reg = <0>;
+                                               remote-endpoint = 
<&tcon0_out_hdmi>;
+                                       };
+                               };
+
+                               hdmi_out: port@1 {
+                                       #address-cells = <1>;
+                                       #size-cells = <0>;
+                                       reg = <1>;
+                               };
+                       };
+               };
+
                rtc: rtc@01f00000 {
                        compatible = "allwinner,sun6i-a31-rtc";
                        reg = <0x01f00000 0x54>;
-- 
2.14.1

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