On Thu, Sep 3, 2009 at 4:36 AM, Russell King - ARM
Linuxli...@arm.linux.org.uk wrote:
On Wed, Sep 02, 2009 at 06:10:44PM +0300, Imre Deak wrote:
To my understanding buffers returned by dma_alloc_*, kmalloc, vmalloc
are ok:
For dma_map_*, the only pages/addresses which are valid to pass are
On Wed, Sep 02, 2009 at 05:10:44PM +0200, Deak Imre (Nokia-D/Helsinki) wrote:
On Tue, Sep 01, 2009 at 03:43:48PM +0200, ext Laurent Pinchart wrote:
[...]
I might be missing something obvious, but I fail to see how VIVT caches
could
work at all with multiple mappings. If a
On Wed, Sep 02, 2009 at 06:10:44PM +0300, Imre Deak wrote:
To my understanding buffers returned by dma_alloc_*, kmalloc, vmalloc
are ok:
For dma_map_*, the only pages/addresses which are valid to pass are
those returned by get_free_pages() or kmalloc. Everything else is
not permitted.
Use of
On Tue, Aug 25, 2009 at 08:53:29AM -0400, Steven Walter wrote:
On Thu, Aug 6, 2009 at 6:25 PM, Russell King - ARM
Linuxli...@arm.linux.org.uk wrote:
[...]
As far as userspace DMA coherency, the only way you could do it with
current kernel APIs is by using get_user_pages(), creating a
On Tuesday 01 September 2009 15:28:24 Russell King - ARM Linux wrote:
On Tue, Aug 25, 2009 at 08:53:29AM -0400, Steven Walter wrote:
On Thu, Aug 6, 2009 at 6:25 PM, Russell King - ARM
Linuxli...@arm.linux.org.uk wrote:
[...]
As far as userspace DMA coherency, the only way you could do
On Tue, Sep 01, 2009 at 03:43:48PM +0200, Laurent Pinchart wrote:
I might be missing something obvious, but I fail to see how VIVT caches
could work at all with multiple mappings. If a kernel-allocated buffer
is DMA'ed to, we certainly want to invalidate all cache lines that store
buffer data.
On Tue, 1 Sep 2009, Russell King - ARM Linux wrote:
On Tue, Sep 01, 2009 at 03:43:48PM +0200, Laurent Pinchart wrote:
I might be missing something obvious, but I fail to see how VIVT caches
could work at all with multiple mappings. If a kernel-allocated buffer
is DMA'ed to, we certainly
On Tue, 2009-08-25 at 16:17 -0700, Laurent Pinchart wrote:
On Wednesday 26 August 2009 00:02:48 David Xiao wrote:
On Tue, 2009-08-25 at 05:53 -0700, Steven Walter wrote:
On Thu, Aug 6, 2009 at 6:25 PM, Russell King - ARM
Linuxli...@arm.linux.org.uk wrote:
[...]
As far as
On Thu, Aug 6, 2009 at 6:25 PM, Russell King - ARM
Linuxli...@arm.linux.org.uk wrote:
[...]
As far as userspace DMA coherency, the only way you could do it with
current kernel APIs is by using get_user_pages(), creating a scatterlist
from those, and then passing it to dma_map_sg(). While the
On Tue, 2009-08-25 at 05:53 -0700, Steven Walter wrote:
On Thu, Aug 6, 2009 at 6:25 PM, Russell King - ARM
Linuxli...@arm.linux.org.uk wrote:
[...]
As far as userspace DMA coherency, the only way you could do it with
current kernel APIs is by using get_user_pages(), creating a scatterlist
On Wednesday 26 August 2009 00:02:48 David Xiao wrote:
On Tue, 2009-08-25 at 05:53 -0700, Steven Walter wrote:
On Thu, Aug 6, 2009 at 6:25 PM, Russell King - ARM
Linuxli...@arm.linux.org.uk wrote:
[...]
As far as userspace DMA coherency, the only way you could do it with
current
On Thu, 2009-08-06 at 22:59 -0700, David Xiao wrote:
The V7 speculative prefetching will then probably apply to DMA coherency
issue in general, both kernel and user space DMAs. Could this be
addressed by inside the dma_unmap_sg/single() calling dma_cache_maint()
when the direction is
On Tue, 2009-08-11 at 02:31 -0700, Catalin Marinas wrote:
On Thu, 2009-08-06 at 22:59 -0700, David Xiao wrote:
The V7 speculative prefetching will then probably apply to DMA coherency
issue in general, both kernel and user space DMAs. Could this be
addressed by inside the
On Friday 07 August 2009 22:28:29 Russell King - ARM Linux wrote:
On Fri, Aug 07, 2009 at 10:11:40PM +0200, Laurent Pinchart wrote:
Ok. Maybe the kernel mapping from L_PTE_MT_UNCACHED to strongly ordered
for ARMv6 and up (not sure about how it worked for previous versions)
brought some
On Thu, Aug 06, 2009 at 10:59:26PM -0700, David Xiao wrote:
The V7 speculative prefetching will then probably apply to DMA coherency
issue in general, both kernel and user space DMAs. Could this be
addressed by inside the dma_unmap_sg/single() calling dma_cache_maint()
when the direction is
On Fri, Aug 07, 2009 at 08:15:01AM -0500, Robin Holt wrote:
On Fri, Aug 07, 2009 at 02:07:43PM +0200, Laurent Desnogues wrote:
On Fri, Aug 7, 2009 at 11:54 AM, Jamie Lokierja...@shareable.org wrote:
1. Does the architecture not prevent speculative instruction
prefetches from crossing a
On Fri, Aug 07, 2009 at 11:23:39AM +0100, Jamie Lokier wrote:
David Xiao wrote:
However, that won't work with ARMv7's speculative prefetching. I'm
afraid with such things, DMA direct into userspace mappings becomes a
_lot_ harder, and lets face it, lots of Linux drivers just aren't
On Friday 07 August 2009 21:01:45 Russell King - ARM Linux wrote:
On Fri, Aug 07, 2009 at 08:15:01AM -0500, Robin Holt wrote:
On Fri, Aug 07, 2009 at 02:07:43PM +0200, Laurent Desnogues wrote:
On Fri, Aug 7, 2009 at 11:54 AM, Jamie Lokierja...@shareable.org
wrote:
1. Does the
On Fri, Aug 07, 2009 at 10:11:40PM +0200, Laurent Pinchart wrote:
Ok. Maybe the kernel mapping from L_PTE_MT_UNCACHED to strongly ordered for
ARMv6 and up (not sure about how it worked for previous versions) brought
some
confusion. I'll try to be more precise now.
It's something we should
On Fri, 2009-08-07 at 13:28 -0700, Russell King - ARM Linux wrote:
The kernel direct mapping maps all system (low) memory with normal
memory cacheable attributes.
So using vmalloc, dma_alloc_coherent, using pages in userspace all
create duplicate mappings of pages.
If we do want to
On Thu, Aug 06, 2009 at 12:08:21PM +0200, Laurent Pinchart wrote:
[Resent with an updated subject, this time CC'ing linux-arm-kernel]
I've spent the last few days playing with get_user_pages() and mlock() and
got some interesting results. It turned out that cache coherency comes into
play
On Thu, 2009-08-06 at 06:06 -0700, Laurent Pinchart wrote:
Hi Ben,
On Thursday 06 August 2009 13:46:19 Ben Dooks wrote:
On Thu, Aug 06, 2009 at 12:08:21PM +0200, Laurent Pinchart wrote:
[snip]
The second problem is to ensure cache coherency. As the userspace
application will read
David Xiao wrote:
Another approach is working from a different direction: the kernel
allocates the non-cached buffer and then mmap() into user space. I have
done that in similar situation to try to achieve zero-copy.
open(O_DIRECT) does DMA to arbitrary pages allocated by userspace, and
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