Re: [RFC 2/2] gspca_kinect: add support for the depth stream
On Thu, 19 Jun 2014 16:35:17 +0200 Hans de Goede hdego...@redhat.com wrote: Hi, On 06/04/2014 10:24 PM, Antonio Ospite wrote: Add support for the depth mode at 10bpp, use a command line parameter to switch mode. NOTE: this is just a proof-of-concept, the final implementation will have to expose two v4l2 devices, one for the video stream and one for the depth stream. Thanks for the patch. If this is useful for some people I'm willing to merge this until we've a better fix. I guess adding a command line parameter (depth_mode) and then removing it in the future, when a far better alternative is available, is acceptable in this case; we also did something like that before for the PS3 Eye driver for instance. So I am going to submit this patch set for inclusion. Signed-off-by: Alexander Sosna alexan...@xxor.de Signed-off-by: Antonio Ospite a...@ao2.it --- For now a command line parameter called depth_mode is used to select which mode to activate when loading the driver, this is necessary because gspca is not quite ready to have a subdriver call gspca_dev_probe() multiple times. The problem seems to be that gspca assumes one video device per USB _interface_, and so it stores a pointer to gspca_dev as the interface private data: see usb_set_intfdata(intf, gspca_dev) in gspca_dev_probe2(). If anyone feels brave (do a backup first, etc. etc.), hack the sd_probe() below to register both the devices: you will get the two v4l nodes and both streams will work OK, but the kernel will halt when you disconnect the device, i.e. some problem arises in gspca_disconnect() after the usb_get_intfdata(intf) call. I am still figuring out the details of the failure sequence, and I'll try to imagine a way to support the use case multiple v4l devices on one USB interface, but this will take some more time. I believe that support 2 devices would require separating the per video node / stream data and global data into separate structs, and then refactoring everything so that we can have 2 streams on one gspca_dev. If you do this please make it a patch-set with many small patches, rather then 1 or 2 very large patches. And then in things like disconnect, loop over the streams and stop both, unregister both nodes, etc. If you ever decide to add support for controls you will also need to think about what to do with those, but for now I guess you can just register all the controls on the first video-node/stream (which will be the only one for all devices except kinect devices, and the kinect code currently does not have controls. Very useful hints, as always. Thanks, Antonio -- Antonio Ospite http://ao2.it A: Because it messes up the order in which people normally read text. See http://en.wikipedia.org/wiki/Posting_style Q: Why is top-posting such a bad thing? -- To unsubscribe from this list: send the line unsubscribe linux-media in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
Re: [PATCH v14 08/10] drm/panel: Add Eukrea mbimxsd51 displays.
On 06/25/2014 12:04 AM, Thierry Reding wrote: because on this very simple display board, we only have DVI LVDS signals without the I2C to detect the display. That's unfortunate. In that case perhaps a better approach would be to add a video timings node to the device that provides the DVI output? I've just done that. Should I resend now? The goal is to avoid as much as possible extra versions. Also, as I said before in a response to [PATCH v14 09/10] ARM: dts: mbimx51sd: Add display support., the LCD regulator was inverted, it worked while inverted because of a bug which is now fixed by: imx-drm: parallel-display: Fix DPMS default state. Right now, I don't have any other changes for this serie beside a simple rebase of dts: imx5*, imx6*: correct display-timings rebased. Denis. -- To unsubscribe from this list: send the line unsubscribe linux-media in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
Re: [PATCH v14 04/10] imx-drm: use defines for clock polarity settings
On Wed, Jun 25, 2014 at 06:48:45AM +0200, Sascha Hauer wrote:
On Mon, Jun 16, 2014 at 12:11:18PM +0200, Denis Carikli wrote:
+
/*
* Bitfield of Display Interface signal polarities.
*/
@@ -37,7 +43,7 @@ struct ipu_di_signal_cfg {
unsigned clksel_en:1;
unsigned clkidle_en:1;
unsigned data_pol:1;/* true = inverted */
- unsigned clk_pol:1; /* true = rising edge */
+ unsigned clk_pol:1;
unsigned enable_pol:1;
unsigned Hsync_pol:1; /* true = active high */
unsigned Vsync_pol:1;
...can we rename the flags to more meaningful names instead?
unsigned clk_pol_rising_edge:1;
unsigned enable_pol_high:1;
unsigned hsync_active_high:1;
unsigned vsync_active_high:1;
Now look at patch 7, where these become tri-state:
- don't change
- rising edge/active high
- falling edge/active low
So your suggestion is not a good idea.
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Re: [PATCH v14 07/10] imx-drm: Use drm_display_mode timings flags.
On Mon, Jun 16, 2014 at 12:11:21PM +0200, Denis Carikli wrote:
The previous hardware behaviour was kept if the
flags are not set.
I'd like to throw in a patch that I've been carrying for a bit now.
It conflicts with your patches, but I'm happy to fix that conflict
locally (and have been doing so for a while now.)
This is related to a slightly different issue - knowing which types
of bridges are bound to a particualar DI. This matters in part for
selecting the clock routing - as things currently stand, the last
bridge to call imx_drm_panel_format*() gets its way with this. With
this change, we can see which bridges are bound, and make the
appropriate decision. At the moment, we are saved from things going
awry as we don't support cloning outputs.
The relevence to your patch set is that some bridges require clk_pol
to be configured appropriately - HDMI requires clk_pol = 0 in order to
work correctly (with the opposite edge, the image is noisy.)
While this approach only allows us to identify the types of bridges
connected to a DI rather than uniquely identifing the bridges themselves,
I think this is not only an improvement, but also a simplification of
the current code, and allows better decisions about things like clk_pol
to be made.
I'm sending it here because it is relevent to Denis' patch set - I will
also send it out separately if people want it separately, though that
will go to a reduced Cc list.
From: Russell King rmk+ker...@arm.linux.org.uk
Subject: [PATCH] imx-drm: core: handling of DI clock flags to
ipu_crtc_mode_set()
We do not need to track the state of the IPU DI's clock flags by having
each display bridge calling back into imx-drm-core, and then back out
into ipuv3-crtc.c.
ipuv3-crtc can instead just scan the list of encoders to retrieve their
type, and build up a picture of which types of encoders are attached.
We can then use this information to configure the IPU DI clocking mode
without any uncertainty - if we have multiple bridges connected to the
same DI, if one of them requires a synchronous DI clock, that's what we
must use.
Signed-off-by: Russell King rmk+ker...@arm.linux.org.uk
---
drivers/staging/imx-drm/imx-drm-core.c | 3 +--
drivers/staging/imx-drm/imx-drm.h | 2 +-
drivers/staging/imx-drm/ipuv3-crtc.c | 40 +++---
3 files changed, 25 insertions(+), 20 deletions(-)
diff --git a/drivers/staging/imx-drm/imx-drm-core.c
b/drivers/staging/imx-drm/imx-drm-core.c
index def8280d7ee6..6d9376c760ad 100644
--- a/drivers/staging/imx-drm/imx-drm-core.c
+++ b/drivers/staging/imx-drm/imx-drm-core.c
@@ -115,8 +115,7 @@ int imx_drm_panel_format_pins(struct drm_encoder *encoder,
helper = imx_crtc-imx_drm_helper_funcs;
if (helper-set_interface_pix_fmt)
return helper-set_interface_pix_fmt(encoder-crtc,
- encoder-encoder_type, interface_pix_fmt,
- hsync_pin, vsync_pin);
+ interface_pix_fmt, hsync_pin, vsync_pin);
return 0;
}
EXPORT_SYMBOL_GPL(imx_drm_panel_format_pins);
diff --git a/drivers/staging/imx-drm/imx-drm.h
b/drivers/staging/imx-drm/imx-drm.h
index 7453ae00c412..3c559ccd6af0 100644
--- a/drivers/staging/imx-drm/imx-drm.h
+++ b/drivers/staging/imx-drm/imx-drm.h
@@ -17,7 +17,7 @@ int imx_drm_crtc_id(struct imx_drm_crtc *crtc);
struct imx_drm_crtc_helper_funcs {
int (*enable_vblank)(struct drm_crtc *crtc);
void (*disable_vblank)(struct drm_crtc *crtc);
- int (*set_interface_pix_fmt)(struct drm_crtc *crtc, u32 encoder_type,
+ int (*set_interface_pix_fmt)(struct drm_crtc *crtc,
u32 pix_fmt, int hsync_pin, int vsync_pin);
const struct drm_crtc_helper_funcs *crtc_helper_funcs;
const struct drm_crtc_funcs *crtc_funcs;
diff --git a/drivers/staging/imx-drm/ipuv3-crtc.c
b/drivers/staging/imx-drm/ipuv3-crtc.c
index 7fec438d8c54..af09032aedb0 100644
--- a/drivers/staging/imx-drm/ipuv3-crtc.c
+++ b/drivers/staging/imx-drm/ipuv3-crtc.c
@@ -51,7 +51,6 @@ struct ipu_crtc {
struct drm_framebuffer *newfb;
int irq;
u32 interface_pix_fmt;
- unsigned long di_clkflags;
int di_hsync_pin;
int di_vsync_pin;
};
@@ -146,10 +145,13 @@ static int ipu_crtc_mode_set(struct drm_crtc *crtc,
int x, int y,
struct drm_framebuffer *old_fb)
{
+ struct drm_device *dev = crtc-dev;
+ struct drm_encoder *encoder;
struct ipu_crtc *ipu_crtc = to_ipu_crtc(crtc);
- int ret;
struct ipu_di_signal_cfg sig_cfg = {};
+ unsigned long encoder_types = 0;
u32 out_pixel_fmt;
+ int ret;
dev_dbg(ipu_crtc-dev, %s: mode-hdisplay: %d\n, __func__,
mode-hdisplay);
@@ -165,6 +167,24 @@ static int
[PATCH 1/2] gspca: provide a mechanism to select a specific transfer endpoint
Currently gspca selects the first ISOC input endpoint as the input
transfer endpoint, however some devices can provide streams on endpoints
different then the first one, so some subdrivers (e.g. gspca_kinect) may
want to select a specific endpoint to use as a transfer endpoint.
Add an xfer_ep field to struct gspca_dev, and change alt_xfer() so that
it accepts a parameter which represents a specific endpoint address to
look for.
If a subdriver wants to specify a value for gspca_dev-xfer_ep it can do
that in its sd_config() callback.
Signed-off-by: Antonio Ospite a...@ao2.it
---
drivers/media/usb/gspca/gspca.c | 20 ++--
drivers/media/usb/gspca/gspca.h | 1 +
2 files changed, 15 insertions(+), 6 deletions(-)
diff --git a/drivers/media/usb/gspca/gspca.c b/drivers/media/usb/gspca/gspca.c
index f3a7ace..f9a75ad 100644
--- a/drivers/media/usb/gspca/gspca.c
+++ b/drivers/media/usb/gspca/gspca.c
@@ -603,10 +603,13 @@ static void gspca_stream_off(struct gspca_dev *gspca_dev)
}
/*
- * look for an input transfer endpoint in an alternate setting
+ * look for an input transfer endpoint in an alternate setting.
+ *
+ * If xfer_ep is invalid, return the first valid ep found, otherwise
+ * look for exactly the ep with address equal to xfer_ep.
*/
static struct usb_host_endpoint *alt_xfer(struct usb_host_interface *alt,
- int xfer)
+ int xfer, int xfer_ep)
{
struct usb_host_endpoint *ep;
int i, attr;
@@ -616,7 +619,8 @@ static struct usb_host_endpoint *alt_xfer(struct
usb_host_interface *alt,
attr = ep-desc.bmAttributes USB_ENDPOINT_XFERTYPE_MASK;
if (attr == xfer
ep-desc.wMaxPacketSize != 0
-usb_endpoint_dir_in(ep-desc))
+usb_endpoint_dir_in(ep-desc)
+(xfer_ep 0 || ep-desc.bEndpointAddress == xfer_ep))
return ep;
}
return NULL;
@@ -689,7 +693,8 @@ static int build_isoc_ep_tb(struct gspca_dev *gspca_dev,
found = 0;
for (j = 0; j nbalt; j++) {
ep = alt_xfer(intf-altsetting[j],
- USB_ENDPOINT_XFER_ISOC);
+ USB_ENDPOINT_XFER_ISOC,
+ gspca_dev-xfer_ep);
if (ep == NULL)
continue;
if (ep-desc.bInterval == 0) {
@@ -862,7 +867,8 @@ static int gspca_init_transfer(struct gspca_dev *gspca_dev)
/* if bulk or the subdriver forced an altsetting, get the endpoint */
if (gspca_dev-alt != 0) {
gspca_dev-alt--; /* (previous version compatibility) */
- ep = alt_xfer(intf-altsetting[gspca_dev-alt], xfer);
+ ep = alt_xfer(intf-altsetting[gspca_dev-alt], xfer,
+ gspca_dev-xfer_ep);
if (ep == NULL) {
pr_err(bad altsetting %d\n, gspca_dev-alt);
return -EIO;
@@ -904,7 +910,8 @@ static int gspca_init_transfer(struct gspca_dev *gspca_dev)
if (!gspca_dev-cam.no_urb_create) {
PDEBUG(D_STREAM, init transfer alt %d, alt);
ret = create_urbs(gspca_dev,
- alt_xfer(intf-altsetting[alt], xfer));
+ alt_xfer(intf-altsetting[alt], xfer,
+gspca_dev-xfer_ep));
if (ret 0) {
destroy_urbs(gspca_dev);
goto out;
@@ -2030,6 +2037,7 @@ int gspca_dev_probe2(struct usb_interface *intf,
}
gspca_dev-dev = dev;
gspca_dev-iface = intf-cur_altsetting-desc.bInterfaceNumber;
+ gspca_dev-xfer_ep = -1;
/* check if any audio device */
if (dev-actconfig-desc.bNumInterfaces != 1) {
diff --git a/drivers/media/usb/gspca/gspca.h b/drivers/media/usb/gspca/gspca.h
index 300642d..f06253c 100644
--- a/drivers/media/usb/gspca/gspca.h
+++ b/drivers/media/usb/gspca/gspca.h
@@ -205,6 +205,7 @@ struct gspca_dev {
char memory;/* memory type (V4L2_MEMORY_xxx) */
__u8 iface; /* USB interface number */
__u8 alt; /* USB alternate setting */
+ int xfer_ep;/* USB transfer endpoint address */
u8 audio; /* presence of audio device */
/* (*) These variables are proteced by both usb_lock and queue_lock,
--
2.0.0
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[PATCH 0/2] gspca, gspca_kinect: add support for the depth stream
Hi, here are the patches to make gspca able to deal with the Kinect depth stream at 10bpp. If anyone is really interested in the 11bpp data too, ping me. Alexander, please let us know if you can test these anytime soon. Thanks, Antonio Antonio Ospite (2): gspca: provide a mechanism to select a specific transfer endpoint gspca_kinect: add support for the depth stream drivers/media/usb/gspca/gspca.c | 20 +--- drivers/media/usb/gspca/gspca.h | 1 + drivers/media/usb/gspca/kinect.c | 98 +++- 3 files changed, 102 insertions(+), 17 deletions(-) -- Antonio Ospite http://ao2.it A: Because it messes up the order in which people normally read text. See http://en.wikipedia.org/wiki/Posting_style Q: Why is top-posting such a bad thing? -- To unsubscribe from this list: send the line unsubscribe linux-media in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
[PATCH 2/2] gspca_kinect: add support for the depth stream
Add support for the depth stream at 10bpp, for now use a 'depth_mode'
command line parameter to switch between video and depth mode.
Signed-off-by: Alexander Sosna alexan...@xxor.de
Signed-off-by: Antonio Ospite a...@ao2.it
---
drivers/media/usb/gspca/kinect.c | 98 +++-
1 file changed, 87 insertions(+), 11 deletions(-)
diff --git a/drivers/media/usb/gspca/kinect.c b/drivers/media/usb/gspca/kinect.c
index 081f051..45bc1f5 100644
--- a/drivers/media/usb/gspca/kinect.c
+++ b/drivers/media/usb/gspca/kinect.c
@@ -36,6 +36,8 @@ MODULE_AUTHOR(Antonio Ospite osp...@studenti.unina.it);
MODULE_DESCRIPTION(GSPCA/Kinect Sensor Device USB Camera Driver);
MODULE_LICENSE(GPL);
+static bool depth_mode;
+
struct pkt_hdr {
uint8_t magic[2];
uint8_t pad;
@@ -73,6 +75,14 @@ struct sd {
#define FPS_HIGH 0x0100
+static const struct v4l2_pix_format depth_camera_mode[] = {
+ {640, 480, V4L2_PIX_FMT_Y10BPACK, V4L2_FIELD_NONE,
+.bytesperline = 640 * 10 / 8,
+.sizeimage = 640 * 480 * 10 / 8,
+.colorspace = V4L2_COLORSPACE_SRGB,
+.priv = MODE_640x488 | FORMAT_Y10B},
+};
+
static const struct v4l2_pix_format video_camera_mode[] = {
{640, 480, V4L2_PIX_FMT_SGRBG8, V4L2_FIELD_NONE,
.bytesperline = 640,
@@ -219,7 +229,7 @@ static int write_register(struct gspca_dev *gspca_dev,
uint16_t reg,
}
/* this function is called at probe time */
-static int sd_config(struct gspca_dev *gspca_dev,
+static int sd_config_video(struct gspca_dev *gspca_dev,
const struct usb_device_id *id)
{
struct sd *sd = (struct sd *) gspca_dev;
@@ -227,8 +237,6 @@ static int sd_config(struct gspca_dev *gspca_dev,
sd-cam_tag = 0;
- /* Only video stream is supported for now,
-* which has stream flag = 0x80 */
sd-stream_flag = 0x80;
cam = gspca_dev-cam;
@@ -236,6 +244,8 @@ static int sd_config(struct gspca_dev *gspca_dev,
cam-cam_mode = video_camera_mode;
cam-nmodes = ARRAY_SIZE(video_camera_mode);
+ gspca_dev-xfer_ep = 0x81;
+
#if 0
/* Setting those values is not needed for video stream */
cam-npkt = 15;
@@ -245,6 +255,26 @@ static int sd_config(struct gspca_dev *gspca_dev,
return 0;
}
+static int sd_config_depth(struct gspca_dev *gspca_dev,
+const struct usb_device_id *id)
+{
+ struct sd *sd = (struct sd *) gspca_dev;
+ struct cam *cam;
+
+ sd-cam_tag = 0;
+
+ sd-stream_flag = 0x70;
+
+ cam = gspca_dev-cam;
+
+ cam-cam_mode = depth_camera_mode;
+ cam-nmodes = ARRAY_SIZE(depth_camera_mode);
+
+ gspca_dev-xfer_ep = 0x82;
+
+ return 0;
+}
+
/* this function is called at probe and resume time */
static int sd_init(struct gspca_dev *gspca_dev)
{
@@ -253,7 +283,7 @@ static int sd_init(struct gspca_dev *gspca_dev)
return 0;
}
-static int sd_start(struct gspca_dev *gspca_dev)
+static int sd_start_video(struct gspca_dev *gspca_dev)
{
int mode;
uint8_t fmt_reg, fmt_val;
@@ -325,12 +355,39 @@ static int sd_start(struct gspca_dev *gspca_dev)
return 0;
}
-static void sd_stopN(struct gspca_dev *gspca_dev)
+static int sd_start_depth(struct gspca_dev *gspca_dev)
+{
+ /* turn off IR-reset function */
+ write_register(gspca_dev, 0x105, 0x00);
+
+ /* reset depth stream */
+ write_register(gspca_dev, 0x06, 0x00);
+ /* Depth Stream Format 0x03: 11 bit stream | 0x02: 10 bit */
+ write_register(gspca_dev, 0x12, 0x02);
+ /* Depth Stream Resolution 1: standard (640x480) */
+ write_register(gspca_dev, 0x13, 0x01);
+ /* Depth Framerate / 0x1e (30): 30 fps */
+ write_register(gspca_dev, 0x14, 0x1e);
+ /* Depth Stream Control / 2: Open Depth Stream */
+ write_register(gspca_dev, 0x06, 0x02);
+ /* disable depth hflip / LSB = 0: Smoothing Disabled */
+ write_register(gspca_dev, 0x17, 0x00);
+
+ return 0;
+}
+
+static void sd_stopN_video(struct gspca_dev *gspca_dev)
{
/* reset video stream */
write_register(gspca_dev, 0x05, 0x00);
}
+static void sd_stopN_depth(struct gspca_dev *gspca_dev)
+{
+ /* reset depth stream */
+ write_register(gspca_dev, 0x06, 0x00);
+}
+
static void sd_pkt_scan(struct gspca_dev *gspca_dev, u8 *__data, int len)
{
struct sd *sd = (struct sd *) gspca_dev;
@@ -366,12 +423,24 @@ static void sd_pkt_scan(struct gspca_dev *gspca_dev, u8
*__data, int len)
}
/* sub-driver description */
-static const struct sd_desc sd_desc = {
+static const struct sd_desc sd_desc_video = {
.name = MODULE_NAME,
- .config= sd_config,
+ .config= sd_config_video,
.init = sd_init,
- .start = sd_start,
- .stopN = sd_stopN,
+ .start = sd_start_video,
+ .stopN = sd_stopN_video,
+ .pkt_scan = sd_pkt_scan,
+
Re: [PATCH v14 08/10] drm/panel: Add Eukrea mbimxsd51 displays.
On 06/24/2014 05:06 PM, Russell King - ARM Linux wrote: It would be better if you separate the binding documentation updates from the other functional changes too. Fixed. Denis. -- To unsubscribe from this list: send the line unsubscribe linux-media in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
Re: [PATCH v14 04/10] imx-drm: use defines for clock polarity settings
On 06/25/2014 06:48 AM, Sascha Hauer wrote: +#define ENABLE_POL_LOW 0 +#define ENABLE_POL_HIGH1 Adding defines without a proper namespace (IPU_) outside a driver private header file is not nice. Anyway, instead of adding the defines ... Fixed in imx-drm: use defines for clock polarity settings and in imx-drm: Use drm_display_mode timings flags.. Denis. -- To unsubscribe from this list: send the line unsubscribe linux-media in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
Re: [PATCH v14 04/10] imx-drm: use defines for clock polarity settings
On Wed, Jun 25, 2014 at 09:43:27AM +0100, Russell King - ARM Linux wrote:
On Wed, Jun 25, 2014 at 06:48:45AM +0200, Sascha Hauer wrote:
On Mon, Jun 16, 2014 at 12:11:18PM +0200, Denis Carikli wrote:
+
/*
* Bitfield of Display Interface signal polarities.
*/
@@ -37,7 +43,7 @@ struct ipu_di_signal_cfg {
unsigned clksel_en:1;
unsigned clkidle_en:1;
unsigned data_pol:1;/* true = inverted */
- unsigned clk_pol:1; /* true = rising edge */
+ unsigned clk_pol:1;
unsigned enable_pol:1;
unsigned Hsync_pol:1; /* true = active high */
unsigned Vsync_pol:1;
...can we rename the flags to more meaningful names instead?
unsigned clk_pol_rising_edge:1;
unsigned enable_pol_high:1;
unsigned hsync_active_high:1;
unsigned vsync_active_high:1;
Now look at patch 7, where these become tri-state:
- don't change
- rising edge/active high
- falling edge/active low
So your suggestion is not a good idea.
Hm, you're right.
Still I think we should add a prefix to make the context of the flags
clear.
Sascha
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Re: [PATCH v2] V4L: uvcvideo: Add support for relative pan/tilt controls
Hi Pawel, On Wednesday 25 June 2014 11:46:24 Pawel Osciak wrote: On Tue, Jun 17, 2014 at 11:45 PM, Vincent Palatin wrote: Map V4L2_CID_TILT_RELATIVE and V4L2_CID_PAN_RELATIVE to the standard UVC CT_PANTILT_RELATIVE_CONTROL terminal control request. Tested by plugging a Logitech ConferenceCam C3000e USB camera and controlling pan/tilt from the userspace using the VIDIOC_S_CTRL ioctl. Verified that it can pan and tilt at the same time in both directions. Signed-off-by: Vincent Palatin vpala...@chromium.org Change-Id: I7b70b228e5c0126683f5f0be34ffd2807f5783dc --- Changes v2: fix control request name in description. The patch looks good, but I have a more general comment for everyone to consider. This doesn't match the expected functionality of controls V4L2_CID_PAN/TILT_RELATIVE. This is basically an on/off switch for pan/tilt, which once enabled will keep going until turned off (or I'm guessing until the maximum pan/tilt is reached), while the controls are supposed to expose an ability to turn the camera by a specified amount. Here the amount will also be ignored... I agree with you here, and this mismatch between the V4L and UVC controls is the reason why I haven't implemented relative pan/tilt support. Given that this is a standard UVC control, perhaps we need new V4L2 controls for it, as I'm assuming we can't change the meaning of existing controls? We could extend the meaning of the controls to cover the UVC behaviour in a device-specific fashion, but that would be confusing for applications, so new controls might be a better idea. -- Regards, Laurent Pinchart -- To unsubscribe from this list: send the line unsubscribe linux-media in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
Re: [PATCH v2 2/2] media: soc_camera: pxa_camera device-tree support
On Sat, Jun 21, 2014 at 11:21:47PM +0100, Robert Jarzmik wrote:
Add device-tree support to pxa_camera host driver.
Signed-off-by: Robert Jarzmik robert.jarz...@free.fr
---
drivers/media/platform/soc_camera/pxa_camera.c | 77
+-
1 file changed, 75 insertions(+), 2 deletions(-)
diff --git a/drivers/media/platform/soc_camera/pxa_camera.c
b/drivers/media/platform/soc_camera/pxa_camera.c
index d4df305..8c9de9e 100644
--- a/drivers/media/platform/soc_camera/pxa_camera.c
+++ b/drivers/media/platform/soc_camera/pxa_camera.c
@@ -34,6 +34,7 @@
#include media/videobuf-dma-sg.h
#include media/soc_camera.h
#include media/soc_mediabus.h
+#include media/v4l2-of.h
#include linux/videodev2.h
@@ -1650,6 +1651,64 @@ static struct soc_camera_host_ops
pxa_soc_camera_host_ops = {
.set_bus_param = pxa_camera_set_bus_param,
};
+static int pxa_camera_pdata_from_dt(struct device *dev,
+ struct pxa_camera_dev *pcdev)
+{
+ int err = 0;
+ struct device_node *np = dev-of_node;
+ struct v4l2_of_endpoint ep;
+
+ err = of_property_read_u32(np, clock-frequency,
+(u32 *)pcdev-mclk);
That cast is either unnecessary or this code is broken.
Use a temporary u32 if the types don't match.
Mark.
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Re: [PATCH v2 1/2] media: soc_camera: pxa_camera documentation device-tree support
On Sat, Jun 21, 2014 at 11:21:46PM +0100, Robert Jarzmik wrote:
Add device-tree bindings documentation for pxa_camera driver.
Signed-off-by: Robert Jarzmik robert.jarz...@free.fr
---
.../devicetree/bindings/media/pxa-camera.txt | 39
++
1 file changed, 39 insertions(+)
create mode 100644 Documentation/devicetree/bindings/media/pxa-camera.txt
diff --git a/Documentation/devicetree/bindings/media/pxa-camera.txt
b/Documentation/devicetree/bindings/media/pxa-camera.txt
new file mode 100644
index 000..9835aae
--- /dev/null
+++ b/Documentation/devicetree/bindings/media/pxa-camera.txt
@@ -0,0 +1,39 @@
+Marvell PXA camera host interface
+
+Required properties:
+ - compatible: Should be marvell,pxa27x-qci
Is that x a wildcard? Or is 'x' part of the name of a particular unit?
We prefer not to have wildcard compatible strings in DT.
+ - reg: register base and size
+ - interrupts: the interrupt number
+ - any required generic properties defined in video-interfaces.txt
+
+Optional properties:
+ - clock-frequency: host interface is driving MCLK, and MCLK rate is this
rate
Is MCLK an input or an output of this block?
If the former, why isn't this described as a clock?
+
+Example:
+
+ pxa_camera: pxa_camera@5000 {
+ compatible = marvell,pxa27x-qci;
+ reg = 0x5000 0x1000;
+ interrupts = 33;
+
+ clocks = pxa2xx_clks 24;
+ clock-names = camera;
These weren't mentioned above. Is the clock input line really called
camera?
Mark.
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Re: [PATCH] af9035: override tuner id when bad value set into eeprom
Patched vanilla 3.15.1, this is the dmesg: Jun 25 20:16:16 crystal kernel: [ 136.546403] usb 3-4.1.2: new high-speed USB device number 9 using xhci_hcd Jun 25 20:16:16 crystal kernel: [ 136.634428] usb 3-4.1.2: New USB device found, idVendor=0413, idProduct=6a05 Jun 25 20:16:16 crystal kernel: [ 136.634435] usb 3-4.1.2: New USB device strings: Mfr=1, Product=2, SerialNumber=0 Jun 25 20:16:16 crystal kernel: [ 136.634438] usb 3-4.1.2: Product: WinFast DTV Dongle Dual Jun 25 20:16:16 crystal kernel: [ 136.634441] usb 3-4.1.2: Manufacturer: Leadtek Jun 25 20:16:16 crystal kernel: [ 136.643754] usb 3-4.1.2: dvb_usb_af9035: prechip_version=83 chip_version=02 chip_type=9135 Jun 25 20:16:16 crystal kernel: [ 136.644100] usb 3-4.1.2: dvb_usb_v2: found a 'Leadtek WinFast DTV Dongle Dual' in cold state Jun 25 20:16:16 crystal kernel: [ 136.644429] usb 3-4.1.2: dvb_usb_v2: downloading firmware from file 'dvb-usb-it9135-02.fw' Jun 25 20:16:18 crystal kernel: [ 138.553335] usb 3-4.1.2: dvb_usb_af9035: firmware version=3.39.1.0 Jun 25 20:16:18 crystal kernel: [ 138.553350] usb 3-4.1.2: dvb_usb_v2: found a 'Leadtek WinFast DTV Dongle Dual' in warm state Jun 25 20:16:18 crystal kernel: [ 138.555176] usb 3-4.1.2: dvb_usb_af9035: [0] overriding tuner from 38 to 60 Jun 25 20:16:18 crystal kernel: [ 138.556515] usb 3-4.1.2: dvb_usb_af9035: [1] overriding tuner from 38 to 60 Jun 25 20:16:18 crystal kernel: [ 138.557900] usb 3-4.1.2: dvb_usb_v2: will pass the complete MPEG2 transport stream to the software demuxer Jun 25 20:16:18 crystal kernel: [ 138.557957] DVB: registering new adapter (Leadtek WinFast DTV Dongle Dual) Jun 25 20:16:18 crystal kernel: [ 138.564417] i2c i2c-11: af9033: firmware version: LINK=0.0.0.0 OFDM=3.9.1.0 Jun 25 20:16:18 crystal kernel: [ 138.564446] usb 3-4.1.2: DVB: registering adapter 2 frontend 0 (Afatech AF9033 (DVB-T))... Jun 25 20:16:18 crystal kernel: [ 138.568091] i2c i2c-11: tuner_it913x: ITE Tech IT913X successfully attached Jun 25 20:16:18 crystal kernel: [ 138.568110] usb 3-4.1.2: dvb_usb_v2: will pass the complete MPEG2 transport stream to the software demuxer Jun 25 20:16:18 crystal kernel: [ 138.568139] DVB: registering new adapter (Leadtek WinFast DTV Dongle Dual) Jun 25 20:16:18 crystal kernel: [ 138.580208] i2c i2c-11: af9033: firmware version: LINK=0.0.0.0 OFDM=3.9.1.0 Jun 25 20:16:18 crystal kernel: [ 138.580219] usb 3-4.1.2: DVB: registering adapter 3 frontend 0 (Afatech AF9033 (DVB-T))... Jun 25 20:16:18 crystal kernel: [ 138.580364] i2c i2c-11: tuner_it913x: ITE Tech IT913X successfully attached Jun 25 20:16:18 crystal kernel: [ 138.591871] Registered IR keymap rc-empty Jun 25 20:16:18 crystal kernel: [ 138.591995] input: Leadtek WinFast DTV Dongle Dual as /devices/pci:00/:00:14.0/usb3/3-4/3-4.1/3-4.1.2/rc/rc2/input11 Jun 25 20:16:18 crystal kernel: [ 138.592069] rc2: Leadtek WinFast DTV Dongle Dual as /devices/pci:00/:00:14.0/usb3/3-4/3-4.1/3-4.1.2/rc/rc2 Jun 25 20:16:18 crystal kernel: [ 138.592075] usb 3-4.1.2: dvb_usb_v2: schedule remote query interval to 500 msecs Jun 25 20:16:18 crystal kernel: [ 138.592078] usb 3-4.1.2: dvb_usb_v2: 'Leadtek WinFast DTV Dongle Dual' successfully initialized and connected Jun 25 20:16:18 crystal kernel: [ 138.592113] usbcore: registered new interface driver dvb_usb_af9035 I can confirm that this tuner now works on the 9035 driver. However, im not sure if its the tuner thats just crap or my signal strength, as an AF9013 can tune and get ok reception, but this IT913X can tune but barely maintain a good picture. ITE say this particular tuner requires 2db more so I guess its feasible my 9013's are right on the border and the 9137 just cant do it :) I have a new antenna going in on the weekend so I will report back then! Merci! D. On 24 June 2014 23:15, Antti Palosaari cr...@iki.fi wrote: Tuner ID set into EEPROM is wrong in some cases, which causes driver to select wrong tuner profile. That leads device non-working. Fix issue by overriding known bad tuner IDs with suitable default value. Cc: sta...@vger.kernel.org # v3.15+ Signed-off-by: Antti Palosaari cr...@iki.fi --- drivers/media/usb/dvb-usb-v2/af9035.c | 40 +-- 1 file changed, 33 insertions(+), 7 deletions(-) diff --git a/drivers/media/usb/dvb-usb-v2/af9035.c b/drivers/media/usb/dvb-usb-v2/af9035.c index 021e4d3..7b9b75f 100644 --- a/drivers/media/usb/dvb-usb-v2/af9035.c +++ b/drivers/media/usb/dvb-usb-v2/af9035.c @@ -704,15 +704,41 @@ static int af9035_read_config(struct dvb_usb_device *d) if (ret 0) goto err; - if (tmp == 0x00) - dev_dbg(d-udev-dev, - %s: [%d]tuner not set, using default\n, - __func__, i); - else + dev_dbg(d-udev-dev, %s: [%d]tuner=%02x\n, + __func__,
Re: [PATCH] af9035: override tuner id when bad value set into eeprom
On 06/25/2014 01:32 PM, David Shirley wrote: Patched vanilla 3.15.1, this is the dmesg: Jun 25 20:16:16 crystal kernel: [ 136.546403] usb 3-4.1.2: new high-speed USB device number 9 using xhci_hcd Jun 25 20:16:16 crystal kernel: [ 136.634428] usb 3-4.1.2: New USB device found, idVendor=0413, idProduct=6a05 Jun 25 20:16:16 crystal kernel: [ 136.634435] usb 3-4.1.2: New USB device strings: Mfr=1, Product=2, SerialNumber=0 Jun 25 20:16:16 crystal kernel: [ 136.634438] usb 3-4.1.2: Product: WinFast DTV Dongle Dual Jun 25 20:16:16 crystal kernel: [ 136.634441] usb 3-4.1.2: Manufacturer: Leadtek Jun 25 20:16:16 crystal kernel: [ 136.643754] usb 3-4.1.2: dvb_usb_af9035: prechip_version=83 chip_version=02 chip_type=9135 Jun 25 20:16:16 crystal kernel: [ 136.644100] usb 3-4.1.2: dvb_usb_v2: found a 'Leadtek WinFast DTV Dongle Dual' in cold state Jun 25 20:16:16 crystal kernel: [ 136.644429] usb 3-4.1.2: dvb_usb_v2: downloading firmware from file 'dvb-usb-it9135-02.fw' Jun 25 20:16:18 crystal kernel: [ 138.553335] usb 3-4.1.2: dvb_usb_af9035: firmware version=3.39.1.0 Jun 25 20:16:18 crystal kernel: [ 138.553350] usb 3-4.1.2: dvb_usb_v2: found a 'Leadtek WinFast DTV Dongle Dual' in warm state Jun 25 20:16:18 crystal kernel: [ 138.555176] usb 3-4.1.2: dvb_usb_af9035: [0] overriding tuner from 38 to 60 Jun 25 20:16:18 crystal kernel: [ 138.556515] usb 3-4.1.2: dvb_usb_af9035: [1] overriding tuner from 38 to 60 Jun 25 20:16:18 crystal kernel: [ 138.557900] usb 3-4.1.2: dvb_usb_v2: will pass the complete MPEG2 transport stream to the software demuxer Jun 25 20:16:18 crystal kernel: [ 138.557957] DVB: registering new adapter (Leadtek WinFast DTV Dongle Dual) Jun 25 20:16:18 crystal kernel: [ 138.564417] i2c i2c-11: af9033: firmware version: LINK=0.0.0.0 OFDM=3.9.1.0 Jun 25 20:16:18 crystal kernel: [ 138.564446] usb 3-4.1.2: DVB: registering adapter 2 frontend 0 (Afatech AF9033 (DVB-T))... Jun 25 20:16:18 crystal kernel: [ 138.568091] i2c i2c-11: tuner_it913x: ITE Tech IT913X successfully attached Jun 25 20:16:18 crystal kernel: [ 138.568110] usb 3-4.1.2: dvb_usb_v2: will pass the complete MPEG2 transport stream to the software demuxer Jun 25 20:16:18 crystal kernel: [ 138.568139] DVB: registering new adapter (Leadtek WinFast DTV Dongle Dual) Jun 25 20:16:18 crystal kernel: [ 138.580208] i2c i2c-11: af9033: firmware version: LINK=0.0.0.0 OFDM=3.9.1.0 Jun 25 20:16:18 crystal kernel: [ 138.580219] usb 3-4.1.2: DVB: registering adapter 3 frontend 0 (Afatech AF9033 (DVB-T))... Jun 25 20:16:18 crystal kernel: [ 138.580364] i2c i2c-11: tuner_it913x: ITE Tech IT913X successfully attached Jun 25 20:16:18 crystal kernel: [ 138.591871] Registered IR keymap rc-empty Jun 25 20:16:18 crystal kernel: [ 138.591995] input: Leadtek WinFast DTV Dongle Dual as /devices/pci:00/:00:14.0/usb3/3-4/3-4.1/3-4.1.2/rc/rc2/input11 Jun 25 20:16:18 crystal kernel: [ 138.592069] rc2: Leadtek WinFast DTV Dongle Dual as /devices/pci:00/:00:14.0/usb3/3-4/3-4.1/3-4.1.2/rc/rc2 Jun 25 20:16:18 crystal kernel: [ 138.592075] usb 3-4.1.2: dvb_usb_v2: schedule remote query interval to 500 msecs Jun 25 20:16:18 crystal kernel: [ 138.592078] usb 3-4.1.2: dvb_usb_v2: 'Leadtek WinFast DTV Dongle Dual' successfully initialized and connected Jun 25 20:16:18 crystal kernel: [ 138.592113] usbcore: registered new interface driver dvb_usb_af9035 I can confirm that this tuner now works on the 9035 driver. However, im not sure if its the tuner thats just crap or my signal strength, as an AF9013 can tune and get ok reception, but this IT913X can tune but barely maintain a good picture. ITE say this particular tuner requires 2db more so I guess its feasible my 9013's are right on the border and the 9137 just cant do it :) I have a new antenna going in on the weekend so I will report back then! Could you test newer firmwares? I have dumped out those initialization register tables from Windows driver version 12.07.06.1. Newer firmwares are dumped out from Windows driver version 12.10.04.1. Due to that newer firmwares will work better with this driver - you were using the oldest firmware. I have got few reports newer or even newest firmware 3.42.3.3 - 3.29.3.3 works most best. http://palosaari.fi/linux/v4l-dvb/firmware/IT9135/12.10.04.1/ If that does not help I have to get IT9135 v2 dual device in order to fix it. regards Antti Merci! D. On 24 June 2014 23:15, Antti Palosaari cr...@iki.fi wrote: Tuner ID set into EEPROM is wrong in some cases, which causes driver to select wrong tuner profile. That leads device non-working. Fix issue by overriding known bad tuner IDs with suitable default value. Cc: sta...@vger.kernel.org # v3.15+ Signed-off-by: Antti Palosaari cr...@iki.fi --- drivers/media/usb/dvb-usb-v2/af9035.c | 40 +-- 1 file changed, 33 insertions(+), 7 deletions(-) diff --git a/drivers/media/usb/dvb-usb-v2/af9035.c b/drivers/media/usb/dvb-usb-v2/af9035.c index
Re: [PATCH] af9035: override tuner id when bad value set into eeprom
With the IT913X driver: I found that IT9135v2_3.42.3.3_3.29.3.3 wouldn't tune at all and IT9135v2_3.40.1.0_3.17.1.0 appeared to be less happy to tune (rightly so if the reception from the kernel driver (ie the one the script ftp's and extracts) is anything to go by) I will retest now that i'm on the AF9035 driver, give me a few days :) On 25 June 2014 21:46, Antti Palosaari cr...@iki.fi wrote: On 06/25/2014 01:32 PM, David Shirley wrote: Patched vanilla 3.15.1, this is the dmesg: Jun 25 20:16:16 crystal kernel: [ 136.546403] usb 3-4.1.2: new high-speed USB device number 9 using xhci_hcd Jun 25 20:16:16 crystal kernel: [ 136.634428] usb 3-4.1.2: New USB device found, idVendor=0413, idProduct=6a05 Jun 25 20:16:16 crystal kernel: [ 136.634435] usb 3-4.1.2: New USB device strings: Mfr=1, Product=2, SerialNumber=0 Jun 25 20:16:16 crystal kernel: [ 136.634438] usb 3-4.1.2: Product: WinFast DTV Dongle Dual Jun 25 20:16:16 crystal kernel: [ 136.634441] usb 3-4.1.2: Manufacturer: Leadtek Jun 25 20:16:16 crystal kernel: [ 136.643754] usb 3-4.1.2: dvb_usb_af9035: prechip_version=83 chip_version=02 chip_type=9135 Jun 25 20:16:16 crystal kernel: [ 136.644100] usb 3-4.1.2: dvb_usb_v2: found a 'Leadtek WinFast DTV Dongle Dual' in cold state Jun 25 20:16:16 crystal kernel: [ 136.644429] usb 3-4.1.2: dvb_usb_v2: downloading firmware from file 'dvb-usb-it9135-02.fw' Jun 25 20:16:18 crystal kernel: [ 138.553335] usb 3-4.1.2: dvb_usb_af9035: firmware version=3.39.1.0 Jun 25 20:16:18 crystal kernel: [ 138.553350] usb 3-4.1.2: dvb_usb_v2: found a 'Leadtek WinFast DTV Dongle Dual' in warm state Jun 25 20:16:18 crystal kernel: [ 138.555176] usb 3-4.1.2: dvb_usb_af9035: [0] overriding tuner from 38 to 60 Jun 25 20:16:18 crystal kernel: [ 138.556515] usb 3-4.1.2: dvb_usb_af9035: [1] overriding tuner from 38 to 60 Jun 25 20:16:18 crystal kernel: [ 138.557900] usb 3-4.1.2: dvb_usb_v2: will pass the complete MPEG2 transport stream to the software demuxer Jun 25 20:16:18 crystal kernel: [ 138.557957] DVB: registering new adapter (Leadtek WinFast DTV Dongle Dual) Jun 25 20:16:18 crystal kernel: [ 138.564417] i2c i2c-11: af9033: firmware version: LINK=0.0.0.0 OFDM=3.9.1.0 Jun 25 20:16:18 crystal kernel: [ 138.564446] usb 3-4.1.2: DVB: registering adapter 2 frontend 0 (Afatech AF9033 (DVB-T))... Jun 25 20:16:18 crystal kernel: [ 138.568091] i2c i2c-11: tuner_it913x: ITE Tech IT913X successfully attached Jun 25 20:16:18 crystal kernel: [ 138.568110] usb 3-4.1.2: dvb_usb_v2: will pass the complete MPEG2 transport stream to the software demuxer Jun 25 20:16:18 crystal kernel: [ 138.568139] DVB: registering new adapter (Leadtek WinFast DTV Dongle Dual) Jun 25 20:16:18 crystal kernel: [ 138.580208] i2c i2c-11: af9033: firmware version: LINK=0.0.0.0 OFDM=3.9.1.0 Jun 25 20:16:18 crystal kernel: [ 138.580219] usb 3-4.1.2: DVB: registering adapter 3 frontend 0 (Afatech AF9033 (DVB-T))... Jun 25 20:16:18 crystal kernel: [ 138.580364] i2c i2c-11: tuner_it913x: ITE Tech IT913X successfully attached Jun 25 20:16:18 crystal kernel: [ 138.591871] Registered IR keymap rc-empty Jun 25 20:16:18 crystal kernel: [ 138.591995] input: Leadtek WinFast DTV Dongle Dual as /devices/pci:00/:00:14.0/usb3/3-4/3-4.1/3-4.1.2/rc/rc2/input11 Jun 25 20:16:18 crystal kernel: [ 138.592069] rc2: Leadtek WinFast DTV Dongle Dual as /devices/pci:00/:00:14.0/usb3/3-4/3-4.1/3-4.1.2/rc/rc2 Jun 25 20:16:18 crystal kernel: [ 138.592075] usb 3-4.1.2: dvb_usb_v2: schedule remote query interval to 500 msecs Jun 25 20:16:18 crystal kernel: [ 138.592078] usb 3-4.1.2: dvb_usb_v2: 'Leadtek WinFast DTV Dongle Dual' successfully initialized and connected Jun 25 20:16:18 crystal kernel: [ 138.592113] usbcore: registered new interface driver dvb_usb_af9035 I can confirm that this tuner now works on the 9035 driver. However, im not sure if its the tuner thats just crap or my signal strength, as an AF9013 can tune and get ok reception, but this IT913X can tune but barely maintain a good picture. ITE say this particular tuner requires 2db more so I guess its feasible my 9013's are right on the border and the 9137 just cant do it :) I have a new antenna going in on the weekend so I will report back then! Could you test newer firmwares? I have dumped out those initialization register tables from Windows driver version 12.07.06.1. Newer firmwares are dumped out from Windows driver version 12.10.04.1. Due to that newer firmwares will work better with this driver - you were using the oldest firmware. I have got few reports newer or even newest firmware 3.42.3.3 - 3.29.3.3 works most best. http://palosaari.fi/linux/v4l-dvb/firmware/IT9135/12.10.04.1/ If that does not help I have to get IT9135 v2 dual device in order to fix it. regards Antti Merci! D. On 24 June 2014 23:15, Antti Palosaari cr...@iki.fi wrote: Tuner ID set into EEPROM is wrong in some
PCTV 340e: tuning again
Starting with kernel 3.11 (or a little bit earlier), the PCTV 340e DVB-T
tuner would no longer tune to any channel.
There's been a patch which introduced a frequency offset in dib7000p,
based on tuner frequency, here:
https://github.com/torvalds/linux/commit/6fe10
99c7aecc54ebf2fcf8e3af2225cd7bfa550 .
Yet, there should be no offset with the PCTV 340e's DIB7000P, as the
COFDM demodulator is already set at the right frequency, i.e. the one
the XC4000 tuner passes its data on.
In order to make the PCTV 340e work again, I have done the following:
In drivers/media/dvb-frontends/dib7000p.c :
static void dib7000p_set_dds(struct dib7000p_state *state, s32 offset_khz)
{
u32 internal = dib7000p_get_internal_freq(state);
s32 unit_khz_dds_val = 67108864 / (internal); /* 2**26 / Fsampling is
the unit 1KHz offset */
u32 abs_offset_khz = ABS(offset_khz);
u32 dds = state-cfg.bw-ifreq 0x1ff;
u8 invert = !!(state-cfg.bw-ifreq (1 25));
dprintk(setting a frequency offset of %dkHz internal freq = %d invert
= %d, offset_khz, internal, invert);
if (offset_khz 0)
unit_khz_dds_val *= -1;
/* IF tuner */
//comment out the lines that involve the offset
// if (invert)
// dds -= (abs_offset_khz * unit_khz_dds_val); /* /100 because of /100
on the unit_khz_dds_val line calc for better accuracy */
// else
// dds += (abs_offset_khz * unit_khz_dds_val);
if (abs_offset_khz = (internal / 2)) { /* Max dds offset is the half
of the demod freq */
dib7000p_write_word(state, 21, (u16) (((dds 16) 0x1ff) | (0
10) | (invert 9)));
dib7000p_write_word(state, 22, (u16) (dds 0x));
}
}
Restoring dib7000p_set_dds(state, 0); instead of the if
(demod-ops.tuner_ops.get_frequency) {...} didn't do the trick (or I did
something wrong with it...)).
This is a basic workaround to get it working, yet there may be units
which embed a DIB7000P demodulator, and where this offset is required.
Does anybody out there have such an unit, or a justification for this
offset setting?
Cheers,
Corentin FERRY
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Re: [PATCH v7] media: vb2: Take queue or device lock in mmap-related vb2 ioctl handlers
Ping?
On 05/23/2014 09:54 AM, Hans Verkuil wrote:
Hi Laurent,
This patch caused a circular locking dependency as reported by Sasha Levin:
https://lkml.org/lkml/2014/5/5/366
The reason is that copy_to/from_user is called in video_usercopy() with the
core lock held. The copy functions can fault which takes the mmap_sem. If it
was just video_usercopy() then it would be fairly easy to solve this, but
the copy_to_/from_user functions are also called from read and write and they
can be used in other unexpected places.
I'm not sure if vb2_fop_get_unmapped_area() is a problem. I suspect (but I'm
not sure) that when that one is called the mmap_sem isn't taken, in which
case taking the lock is fine.
But taking the lock in vb2_fop_mmap() does cause lockdep problems.
Ideally I would like to drop taking that lock in vb2_fop_mmap and resolve the
race condition that it intended to fix in a different way.
Regards,
Hans
On 08/06/2013 10:10 PM, Laurent Pinchart wrote:
The vb2_fop_mmap() and vb2_fop_get_unmapped_area() functions are plug-in
implementation of the mmap() and get_unmapped_area() file operations
that calls vb2_mmap() and vb2_get_unmapped_area() on the queue
associated with the video device. Neither the
vb2_fop_mmap/vb2_fop_get_unmapped_area nor the
v4l2_mmap/vb2_get_unmapped_area functions in the V4L2 core take any
lock, leading to race conditions between mmap/get_unmapped_area and
other buffer-related ioctls such as VIDIOC_REQBUFS.
Fix it by taking the queue or device lock around the vb2_mmap() and
vb2_get_unmapped_area() calls.
Signed-off-by: Laurent Pinchart laurent.pinchart+rene...@ideasonboard.com
---
drivers/media/v4l2-core/videobuf2-core.c | 18 --
1 file changed, 16 insertions(+), 2 deletions(-)
diff --git a/drivers/media/v4l2-core/videobuf2-core.c
b/drivers/media/v4l2-core/videobuf2-core.c
index 9fc4bab..c9b50c7 100644
--- a/drivers/media/v4l2-core/videobuf2-core.c
+++ b/drivers/media/v4l2-core/videobuf2-core.c
@@ -2578,8 +2578,15 @@ EXPORT_SYMBOL_GPL(vb2_ioctl_expbuf);
int vb2_fop_mmap(struct file *file, struct vm_area_struct *vma)
{
struct video_device *vdev = video_devdata(file);
+struct mutex *lock = vdev-queue-lock ? vdev-queue-lock : vdev-lock;
+int err;
-return vb2_mmap(vdev-queue, vma);
+if (lock mutex_lock_interruptible(lock))
+return -ERESTARTSYS;
+err = vb2_mmap(vdev-queue, vma);
+if (lock)
+mutex_unlock(lock);
+return err;
}
EXPORT_SYMBOL_GPL(vb2_fop_mmap);
@@ -2685,8 +2692,15 @@ unsigned long vb2_fop_get_unmapped_area(struct file
*file, unsigned long addr,
unsigned long len, unsigned long pgoff, unsigned long flags)
{
struct video_device *vdev = video_devdata(file);
+struct mutex *lock = vdev-queue-lock ? vdev-queue-lock : vdev-lock;
+int ret;
-return vb2_get_unmapped_area(vdev-queue, addr, len, pgoff, flags);
+if (lock mutex_lock_interruptible(lock))
+return -ERESTARTSYS;
+ret = vb2_get_unmapped_area(vdev-queue, addr, len, pgoff, flags);
+if (lock)
+mutex_unlock(lock);
+return ret;
}
EXPORT_SYMBOL_GPL(vb2_fop_get_unmapped_area);
#endif
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Re: [PATCH v2 2/2] media: soc_camera: pxa_camera device-tree support
Mark Rutland mark.rutl...@arm.com writes:
On Sat, Jun 21, 2014 at 11:21:47PM +0100, Robert Jarzmik wrote:
@@ -1650,6 +1651,64 @@ static struct soc_camera_host_ops
pxa_soc_camera_host_ops = {
.set_bus_param = pxa_camera_set_bus_param,
};
+static int pxa_camera_pdata_from_dt(struct device *dev,
+struct pxa_camera_dev *pcdev)
+{
+int err = 0;
+struct device_node *np = dev-of_node;
+struct v4l2_of_endpoint ep;
+
+err = of_property_read_u32(np, clock-frequency,
+ (u32 *)pcdev-mclk);
That cast is either unnecessary or this code is broken.
Mmm maybe ...
As a clock rate is an unsigned long by design, where is the
of_property_read_ulong() function ?
Use a temporary u32 if the types don't match.
If there's no of_*() function available, let's do that.
--
Robert
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Re: [PATCH v2 1/2] media: soc_camera: pxa_camera documentation device-tree support
Mark Rutland mark.rutl...@arm.com writes:
On Sat, Jun 21, 2014 at 11:21:46PM +0100, Robert Jarzmik wrote:
+Required properties:
+ - compatible: Should be marvell,pxa27x-qci
Is that x a wildcard? Or is 'x' part of the name of a particular unit?
It's kind of a wildcard for a group of platforms
It stands for the 3 PXA27x SoCs I'm aware of : PXA270, PXA271, and PXA272. The
difference between them is different core frequency range and embedded RAM.
We prefer not to have wildcard compatible strings in DT.
OK, then let's go for marvell,pxa270-qci.
+ - reg: register base and size
+ - interrupts: the interrupt number
+ - any required generic properties defined in video-interfaces.txt
+
+Optional properties:
+ - clock-frequency: host interface is driving MCLK, and MCLK rate is this
rate
Is MCLK an input or an output of this block?
An output clock.
If the former, why isn't this described as a clock?
It's a good point. I'll try to add that too. The little trouble I have is that
the PXA clocks are not _yet_ in device-tree. Putting a clock description will
make this patch dependant on the clock framework patches [1], right ?
+Example:
+
+pxa_camera: pxa_camera@5000 {
+compatible = marvell,pxa27x-qci;
+reg = 0x5000 0x1000;
+interrupts = 33;
+
+clocks = pxa2xx_clks 24;
+clock-names = camera;
These weren't mentioned above. Is the clock input line really called
camera?
This is another clock, an input clock, independant of the former one. This is
the clock actually fed to make this IP block work. This is dependant on the
clock framework patches [1].
Cheers.
--
Robert
[1] http://www.spinics.net/lists/arm-kernel/msg337521.html
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Re: [PATCH 00/22] Add and use pci_zalloc_consistent
On Mon, Jun 23, 2014 at 06:41:28AM -0700, Joe Perches wrote: Adding the helper reduces object code size as well as overall source size line count. It's also consistent with all the various zalloc mechanisms in the kernel. Done with a simple cocci script and some typing. Joe Perches (22): ipw2100: Use pci_zalloc_consistent mwl8k: Use pci_zalloc_consistent rtl818x: Use pci_zalloc_consistent rtlwifi: Use pci_zalloc_consistent Sure, fine by me. -- John W. LinvilleSomeday the world will need a hero, and you linvi...@tuxdriver.com might be all we have. Be ready. -- To unsubscribe from this list: send the line unsubscribe linux-media in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
Reverted patch in v4l-utils
Hi Gregor, I've realized today that I had pushed a commit named wip by mistake to the v4l-utils master branch. As other commits have been pushed on top of that I have decided to revert the offending commit instead of rebasing the tree. Please feel free to rebase and remove both the original commit and the revert if preferred. Sorry for the inconvenience this have caused. -- Regards, Laurent Pinchart -- To unsubscribe from this list: send the line unsubscribe linux-media in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
Re: pvrusb2 has a new device (wintv-hvr-1955)
On Fri, 20 Jun 2014, Matthew Thode wrote: On June 20, 2014 7:29:42 AM CDT, Steven Toth st...@kernellabs.com wrote: On Fri, Jun 20, 2014 at 1:48 AM, Matthew Thode prometheanf...@gentoo.org wrote: Just bought a wintv-hvr-1955 (sold as a wintv-hvr-1950) 160111 LF Rev B1|7 Talk to Hauppauge, they've already announced that they have a working Linux driver. I talked to them and they did say that the driver hasn't been upstreamed, also gave me some hardware info. They wouldn't give me a driver/firmware that worked though and offered to RMA for an older device. The demodulator is a Si2177, can't find anything about it in the kernel though. They also mentioned a LG3306a, wasn't able to find anything on it (might have misheard a character). That would explain why the pvrusb2 driver errored out the way it did... Without support for those parts in V4L, there's probably little else to be done in the pvrusb2 driver. I am curious however to know if anyone has heard anything more about Hauppauge's driver... -Mike Isely is...@pobox.com -- Mike Isely isely @ isely (dot) net PGP: 03 54 43 4D 75 E5 CC 92 71 16 01 E2 B5 F5 C1 E8 -- To unsubscribe from this list: send the line unsubscribe linux-media in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
[PATCH 28/28] gpu: ipu-v3: Add ipu_dump()
Adds ipu_dump() which dumps IPU register state to debug.
Signed-off-by: Steve Longerbeam steve_longerb...@mentor.com
---
drivers/gpu/ipu-v3/ipu-common.c | 38 ++
include/video/imx-ipu-v3.h |1 +
2 files changed, 39 insertions(+)
diff --git a/drivers/gpu/ipu-v3/ipu-common.c b/drivers/gpu/ipu-v3/ipu-common.c
index 115572e..af00e8c 100644
--- a/drivers/gpu/ipu-v3/ipu-common.c
+++ b/drivers/gpu/ipu-v3/ipu-common.c
@@ -1310,6 +1310,44 @@ static void ipu_irq_exit(struct ipu_soc *ipu)
irq_domain_remove(ipu-domain);
}
+void ipu_dump(struct ipu_soc *ipu)
+{
+ int i;
+
+ dev_dbg(ipu-dev, IPU_CONF = \t0x%08X\n,
+ ipu_cm_read(ipu, IPU_CONF));
+ dev_dbg(ipu-dev, IDMAC_CONF = \t0x%08X\n,
+ ipu_idmac_read(ipu, IDMAC_CONF));
+ dev_dbg(ipu-dev, IDMAC_CHA_EN1 = \t0x%08X\n,
+ ipu_idmac_read(ipu, IDMAC_CHA_EN(0)));
+ dev_dbg(ipu-dev, IDMAC_CHA_EN2 = \t0x%08X\n,
+ ipu_idmac_read(ipu, IDMAC_CHA_EN(32)));
+ dev_dbg(ipu-dev, IDMAC_CHA_PRI1 = \t0x%08X\n,
+ ipu_idmac_read(ipu, IDMAC_CHA_PRI(0)));
+ dev_dbg(ipu-dev, IDMAC_CHA_PRI2 = \t0x%08X\n,
+ ipu_idmac_read(ipu, IDMAC_CHA_PRI(32)));
+ dev_dbg(ipu-dev, IDMAC_BAND_EN1 = \t0x%08X\n,
+ ipu_idmac_read(ipu, IDMAC_BAND_EN(0)));
+ dev_dbg(ipu-dev, IDMAC_BAND_EN2 = \t0x%08X\n,
+ ipu_idmac_read(ipu, IDMAC_BAND_EN(32)));
+ dev_dbg(ipu-dev, IPU_CHA_DB_MODE_SEL0 = \t0x%08X\n,
+ ipu_cm_read(ipu, IPU_CHA_DB_MODE_SEL(0)));
+ dev_dbg(ipu-dev, IPU_CHA_DB_MODE_SEL1 = \t0x%08X\n,
+ ipu_cm_read(ipu, IPU_CHA_DB_MODE_SEL(32)));
+ dev_dbg(ipu-dev, IPU_FS_PROC_FLOW1 = \t0x%08X\n,
+ ipu_cm_read(ipu, IPU_FS_PROC_FLOW1));
+ dev_dbg(ipu-dev, IPU_FS_PROC_FLOW2 = \t0x%08X\n,
+ ipu_cm_read(ipu, IPU_FS_PROC_FLOW2));
+ dev_dbg(ipu-dev, IPU_FS_PROC_FLOW3 = \t0x%08X\n,
+ ipu_cm_read(ipu, IPU_FS_PROC_FLOW3));
+ dev_dbg(ipu-dev, IPU_FS_DISP_FLOW1 = \t0x%08X\n,
+ ipu_cm_read(ipu, IPU_FS_DISP_FLOW1));
+ for (i = 0; i 15; i++)
+ dev_dbg(ipu-dev, IPU_INT_CTRL(%d) = \t%08X\n, i,
+ ipu_cm_read(ipu, IPU_INT_CTRL(i)));
+}
+EXPORT_SYMBOL_GPL(ipu_dump);
+
static int ipu_probe(struct platform_device *pdev)
{
const struct of_device_id *of_id =
diff --git a/include/video/imx-ipu-v3.h b/include/video/imx-ipu-v3.h
index 62f9c4b..1ed1062 100644
--- a/include/video/imx-ipu-v3.h
+++ b/include/video/imx-ipu-v3.h
@@ -187,6 +187,7 @@ int ipu_idmac_channel_irq(struct ipu_soc *ipu, struct
ipuv3_channel *channel,
int ipu_get_num(struct ipu_soc *ipu);
void ipu_set_csi_src_mux(struct ipu_soc *ipu, int csi_id, bool mipi_csi2);
void ipu_set_ic_src_mux(struct ipu_soc *ipu, int csi_id, bool vdi);
+void ipu_dump(struct ipu_soc *ipu);
/*
* IPU Image DMA Controller (idmac) functions
--
1.7.9.5
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[PATCH 19/28] gpu: ipu-v3: Add idmac channel linking support
Add idmac channel linking/unlinking functions for specific IPU
client use cases. The following linkings are currently needed:
- ipu_link_prp_enc_rot_enc():
Link IPUV3_CHANNEL_IC_PRP_ENC_MEM to IPUV3_CHANNEL_MEM_ROT_ENC.
- ipu_link_prpvf_rot_prpvf():
Links IPUV3_CHANNEL_IC_PRP_VF_MEM to IPUV3_CHANNEL_MEM_ROT_VF.
- ipu_link_pp_rot_pp():
Links IPUV3_CHANNEL_IC_PP_MEM to IPUV3_CHANNEL_MEM_ROT_PP.
Signed-off-by: Steve Longerbeam steve_longerb...@mentor.com
---
drivers/gpu/ipu-v3/ipu-common.c | 159 +++
drivers/gpu/ipu-v3/ipu-prv.h| 58 ++
include/video/imx-ipu-v3.h |8 ++
3 files changed, 225 insertions(+)
diff --git a/drivers/gpu/ipu-v3/ipu-common.c b/drivers/gpu/ipu-v3/ipu-common.c
index b808ee0..3f91e14 100644
--- a/drivers/gpu/ipu-v3/ipu-common.c
+++ b/drivers/gpu/ipu-v3/ipu-common.c
@@ -955,6 +955,165 @@ void ipu_idmac_clear_buffer(struct ipuv3_channel
*channel, u32 buf_num)
}
EXPORT_SYMBOL_GPL(ipu_idmac_clear_buffer);
+/*
+ * Links IPUV3_CHANNEL_IC_PRP_ENC_MEM to IPUV3_CHANNEL_MEM_ROT_ENC
+ */
+int ipu_link_prp_enc_rot_enc(struct ipu_soc *ipu)
+{
+ unsigned long flags;
+ u32 fs_proc_flow1;
+ u32 fs_proc_flow2;
+
+ spin_lock_irqsave(ipu-lock, flags);
+
+ fs_proc_flow1 = ipu_cm_read(ipu, IPU_FS_PROC_FLOW1);
+ fs_proc_flow2 = ipu_cm_read(ipu, IPU_FS_PROC_FLOW2);
+
+ fs_proc_flow1 = ~FS_PRPENC_ROT_SRC_SEL_MASK;
+ fs_proc_flow1 |= (0x07 FS_PRPENC_ROT_SRC_SEL_OFFSET);
+
+ fs_proc_flow2 = ~FS_PRPENC_DEST_SEL_MASK;
+ fs_proc_flow2 |= (0x01 FS_PRPENC_DEST_SEL_OFFSET);
+
+ ipu_cm_write(ipu, fs_proc_flow1, IPU_FS_PROC_FLOW1);
+ ipu_cm_write(ipu, fs_proc_flow2, IPU_FS_PROC_FLOW2);
+
+ spin_unlock_irqrestore(ipu-lock, flags);
+ return 0;
+}
+EXPORT_SYMBOL_GPL(ipu_link_prp_enc_rot_enc);
+
+/*
+ * Unlinks IPUV3_CHANNEL_IC_PRP_ENC_MEM from IPUV3_CHANNEL_MEM_ROT_ENC
+ */
+int ipu_unlink_prp_enc_rot_enc(struct ipu_soc *ipu)
+{
+ unsigned long flags;
+ u32 fs_proc_flow1;
+ u32 fs_proc_flow2;
+
+ spin_lock_irqsave(ipu-lock, flags);
+
+ fs_proc_flow1 = ipu_cm_read(ipu, IPU_FS_PROC_FLOW1);
+ fs_proc_flow2 = ipu_cm_read(ipu, IPU_FS_PROC_FLOW2);
+
+ fs_proc_flow1 = ~FS_PRPENC_ROT_SRC_SEL_MASK;
+ fs_proc_flow2 = ~FS_PRPENC_DEST_SEL_MASK;
+
+ ipu_cm_write(ipu, fs_proc_flow1, IPU_FS_PROC_FLOW1);
+ ipu_cm_write(ipu, fs_proc_flow2, IPU_FS_PROC_FLOW2);
+
+ spin_unlock_irqrestore(ipu-lock, flags);
+ return 0;
+}
+EXPORT_SYMBOL_GPL(ipu_unlink_prp_enc_rot_enc);
+
+/*
+ * Links IPUV3_CHANNEL_IC_PRP_VF_MEM to IPUV3_CHANNEL_MEM_ROT_VF
+ */
+int ipu_link_prpvf_rot_prpvf(struct ipu_soc *ipu)
+{
+ unsigned long flags;
+ u32 fs_proc_flow1;
+ u32 fs_proc_flow2;
+
+ spin_lock_irqsave(ipu-lock, flags);
+
+ fs_proc_flow1 = ipu_cm_read(ipu, IPU_FS_PROC_FLOW1);
+ fs_proc_flow2 = ipu_cm_read(ipu, IPU_FS_PROC_FLOW2);
+
+ fs_proc_flow1 = ~FS_PRPVF_ROT_SRC_SEL_MASK;
+ fs_proc_flow1 |= (0x08 FS_PRPVF_ROT_SRC_SEL_OFFSET);
+
+ fs_proc_flow2 = ~FS_PRPVF_DEST_SEL_MASK;
+ fs_proc_flow2 |= (0x01 FS_PRPVF_DEST_SEL_OFFSET);
+
+ ipu_cm_write(ipu, fs_proc_flow1, IPU_FS_PROC_FLOW1);
+ ipu_cm_write(ipu, fs_proc_flow2, IPU_FS_PROC_FLOW2);
+
+ spin_unlock_irqrestore(ipu-lock, flags);
+ return 0;
+}
+EXPORT_SYMBOL_GPL(ipu_link_prpvf_rot_prpvf);
+
+/*
+ * Unlinks IPUV3_CHANNEL_IC_PRP_VF_MEM from IPUV3_CHANNEL_MEM_ROT_VF
+ */
+int ipu_unlink_prpvf_rot_prpvf(struct ipu_soc *ipu)
+{
+ unsigned long flags;
+ u32 fs_proc_flow1;
+ u32 fs_proc_flow2;
+
+ spin_lock_irqsave(ipu-lock, flags);
+
+ fs_proc_flow1 = ipu_cm_read(ipu, IPU_FS_PROC_FLOW1);
+ fs_proc_flow2 = ipu_cm_read(ipu, IPU_FS_PROC_FLOW2);
+
+ fs_proc_flow1 = ~FS_PRPVF_ROT_SRC_SEL_MASK;
+ fs_proc_flow2 = ~FS_PRPVF_DEST_SEL_MASK;
+
+ ipu_cm_write(ipu, fs_proc_flow1, IPU_FS_PROC_FLOW1);
+ ipu_cm_write(ipu, fs_proc_flow2, IPU_FS_PROC_FLOW2);
+
+ spin_unlock_irqrestore(ipu-lock, flags);
+ return 0;
+}
+EXPORT_SYMBOL_GPL(ipu_unlink_prpvf_rot_prpvf);
+
+/*
+ * Links IPUV3_CHANNEL_IC_PP_MEM to IPUV3_CHANNEL_MEM_ROT_PP
+ */
+int ipu_link_pp_rot_pp(struct ipu_soc *ipu)
+{
+ unsigned long flags;
+ u32 fs_proc_flow1;
+ u32 fs_proc_flow2;
+
+ spin_lock_irqsave(ipu-lock, flags);
+
+ fs_proc_flow1 = ipu_cm_read(ipu, IPU_FS_PROC_FLOW1);
+ fs_proc_flow2 = ipu_cm_read(ipu, IPU_FS_PROC_FLOW2);
+
+ fs_proc_flow1 = ~FS_PP_ROT_SRC_SEL_MASK;
+ fs_proc_flow1 |= (0x05 FS_PP_ROT_SRC_SEL_OFFSET);
+
+ fs_proc_flow2 = ~FS_PP_DEST_SEL_MASK;
+ fs_proc_flow2 |= (0x03 FS_PP_DEST_SEL_OFFSET);
+
+ ipu_cm_write(ipu, fs_proc_flow1, IPU_FS_PROC_FLOW1);
+ ipu_cm_write(ipu, fs_proc_flow2, IPU_FS_PROC_FLOW2);
+
+ spin_unlock_irqrestore(ipu-lock, flags);
+ return 0;
+}
[PATCH 26/28] gpu: ipu-v3: Add more planar formats support
Adds support for the following planar and partial-planar formats:
YUV422
NV12
NV21
NV16
NV61
Signed-off-by: Dmitry Eremin-Solenikov dmitry_ere...@mentor.com
Signed-off-by: Mohsin Kazmi mohsin_ka...@mentor.com
Signed-off-by: Steve Longerbeam steve_longerb...@mentor.com
---
drivers/gpu/ipu-v3/ipu-common.c | 21 ++
drivers/gpu/ipu-v3/ipu-cpmem.c | 146 +--
2 files changed, 161 insertions(+), 6 deletions(-)
diff --git a/drivers/gpu/ipu-v3/ipu-common.c b/drivers/gpu/ipu-v3/ipu-common.c
index 81930f3..115572e 100644
--- a/drivers/gpu/ipu-v3/ipu-common.c
+++ b/drivers/gpu/ipu-v3/ipu-common.c
@@ -80,6 +80,12 @@ enum ipu_color_space ipu_drm_fourcc_to_colorspace(u32
drm_fourcc)
case DRM_FORMAT_UYVY:
case DRM_FORMAT_YUV420:
case DRM_FORMAT_YVU420:
+ case DRM_FORMAT_YUV422:
+ case DRM_FORMAT_YVU422:
+ case DRM_FORMAT_NV12:
+ case DRM_FORMAT_NV21:
+ case DRM_FORMAT_NV16:
+ case DRM_FORMAT_NV61:
return IPUV3_COLORSPACE_YUV;
default:
return IPUV3_COLORSPACE_UNKNOWN;
@@ -92,8 +98,13 @@ enum ipu_color_space ipu_pixelformat_to_colorspace(u32
pixelformat)
switch (pixelformat) {
case V4L2_PIX_FMT_YUV420:
case V4L2_PIX_FMT_YVU420:
+ case V4L2_PIX_FMT_YUV422P:
case V4L2_PIX_FMT_UYVY:
case V4L2_PIX_FMT_YUYV:
+ case V4L2_PIX_FMT_NV12:
+ case V4L2_PIX_FMT_NV21:
+ case V4L2_PIX_FMT_NV16:
+ case V4L2_PIX_FMT_NV61:
return IPUV3_COLORSPACE_YUV;
case V4L2_PIX_FMT_RGB32:
case V4L2_PIX_FMT_BGR32:
@@ -112,6 +123,11 @@ bool ipu_pixelformat_is_planar(u32 pixelformat)
switch (pixelformat) {
case V4L2_PIX_FMT_YUV420:
case V4L2_PIX_FMT_YVU420:
+ case V4L2_PIX_FMT_YUV422P:
+ case V4L2_PIX_FMT_NV12:
+ case V4L2_PIX_FMT_NV21:
+ case V4L2_PIX_FMT_NV16:
+ case V4L2_PIX_FMT_NV61:
return true;
}
@@ -137,6 +153,11 @@ int ipu_stride_to_bytes(u32 pixel_stride, u32 pixelformat)
switch (pixelformat) {
case V4L2_PIX_FMT_YUV420:
case V4L2_PIX_FMT_YVU420:
+ case V4L2_PIX_FMT_YUV422P:
+ case V4L2_PIX_FMT_NV12:
+ case V4L2_PIX_FMT_NV21:
+ case V4L2_PIX_FMT_NV16:
+ case V4L2_PIX_FMT_NV61:
/*
* for the planar YUV formats, the stride passed to
* cpmem must be the stride in bytes of the Y plane.
diff --git a/drivers/gpu/ipu-v3/ipu-cpmem.c b/drivers/gpu/ipu-v3/ipu-cpmem.c
index cfe2f53..45a014e 100644
--- a/drivers/gpu/ipu-v3/ipu-cpmem.c
+++ b/drivers/gpu/ipu-v3/ipu-cpmem.c
@@ -193,8 +193,18 @@ static int v4l2_pix_fmt_to_drm_fourcc(u32 pixelformat)
return DRM_FORMAT_YUYV;
case V4L2_PIX_FMT_YUV420:
return DRM_FORMAT_YUV420;
+ case V4L2_PIX_FMT_YUV422P:
+ return DRM_FORMAT_YUV422;
case V4L2_PIX_FMT_YVU420:
return DRM_FORMAT_YVU420;
+ case V4L2_PIX_FMT_NV12:
+ return DRM_FORMAT_NV12;
+ case V4L2_PIX_FMT_NV21:
+ return DRM_FORMAT_NV21;
+ case V4L2_PIX_FMT_NV16:
+ return DRM_FORMAT_NV16;
+ case V4L2_PIX_FMT_NV61:
+ return DRM_FORMAT_NV61;
}
return -EINVAL;
@@ -394,6 +404,7 @@ void ipu_cpmem_set_yuv_planar_full(struct ipuv3_channel *ch,
{
switch (pixel_format) {
case V4L2_PIX_FMT_YUV420:
+ case V4L2_PIX_FMT_YUV422P:
ipu_ch_param_write_field(ch, IPU_FIELD_SLUV, (stride / 2) - 1);
ipu_ch_param_write_field(ch, IPU_FIELD_UBO, u_offset / 8);
ipu_ch_param_write_field(ch, IPU_FIELD_VBO, v_offset / 8);
@@ -403,6 +414,18 @@ void ipu_cpmem_set_yuv_planar_full(struct ipuv3_channel
*ch,
ipu_ch_param_write_field(ch, IPU_FIELD_UBO, v_offset / 8);
ipu_ch_param_write_field(ch, IPU_FIELD_VBO, u_offset / 8);
break;
+ case V4L2_PIX_FMT_NV12:
+ case V4L2_PIX_FMT_NV16:
+ ipu_ch_param_write_field(ch, IPU_FIELD_SLUV, stride - 1);
+ ipu_ch_param_write_field(ch, IPU_FIELD_UBO, u_offset / 8);
+ ipu_ch_param_write_field(ch, IPU_FIELD_VBO, u_offset / 8);
+ break;
+ case V4L2_PIX_FMT_NV21:
+ case V4L2_PIX_FMT_NV61:
+ ipu_ch_param_write_field(ch, IPU_FIELD_SLUV, stride - 1);
+ ipu_ch_param_write_field(ch, IPU_FIELD_UBO, v_offset / 8);
+ ipu_ch_param_write_field(ch, IPU_FIELD_VBO, v_offset / 8);
+ break;
}
}
EXPORT_SYMBOL_GPL(ipu_cpmem_set_yuv_planar_full);
@@ -422,6 +445,25 @@ void ipu_cpmem_set_yuv_planar(struct ipuv3_channel *ch,
ipu_cpmem_set_yuv_planar_full(ch, pixel_format, stride,
u_offset, v_offset);
break;
+ case V4L2_PIX_FMT_YUV422P:
+
[PATCH 22/28] gpu: ipu-cpmem: Add ipu_cpmem_set_block_mode()
Adds ipu_cpmem_set_block_mode().
Signed-off-by: Steve Longerbeam steve_longerb...@mentor.com
---
drivers/gpu/ipu-v3/ipu-cpmem.c |6 ++
include/video/imx-ipu-v3.h |1 +
2 files changed, 7 insertions(+)
diff --git a/drivers/gpu/ipu-v3/ipu-cpmem.c b/drivers/gpu/ipu-v3/ipu-cpmem.c
index 7adfa78..28adf39 100644
--- a/drivers/gpu/ipu-v3/ipu-cpmem.c
+++ b/drivers/gpu/ipu-v3/ipu-cpmem.c
@@ -260,6 +260,12 @@ void ipu_cpmem_set_burstsize(struct ipuv3_channel *ch, int
burstsize)
};
EXPORT_SYMBOL_GPL(ipu_cpmem_set_burstsize);
+void ipu_cpmem_set_block_mode(struct ipuv3_channel *ch)
+{
+ ipu_ch_param_write_field(ch, IPU_FIELD_BM, 1);
+}
+EXPORT_SYMBOL_GPL(ipu_cpmem_set_block_mode);
+
int ipu_cpmem_set_format_rgb(struct ipuv3_channel *ch,
const struct ipu_rgb *rgb)
{
diff --git a/include/video/imx-ipu-v3.h b/include/video/imx-ipu-v3.h
index a86a98a..6146bc7 100644
--- a/include/video/imx-ipu-v3.h
+++ b/include/video/imx-ipu-v3.h
@@ -231,6 +231,7 @@ void ipu_cpmem_set_high_priority(struct ipuv3_channel *ch);
void ipu_cpmem_set_buffer(struct ipuv3_channel *ch, int bufnum, dma_addr_t
buf);
void ipu_cpmem_interlaced_scan(struct ipuv3_channel *ch, int stride);
void ipu_cpmem_set_burstsize(struct ipuv3_channel *ch, int burstsize);
+void ipu_cpmem_set_block_mode(struct ipuv3_channel *ch);
int ipu_cpmem_set_format_rgb(struct ipuv3_channel *ch,
const struct ipu_rgb *rgb);
int ipu_cpmem_set_format_passthrough(struct ipuv3_channel *ch, int width);
--
1.7.9.5
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[PATCH 27/28] gpu: ipu-cpmem: Add ipu_cpmem_dump()
Adds ipu_cpmem_dump() which dumps a channel's cpmem to debug.
Signed-off-by: Steve Longerbeam steve_longerb...@mentor.com
---
drivers/gpu/ipu-v3/ipu-cpmem.c | 63
include/video/imx-ipu-v3.h |1 +
2 files changed, 64 insertions(+)
diff --git a/drivers/gpu/ipu-v3/ipu-cpmem.c b/drivers/gpu/ipu-v3/ipu-cpmem.c
index 45a014e..5cb36d3 100644
--- a/drivers/gpu/ipu-v3/ipu-cpmem.c
+++ b/drivers/gpu/ipu-v3/ipu-cpmem.c
@@ -727,6 +727,69 @@ int ipu_cpmem_set_image(struct ipuv3_channel *ch, struct
ipu_image *image)
}
EXPORT_SYMBOL_GPL(ipu_cpmem_set_image);
+void ipu_cpmem_dump(struct ipuv3_channel *ch)
+{
+ struct ipu_ch_param __iomem *p = ipu_get_cpmem(ch);
+ struct ipu_soc *ipu = ch-ipu;
+ int chno = ch-num;
+
+ dev_dbg(ipu-dev, ch %d word 0 - %08X %08X %08X %08X %08X\n, chno,
+ readl(p-word[0].data[0]),
+ readl(p-word[0].data[1]),
+ readl(p-word[0].data[2]),
+ readl(p-word[0].data[3]),
+ readl(p-word[0].data[4]));
+ dev_dbg(ipu-dev, ch %d word 1 - %08X %08X %08X %08X %08X\n, chno,
+ readl(p-word[1].data[0]),
+ readl(p-word[1].data[1]),
+ readl(p-word[1].data[2]),
+ readl(p-word[1].data[3]),
+ readl(p-word[1].data[4]));
+ dev_dbg(ipu-dev, PFS 0x%x, ,
+ipu_ch_param_read_field(ch, IPU_FIELD_PFS));
+ dev_dbg(ipu-dev, BPP 0x%x, ,
+ ipu_ch_param_read_field(ch, IPU_FIELD_BPP));
+ dev_dbg(ipu-dev, NPB 0x%x\n,
+ipu_ch_param_read_field(ch, IPU_FIELD_NPB));
+
+ dev_dbg(ipu-dev, FW %d, ,
+ipu_ch_param_read_field(ch, IPU_FIELD_FW));
+ dev_dbg(ipu-dev, FH %d, ,
+ipu_ch_param_read_field(ch, IPU_FIELD_FH));
+ dev_dbg(ipu-dev, EBA0 0x%x\n,
+ipu_ch_param_read_field(ch, IPU_FIELD_EBA0) 3);
+ dev_dbg(ipu-dev, EBA1 0x%x\n,
+ipu_ch_param_read_field(ch, IPU_FIELD_EBA1) 3);
+ dev_dbg(ipu-dev, Stride %d\n,
+ipu_ch_param_read_field(ch, IPU_FIELD_SL));
+ dev_dbg(ipu-dev, scan_order %d\n,
+ipu_ch_param_read_field(ch, IPU_FIELD_SO));
+ dev_dbg(ipu-dev, uv_stride %d\n,
+ipu_ch_param_read_field(ch, IPU_FIELD_SLUV));
+ dev_dbg(ipu-dev, u_offset 0x%x\n,
+ipu_ch_param_read_field(ch, IPU_FIELD_UBO) 3);
+ dev_dbg(ipu-dev, v_offset 0x%x\n,
+ipu_ch_param_read_field(ch, IPU_FIELD_VBO) 3);
+
+ dev_dbg(ipu-dev, Width0 %d+1, ,
+ipu_ch_param_read_field(ch, IPU_FIELD_WID0));
+ dev_dbg(ipu-dev, Width1 %d+1, ,
+ipu_ch_param_read_field(ch, IPU_FIELD_WID1));
+ dev_dbg(ipu-dev, Width2 %d+1, ,
+ipu_ch_param_read_field(ch, IPU_FIELD_WID2));
+ dev_dbg(ipu-dev, Width3 %d+1, ,
+ipu_ch_param_read_field(ch, IPU_FIELD_WID3));
+ dev_dbg(ipu-dev, Offset0 %d, ,
+ipu_ch_param_read_field(ch, IPU_FIELD_OFS0));
+ dev_dbg(ipu-dev, Offset1 %d, ,
+ipu_ch_param_read_field(ch, IPU_FIELD_OFS1));
+ dev_dbg(ipu-dev, Offset2 %d, ,
+ipu_ch_param_read_field(ch, IPU_FIELD_OFS2));
+ dev_dbg(ipu-dev, Offset3 %d\n,
+ipu_ch_param_read_field(ch, IPU_FIELD_OFS3));
+}
+EXPORT_SYMBOL_GPL(ipu_cpmem_dump);
+
int ipu_cpmem_init(struct ipu_soc *ipu, struct device *dev, unsigned long base)
{
struct ipu_cpmem *cpmem;
diff --git a/include/video/imx-ipu-v3.h b/include/video/imx-ipu-v3.h
index 542652f..62f9c4b 100644
--- a/include/video/imx-ipu-v3.h
+++ b/include/video/imx-ipu-v3.h
@@ -247,6 +247,7 @@ void ipu_cpmem_set_yuv_planar(struct ipuv3_channel *ch,
u32 pixel_format, int stride, int height);
int ipu_cpmem_set_fmt(struct ipuv3_channel *ch, u32 drm_fourcc);
int ipu_cpmem_set_image(struct ipuv3_channel *ch, struct ipu_image *image);
+void ipu_cpmem_dump(struct ipuv3_channel *ch);
/* Channel linking functions */
int ipu_link_prp_enc_rot_enc(struct ipu_soc *ipu);
--
1.7.9.5
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[PATCH 06/28] gpu: ipu-v3: smfc: Move enable/disable to ipu-smfc.c
Signed-off-by: Steve Longerbeam steve_longerb...@mentor.com
---
drivers/gpu/ipu-v3/ipu-common.c | 12
drivers/gpu/ipu-v3/ipu-smfc.c | 12
2 files changed, 12 insertions(+), 12 deletions(-)
diff --git a/drivers/gpu/ipu-v3/ipu-common.c b/drivers/gpu/ipu-v3/ipu-common.c
index 0ac2103..85220ae 100644
--- a/drivers/gpu/ipu-v3/ipu-common.c
+++ b/drivers/gpu/ipu-v3/ipu-common.c
@@ -667,18 +667,6 @@ int ipu_module_disable(struct ipu_soc *ipu, u32 mask)
}
EXPORT_SYMBOL_GPL(ipu_module_disable);
-int ipu_smfc_enable(struct ipu_soc *ipu)
-{
- return ipu_module_enable(ipu, IPU_CONF_SMFC_EN);
-}
-EXPORT_SYMBOL_GPL(ipu_smfc_enable);
-
-int ipu_smfc_disable(struct ipu_soc *ipu)
-{
- return ipu_module_disable(ipu, IPU_CONF_SMFC_EN);
-}
-EXPORT_SYMBOL_GPL(ipu_smfc_disable);
-
int ipu_idmac_get_current_buffer(struct ipuv3_channel *channel)
{
struct ipu_soc *ipu = channel-ipu;
diff --git a/drivers/gpu/ipu-v3/ipu-smfc.c b/drivers/gpu/ipu-v3/ipu-smfc.c
index e4f85ad..87ac624d 100644
--- a/drivers/gpu/ipu-v3/ipu-smfc.c
+++ b/drivers/gpu/ipu-v3/ipu-smfc.c
@@ -71,6 +71,18 @@ int ipu_smfc_map_channel(struct ipu_soc *ipu, int channel,
int csi_id, int mipi_
}
EXPORT_SYMBOL_GPL(ipu_smfc_map_channel);
+int ipu_smfc_enable(struct ipu_soc *ipu)
+{
+ return ipu_module_enable(ipu, IPU_CONF_SMFC_EN);
+}
+EXPORT_SYMBOL_GPL(ipu_smfc_enable);
+
+int ipu_smfc_disable(struct ipu_soc *ipu)
+{
+ return ipu_module_disable(ipu, IPU_CONF_SMFC_EN);
+}
+EXPORT_SYMBOL_GPL(ipu_smfc_disable);
+
int ipu_smfc_init(struct ipu_soc *ipu, struct device *dev,
unsigned long base)
{
--
1.7.9.5
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[PATCH 09/28] gpu: ipu-v3: Add ipu_mbus_code_to_colorspace()
Add ipu_mbus_code_to_colorspace() to find ipu_color_space from a
media bus pixel format code.
Signed-off-by: Steve Longerbeam steve_longerb...@mentor.com
---
drivers/gpu/ipu-v3/ipu-common.c | 13 +
include/video/imx-ipu-v3.h |1 +
2 files changed, 14 insertions(+)
diff --git a/drivers/gpu/ipu-v3/ipu-common.c b/drivers/gpu/ipu-v3/ipu-common.c
index 85220ae..579f03c 100644
--- a/drivers/gpu/ipu-v3/ipu-common.c
+++ b/drivers/gpu/ipu-v3/ipu-common.c
@@ -551,6 +551,19 @@ enum ipu_color_space ipu_pixelformat_to_colorspace(u32
pixelformat)
}
EXPORT_SYMBOL_GPL(ipu_pixelformat_to_colorspace);
+enum ipu_color_space ipu_mbus_code_to_colorspace(u32 mbus_code)
+{
+ switch (mbus_code 0xf000) {
+ case 0x1000:
+ return IPUV3_COLORSPACE_RGB;
+ case 0x2000:
+ return IPUV3_COLORSPACE_YUV;
+ default:
+ return IPUV3_COLORSPACE_UNKNOWN;
+ }
+}
+EXPORT_SYMBOL_GPL(ipu_mbus_code_to_colorspace);
+
struct ipuv3_channel *ipu_idmac_get(struct ipu_soc *ipu, unsigned num)
{
struct ipuv3_channel *channel;
diff --git a/include/video/imx-ipu-v3.h b/include/video/imx-ipu-v3.h
index e69b247..91aeb65 100644
--- a/include/video/imx-ipu-v3.h
+++ b/include/video/imx-ipu-v3.h
@@ -447,6 +447,7 @@ int ipu_cpmem_set_image(struct ipu_ch_param __iomem *cpmem,
enum ipu_color_space ipu_drm_fourcc_to_colorspace(u32 drm_fourcc);
enum ipu_color_space ipu_pixelformat_to_colorspace(u32 pixelformat);
+enum ipu_color_space ipu_mbus_code_to_colorspace(u32 mbus_code);
static inline void ipu_cpmem_set_burstsize(struct ipu_ch_param __iomem *p,
int burstsize)
--
1.7.9.5
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[PATCH 11/28] gpu: ipu-v3: Add helper function checking if pixfmt is planar
Add simple helper function returning true if passed pixel format is one
of supported planar ones.
Signed-off-by: Dmitry Eremin-Solenikov dmitry_ere...@mentor.com
---
drivers/gpu/ipu-v3/ipu-common.c | 12
include/video/imx-ipu-v3.h |1 +
2 files changed, 13 insertions(+)
diff --git a/drivers/gpu/ipu-v3/ipu-common.c b/drivers/gpu/ipu-v3/ipu-common.c
index d472b27..909ef71 100644
--- a/drivers/gpu/ipu-v3/ipu-common.c
+++ b/drivers/gpu/ipu-v3/ipu-common.c
@@ -551,6 +551,18 @@ enum ipu_color_space ipu_pixelformat_to_colorspace(u32
pixelformat)
}
EXPORT_SYMBOL_GPL(ipu_pixelformat_to_colorspace);
+bool ipu_pixelformat_is_planar(u32 pixelformat)
+{
+ switch (pixelformat) {
+ case V4L2_PIX_FMT_YUV420:
+ case V4L2_PIX_FMT_YVU420:
+ return true;
+ }
+
+ return false;
+}
+EXPORT_SYMBOL_GPL(ipu_pixelformat_is_planar);
+
enum ipu_color_space ipu_mbus_code_to_colorspace(u32 mbus_code)
{
switch (mbus_code 0xf000) {
diff --git a/include/video/imx-ipu-v3.h b/include/video/imx-ipu-v3.h
index 99cf370..20776cf 100644
--- a/include/video/imx-ipu-v3.h
+++ b/include/video/imx-ipu-v3.h
@@ -448,6 +448,7 @@ int ipu_cpmem_set_image(struct ipu_ch_param __iomem *cpmem,
enum ipu_color_space ipu_drm_fourcc_to_colorspace(u32 drm_fourcc);
enum ipu_color_space ipu_pixelformat_to_colorspace(u32 pixelformat);
enum ipu_color_space ipu_mbus_code_to_colorspace(u32 mbus_code);
+bool ipu_pixelformat_is_planar(u32 pixelformat);
int ipu_degrees_to_rot_mode(enum ipu_rotate_mode *mode, int degrees,
bool hflip, bool vflip);
int ipu_rot_mode_to_degrees(int *degrees, enum ipu_rotate_mode mode,
--
1.7.9.5
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[PATCH 03/28] gpu: ipu-v3: Add functions to set CSI/IC source muxes
Adds two new functions, ipu_set_csi_src_mux() and ipu_set_ic_src_mux(),
that select the inputs to the CSI and IC respectively. Both muxes are
programmed in the IPU_CONF register.
Signed-off-by: Steve Longerbeam steve_longerb...@mentor.com
---
drivers/gpu/ipu-v3/ipu-common.c | 51 +++
include/video/imx-ipu-v3.h |2 ++
2 files changed, 53 insertions(+)
diff --git a/drivers/gpu/ipu-v3/ipu-common.c b/drivers/gpu/ipu-v3/ipu-common.c
index a92f48b..1155eb9 100644
--- a/drivers/gpu/ipu-v3/ipu-common.c
+++ b/drivers/gpu/ipu-v3/ipu-common.c
@@ -832,6 +832,57 @@ static int ipu_memory_reset(struct ipu_soc *ipu)
return 0;
}
+/*
+ * Set the source mux for the given CSI. Selects either parallel or
+ * MIPI CSI2 sources.
+ */
+void ipu_set_csi_src_mux(struct ipu_soc *ipu, int csi_id, bool mipi_csi2)
+{
+ unsigned long flags;
+ u32 val, mask;
+
+ mask = (csi_id == 1) ? IPU_CONF_CSI1_DATA_SOURCE :
+ IPU_CONF_CSI0_DATA_SOURCE;
+
+ spin_lock_irqsave(ipu-lock, flags);
+
+ val = ipu_cm_read(ipu, IPU_CONF);
+ if (mipi_csi2)
+ val |= mask;
+ else
+ val = ~mask;
+ ipu_cm_write(ipu, val, IPU_CONF);
+
+ spin_unlock_irqrestore(ipu-lock, flags);
+}
+EXPORT_SYMBOL_GPL(ipu_set_csi_src_mux);
+
+/*
+ * Set the source mux for the IC. Selects either CSI[01] or the VDI.
+ */
+void ipu_set_ic_src_mux(struct ipu_soc *ipu, int csi_id, bool vdi)
+{
+ unsigned long flags;
+ u32 val;
+
+ spin_lock_irqsave(ipu-lock, flags);
+
+ val = ipu_cm_read(ipu, IPU_CONF);
+ if (vdi) {
+ val |= IPU_CONF_IC_INPUT;
+ } else {
+ val = ~IPU_CONF_IC_INPUT;
+ if (csi_id == 1)
+ val |= IPU_CONF_CSI_SEL;
+ else
+ val = ~IPU_CONF_CSI_SEL;
+ }
+ ipu_cm_write(ipu, val, IPU_CONF);
+
+ spin_unlock_irqrestore(ipu-lock, flags);
+}
+EXPORT_SYMBOL_GPL(ipu_set_ic_src_mux);
+
struct ipu_devtype {
const char *name;
unsigned long cm_ofs;
diff --git a/include/video/imx-ipu-v3.h b/include/video/imx-ipu-v3.h
index 739d204..52fa277 100644
--- a/include/video/imx-ipu-v3.h
+++ b/include/video/imx-ipu-v3.h
@@ -96,6 +96,8 @@ int ipu_idmac_channel_irq(struct ipu_soc *ipu, struct
ipuv3_channel *channel,
* IPU Common functions
*/
int ipu_get_num(struct ipu_soc *ipu);
+void ipu_set_csi_src_mux(struct ipu_soc *ipu, int csi_id, bool mipi_csi2);
+void ipu_set_ic_src_mux(struct ipu_soc *ipu, int csi_id, bool vdi);
/*
* IPU Image DMA Controller (idmac) functions
--
1.7.9.5
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[PATCH 10/28] gpu: ipu-v3: Add rotation mode conversion utilities
Add two functions:
- ipu_degrees_to_rot_mode(): converts a degrees, hflip, and vflip setting
to an IPU rotation mode.
- ipu_rot_mode_to_degrees(): converts an IPU rotation mode with given hflip
and vflip settings to degrees.
Signed-off-by: Steve Longerbeam steve_longerb...@mentor.com
---
drivers/gpu/ipu-v3/ipu-common.c | 64 +++
include/video/imx-ipu-v3.h |4 +++
2 files changed, 68 insertions(+)
diff --git a/drivers/gpu/ipu-v3/ipu-common.c b/drivers/gpu/ipu-v3/ipu-common.c
index 579f03c..d472b27 100644
--- a/drivers/gpu/ipu-v3/ipu-common.c
+++ b/drivers/gpu/ipu-v3/ipu-common.c
@@ -564,6 +564,70 @@ enum ipu_color_space ipu_mbus_code_to_colorspace(u32
mbus_code)
}
EXPORT_SYMBOL_GPL(ipu_mbus_code_to_colorspace);
+int ipu_degrees_to_rot_mode(enum ipu_rotate_mode *mode, int degrees,
+ bool hflip, bool vflip)
+{
+ u32 r90, vf, hf;
+
+ switch (degrees) {
+ case 0:
+ vf = hf = r90 = 0;
+ break;
+ case 90:
+ vf = hf = 0;
+ r90 = 1;
+ break;
+ case 180:
+ vf = hf = 1;
+ r90 = 0;
+ break;
+ case 270:
+ vf = hf = r90 = 1;
+ break;
+ default:
+ return -EINVAL;
+ }
+
+ hf ^= (u32)hflip;
+ vf ^= (u32)vflip;
+
+ *mode = (enum ipu_rotate_mode)((r90 2) | (hf 1) | vf);
+ return 0;
+}
+EXPORT_SYMBOL_GPL(ipu_degrees_to_rot_mode);
+
+int ipu_rot_mode_to_degrees(int *degrees, enum ipu_rotate_mode mode,
+ bool hflip, bool vflip)
+{
+ u32 r90, vf, hf;
+
+ r90 = ((u32)mode 2) 0x1;
+ hf = ((u32)mode 1) 0x1;
+ vf = ((u32)mode 0) 0x1;
+ hf ^= (u32)hflip;
+ vf ^= (u32)vflip;
+
+ switch ((enum ipu_rotate_mode)((r90 2) | (hf 1) | vf)) {
+ case IPU_ROTATE_NONE:
+ *degrees = 0;
+ break;
+ case IPU_ROTATE_90_RIGHT:
+ *degrees = 90;
+ break;
+ case IPU_ROTATE_180:
+ *degrees = 180;
+ break;
+ case IPU_ROTATE_90_LEFT:
+ *degrees = 270;
+ break;
+ default:
+ return -EINVAL;
+ }
+
+ return 0;
+}
+EXPORT_SYMBOL_GPL(ipu_rot_mode_to_degrees);
+
struct ipuv3_channel *ipu_idmac_get(struct ipu_soc *ipu, unsigned num)
{
struct ipuv3_channel *channel;
diff --git a/include/video/imx-ipu-v3.h b/include/video/imx-ipu-v3.h
index 91aeb65..99cf370 100644
--- a/include/video/imx-ipu-v3.h
+++ b/include/video/imx-ipu-v3.h
@@ -448,6 +448,10 @@ int ipu_cpmem_set_image(struct ipu_ch_param __iomem *cpmem,
enum ipu_color_space ipu_drm_fourcc_to_colorspace(u32 drm_fourcc);
enum ipu_color_space ipu_pixelformat_to_colorspace(u32 pixelformat);
enum ipu_color_space ipu_mbus_code_to_colorspace(u32 mbus_code);
+int ipu_degrees_to_rot_mode(enum ipu_rotate_mode *mode, int degrees,
+ bool hflip, bool vflip);
+int ipu_rot_mode_to_degrees(int *degrees, enum ipu_rotate_mode mode,
+ bool hflip, bool vflip);
static inline void ipu_cpmem_set_burstsize(struct ipu_ch_param __iomem *p,
int burstsize)
--
1.7.9.5
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[PATCH 24/28] gpu: ipu-cpmem: Add ipu_cpmem_set_rotation()
Adds ipu_cpmem_set_rotation().
Signed-off-by: Steve Longerbeam steve_longerb...@mentor.com
---
drivers/gpu/ipu-v3/ipu-cpmem.c | 10 ++
include/video/imx-ipu-v3.h |2 ++
2 files changed, 12 insertions(+)
diff --git a/drivers/gpu/ipu-v3/ipu-cpmem.c b/drivers/gpu/ipu-v3/ipu-cpmem.c
index 2d1b376..f52e4b4 100644
--- a/drivers/gpu/ipu-v3/ipu-cpmem.c
+++ b/drivers/gpu/ipu-v3/ipu-cpmem.c
@@ -64,6 +64,7 @@ struct ipu_cpmem {
#define IPU_FIELD_BNDM IPU_CPMEM_WORD(0, 114, 3)
#define IPU_FIELD_BM IPU_CPMEM_WORD(0, 117, 2)
#define IPU_FIELD_ROT IPU_CPMEM_WORD(0, 119, 1)
+#define IPU_FIELD_ROT_HF_VFIPU_CPMEM_WORD(0, 119, 3)
#define IPU_FIELD_HF IPU_CPMEM_WORD(0, 120, 1)
#define IPU_FIELD_VF IPU_CPMEM_WORD(0, 121, 1)
#define IPU_FIELD_THE IPU_CPMEM_WORD(0, 122, 1)
@@ -273,6 +274,15 @@ void ipu_cpmem_set_block_mode(struct ipuv3_channel *ch)
}
EXPORT_SYMBOL_GPL(ipu_cpmem_set_block_mode);
+void ipu_cpmem_set_rotation(struct ipuv3_channel *ch,
+ enum ipu_rotate_mode rot)
+{
+ u32 temp_rot = bitrev8(rot) 5;
+
+ ipu_ch_param_write_field(ch, IPU_FIELD_ROT_HF_VF, temp_rot);
+}
+EXPORT_SYMBOL_GPL(ipu_cpmem_set_rotation);
+
int ipu_cpmem_set_format_rgb(struct ipuv3_channel *ch,
const struct ipu_rgb *rgb)
{
diff --git a/include/video/imx-ipu-v3.h b/include/video/imx-ipu-v3.h
index 066b10d..3d3cea0 100644
--- a/include/video/imx-ipu-v3.h
+++ b/include/video/imx-ipu-v3.h
@@ -233,6 +233,8 @@ void ipu_cpmem_interlaced_scan(struct ipuv3_channel *ch,
int stride);
void ipu_cpmem_set_axi_id(struct ipuv3_channel *ch, u32 id);
void ipu_cpmem_set_burstsize(struct ipuv3_channel *ch, int burstsize);
void ipu_cpmem_set_block_mode(struct ipuv3_channel *ch);
+void ipu_cpmem_set_rotation(struct ipuv3_channel *ch,
+ enum ipu_rotate_mode rot);
int ipu_cpmem_set_format_rgb(struct ipuv3_channel *ch,
const struct ipu_rgb *rgb);
int ipu_cpmem_set_format_passthrough(struct ipuv3_channel *ch, int width);
--
1.7.9.5
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[PATCH 20/28] gpu: ipu-v3: Add ipu-cpmem unit
Move channel parameter memory setup functions and macros into a new
submodule ipu-cpmem. In the process, cleanup arguments to the functions
to take a channel pointer instead of a pointer into cpmem for that
channel. That allows the structure of the parameter memory to be
private to ipu-cpmem.c.
Signed-off-by: Steve Longerbeam steve_longerb...@mentor.com
---
drivers/gpu/ipu-v3/Makefile |4 +-
drivers/gpu/ipu-v3/ipu-common.c | 457 +-
drivers/gpu/ipu-v3/ipu-cpmem.c | 597 +++
drivers/gpu/ipu-v3/ipu-prv.h| 14 +-
include/video/imx-ipu-v3.h | 188 +++-
5 files changed, 658 insertions(+), 602 deletions(-)
create mode 100644 drivers/gpu/ipu-v3/ipu-cpmem.c
diff --git a/drivers/gpu/ipu-v3/Makefile b/drivers/gpu/ipu-v3/Makefile
index 830804f..107ec23 100644
--- a/drivers/gpu/ipu-v3/Makefile
+++ b/drivers/gpu/ipu-v3/Makefile
@@ -1,4 +1,4 @@
obj-$(CONFIG_IMX_IPUV3_CORE) += imx-ipu-v3.o
-imx-ipu-v3-objs := ipu-common.o ipu-csi.o ipu-dc.o ipu-di.o ipu-dp.o \
- ipu-dmfc.o ipu-ic.o ipu-smfc.o
+imx-ipu-v3-objs := ipu-common.o ipu-cpmem.o ipu-csi.o ipu-dc.o ipu-di.o \
+ ipu-dp.o ipu-dmfc.o ipu-ic.o ipu-smfc.o
diff --git a/drivers/gpu/ipu-v3/ipu-common.c b/drivers/gpu/ipu-v3/ipu-common.c
index 3f91e14..81930f3 100644
--- a/drivers/gpu/ipu-v3/ipu-common.c
+++ b/drivers/gpu/ipu-v3/ipu-common.c
@@ -44,17 +44,6 @@ static inline void ipu_cm_write(struct ipu_soc *ipu, u32
value, unsigned offset)
writel(value, ipu-cm_reg + offset);
}
-static inline u32 ipu_idmac_read(struct ipu_soc *ipu, unsigned offset)
-{
- return readl(ipu-idmac_reg + offset);
-}
-
-static inline void ipu_idmac_write(struct ipu_soc *ipu, u32 value,
- unsigned offset)
-{
- writel(value, ipu-idmac_reg + offset);
-}
-
int ipu_get_num(struct ipu_soc *ipu)
{
return ipu-id;
@@ -71,379 +60,6 @@ void ipu_srm_dp_sync_update(struct ipu_soc *ipu)
}
EXPORT_SYMBOL_GPL(ipu_srm_dp_sync_update);
-struct ipu_ch_param __iomem *ipu_get_cpmem(struct ipuv3_channel *channel)
-{
- struct ipu_soc *ipu = channel-ipu;
-
- return ipu-cpmem_base + channel-num;
-}
-EXPORT_SYMBOL_GPL(ipu_get_cpmem);
-
-void ipu_cpmem_set_high_priority(struct ipuv3_channel *channel)
-{
- struct ipu_soc *ipu = channel-ipu;
- struct ipu_ch_param __iomem *p = ipu_get_cpmem(channel);
- u32 val;
-
- if (ipu-ipu_type == IPUV3EX)
- ipu_ch_param_write_field(p, IPU_FIELD_ID, 1);
-
- val = ipu_idmac_read(ipu, IDMAC_CHA_PRI(channel-num));
- val |= 1 (channel-num % 32);
- ipu_idmac_write(ipu, val, IDMAC_CHA_PRI(channel-num));
-};
-EXPORT_SYMBOL_GPL(ipu_cpmem_set_high_priority);
-
-void ipu_ch_param_write_field(struct ipu_ch_param __iomem *base, u32 wbs, u32
v)
-{
- u32 bit = (wbs 8) % 160;
- u32 size = wbs 0xff;
- u32 word = (wbs 8) / 160;
- u32 i = bit / 32;
- u32 ofs = bit % 32;
- u32 mask = (1 size) - 1;
- u32 val;
-
- pr_debug(%s %d %d %d\n, __func__, word, bit , size);
-
- val = readl(base-word[word].data[i]);
- val = ~(mask ofs);
- val |= v ofs;
- writel(val, base-word[word].data[i]);
-
- if ((bit + size - 1) / 32 i) {
- val = readl(base-word[word].data[i + 1]);
- val = ~(mask (ofs ? (32 - ofs) : 0));
- val |= v (ofs ? (32 - ofs) : 0);
- writel(val, base-word[word].data[i + 1]);
- }
-}
-EXPORT_SYMBOL_GPL(ipu_ch_param_write_field);
-
-u32 ipu_ch_param_read_field(struct ipu_ch_param __iomem *base, u32 wbs)
-{
- u32 bit = (wbs 8) % 160;
- u32 size = wbs 0xff;
- u32 word = (wbs 8) / 160;
- u32 i = bit / 32;
- u32 ofs = bit % 32;
- u32 mask = (1 size) - 1;
- u32 val = 0;
-
- pr_debug(%s %d %d %d\n, __func__, word, bit , size);
-
- val = (readl(base-word[word].data[i]) ofs) mask;
-
- if ((bit + size - 1) / 32 i) {
- u32 tmp;
- tmp = readl(base-word[word].data[i + 1]);
- tmp = mask (ofs ? (32 - ofs) : 0);
- val |= tmp (ofs ? (32 - ofs) : 0);
- }
-
- return val;
-}
-EXPORT_SYMBOL_GPL(ipu_ch_param_read_field);
-
-int ipu_cpmem_set_format_rgb(struct ipu_ch_param __iomem *p,
- const struct ipu_rgb *rgb)
-{
- int bpp = 0, npb = 0, ro, go, bo, to;
-
- ro = rgb-bits_per_pixel - rgb-red.length - rgb-red.offset;
- go = rgb-bits_per_pixel - rgb-green.length - rgb-green.offset;
- bo = rgb-bits_per_pixel - rgb-blue.length - rgb-blue.offset;
- to = rgb-bits_per_pixel - rgb-transp.length - rgb-transp.offset;
-
- ipu_ch_param_write_field(p, IPU_FIELD_WID0, rgb-red.length - 1);
- ipu_ch_param_write_field(p, IPU_FIELD_OFS0, ro);
- ipu_ch_param_write_field(p, IPU_FIELD_WID1, rgb-green.length - 1);
- ipu_ch_param_write_field(p, IPU_FIELD_OFS1,
[PATCH 25/28] gpu: ipu-cpmem: Add second buffer support to ipu_cpmem_set_image()
Add a second buffer physaddr to struct ipu_image, for double-buffering
support.
Signed-off-by: Steve Longerbeam steve_longerb...@mentor.com
---
drivers/gpu/ipu-v3/ipu-cpmem.c | 32
include/video/imx-ipu-v3.h |3 ++-
2 files changed, 18 insertions(+), 17 deletions(-)
diff --git a/drivers/gpu/ipu-v3/ipu-cpmem.c b/drivers/gpu/ipu-v3/ipu-cpmem.c
index f52e4b4..cfe2f53 100644
--- a/drivers/gpu/ipu-v3/ipu-cpmem.c
+++ b/drivers/gpu/ipu-v3/ipu-cpmem.c
@@ -538,7 +538,7 @@ EXPORT_SYMBOL_GPL(ipu_cpmem_set_fmt);
int ipu_cpmem_set_image(struct ipuv3_channel *ch, struct ipu_image *image)
{
struct v4l2_pix_format *pix = image-pix;
- int y_offset, u_offset, v_offset;
+ int offset, y_offset, u_offset, v_offset;
pr_debug(%s: resolution: %dx%d stride: %d\n,
__func__, pix-width, pix-height,
@@ -560,30 +560,30 @@ int ipu_cpmem_set_image(struct ipuv3_channel *ch, struct
ipu_image *image)
ipu_cpmem_set_yuv_planar_full(ch, pix-pixelformat,
pix-bytesperline, u_offset, v_offset);
- ipu_cpmem_set_buffer(ch, 0, image-phys + y_offset);
+ ipu_cpmem_set_buffer(ch, 0, image-phys0 + y_offset);
+ ipu_cpmem_set_buffer(ch, 1, image-phys1 + y_offset);
break;
case V4L2_PIX_FMT_UYVY:
case V4L2_PIX_FMT_YUYV:
- ipu_cpmem_set_buffer(ch, 0, image-phys +
-image-rect.left * 2 +
-image-rect.top * image-pix.bytesperline);
+ case V4L2_PIX_FMT_RGB565:
+ offset = image-rect.left * 2 +
+ image-rect.top * pix-bytesperline;
+ ipu_cpmem_set_buffer(ch, 0, image-phys0 + offset);
+ ipu_cpmem_set_buffer(ch, 1, image-phys1 + offset);
break;
case V4L2_PIX_FMT_RGB32:
case V4L2_PIX_FMT_BGR32:
- ipu_cpmem_set_buffer(ch, 0, image-phys +
-image-rect.left * 4 +
-image-rect.top * image-pix.bytesperline);
- break;
- case V4L2_PIX_FMT_RGB565:
- ipu_cpmem_set_buffer(ch, 0, image-phys +
-image-rect.left * 2 +
-image-rect.top * image-pix.bytesperline);
+ offset = image-rect.left * 4 +
+ image-rect.top * pix-bytesperline;
+ ipu_cpmem_set_buffer(ch, 0, image-phys0 + offset);
+ ipu_cpmem_set_buffer(ch, 1, image-phys1 + offset);
break;
case V4L2_PIX_FMT_RGB24:
case V4L2_PIX_FMT_BGR24:
- ipu_cpmem_set_buffer(ch, 0, image-phys +
-image-rect.left * 3 +
-image-rect.top * image-pix.bytesperline);
+ offset = image-rect.left * 3 +
+ image-rect.top * pix-bytesperline;
+ ipu_cpmem_set_buffer(ch, 0, image-phys0 + offset);
+ ipu_cpmem_set_buffer(ch, 1, image-phys1 + offset);
break;
default:
return -EINVAL;
diff --git a/include/video/imx-ipu-v3.h b/include/video/imx-ipu-v3.h
index 3d3cea0..542652f 100644
--- a/include/video/imx-ipu-v3.h
+++ b/include/video/imx-ipu-v3.h
@@ -221,7 +221,8 @@ struct ipu_rgb {
struct ipu_image {
struct v4l2_pix_format pix;
struct v4l2_rect rect;
- dma_addr_t phys;
+ dma_addr_t phys0;
+ dma_addr_t phys1;
};
void ipu_cpmem_zero(struct ipuv3_channel *ch);
--
1.7.9.5
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[PATCH 23/28] gpu: ipu-cpmem: Add ipu_cpmem_set_axi_id()
Adds ipu_cpmem_set_axi_id() to set which AXI bus master the channel
will use to transfer data onto AXI bus.
Signed-off-by: Steve Longerbeam steve_longerb...@mentor.com
---
drivers/gpu/ipu-v3/ipu-cpmem.c |7 +++
include/video/imx-ipu-v3.h |1 +
2 files changed, 8 insertions(+)
diff --git a/drivers/gpu/ipu-v3/ipu-cpmem.c b/drivers/gpu/ipu-v3/ipu-cpmem.c
index 28adf39..2d1b376 100644
--- a/drivers/gpu/ipu-v3/ipu-cpmem.c
+++ b/drivers/gpu/ipu-v3/ipu-cpmem.c
@@ -254,6 +254,13 @@ void ipu_cpmem_interlaced_scan(struct ipuv3_channel *ch,
int stride)
};
EXPORT_SYMBOL_GPL(ipu_cpmem_interlaced_scan);
+void ipu_cpmem_set_axi_id(struct ipuv3_channel *ch, u32 id)
+{
+ id = 0x3;
+ ipu_ch_param_write_field(ch, IPU_FIELD_ID, id);
+}
+EXPORT_SYMBOL_GPL(ipu_cpmem_set_axi_id);
+
void ipu_cpmem_set_burstsize(struct ipuv3_channel *ch, int burstsize)
{
ipu_ch_param_write_field(ch, IPU_FIELD_NPB, burstsize - 1);
diff --git a/include/video/imx-ipu-v3.h b/include/video/imx-ipu-v3.h
index 6146bc7..066b10d 100644
--- a/include/video/imx-ipu-v3.h
+++ b/include/video/imx-ipu-v3.h
@@ -230,6 +230,7 @@ void ipu_cpmem_set_stride(struct ipuv3_channel *ch, int
stride);
void ipu_cpmem_set_high_priority(struct ipuv3_channel *ch);
void ipu_cpmem_set_buffer(struct ipuv3_channel *ch, int bufnum, dma_addr_t
buf);
void ipu_cpmem_interlaced_scan(struct ipuv3_channel *ch, int stride);
+void ipu_cpmem_set_axi_id(struct ipuv3_channel *ch, u32 id);
void ipu_cpmem_set_burstsize(struct ipuv3_channel *ch, int burstsize);
void ipu_cpmem_set_block_mode(struct ipuv3_channel *ch);
int ipu_cpmem_set_format_rgb(struct ipuv3_channel *ch,
--
1.7.9.5
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[PATCH 21/28] staging: imx-drm: Convert to new ipu_cpmem API
The ipu_cpmem_*() calls now take a channel pointer instead of a
pointer into cpmem for that channel.
Signed-off-by: Steve Longerbeam steve_longerb...@mentor.com
---
drivers/staging/imx-drm/ipuv3-plane.c | 16 ++--
1 file changed, 6 insertions(+), 10 deletions(-)
diff --git a/drivers/staging/imx-drm/ipuv3-plane.c
b/drivers/staging/imx-drm/ipuv3-plane.c
index 6f393a1..6ffe1bb 100644
--- a/drivers/staging/imx-drm/ipuv3-plane.c
+++ b/drivers/staging/imx-drm/ipuv3-plane.c
@@ -62,7 +62,6 @@ static inline int calc_bandwidth(int width, int height,
unsigned int vref)
int ipu_plane_set_base(struct ipu_plane *ipu_plane, struct drm_framebuffer *fb,
int x, int y)
{
- struct ipu_ch_param __iomem *cpmem;
struct drm_gem_cma_object *cma_obj;
unsigned long eba;
@@ -75,13 +74,12 @@ int ipu_plane_set_base(struct ipu_plane *ipu_plane, struct
drm_framebuffer *fb,
dev_dbg(ipu_plane-base.dev-dev, phys = %pad, x = %d, y = %d,
cma_obj-paddr, x, y);
- cpmem = ipu_get_cpmem(ipu_plane-ipu_ch);
- ipu_cpmem_set_stride(cpmem, fb-pitches[0]);
+ ipu_cpmem_set_stride(ipu_plane-ipu_ch, fb-pitches[0]);
eba = cma_obj-paddr + fb-offsets[0] +
fb-pitches[0] * y + (fb-bits_per_pixel 3) * x;
- ipu_cpmem_set_buffer(cpmem, 0, eba);
- ipu_cpmem_set_buffer(cpmem, 1, eba);
+ ipu_cpmem_set_buffer(ipu_plane-ipu_ch, 0, eba);
+ ipu_cpmem_set_buffer(ipu_plane-ipu_ch, 1, eba);
/* cache offsets for subsequent pageflips */
ipu_plane-x = x;
@@ -97,7 +95,6 @@ int ipu_plane_mode_set(struct ipu_plane *ipu_plane, struct
drm_crtc *crtc,
uint32_t src_x, uint32_t src_y,
uint32_t src_w, uint32_t src_h)
{
- struct ipu_ch_param __iomem *cpmem;
struct device *dev = ipu_plane-base.dev-dev;
int ret;
@@ -175,10 +172,9 @@ int ipu_plane_mode_set(struct ipu_plane *ipu_plane, struct
drm_crtc *crtc,
return ret;
}
- cpmem = ipu_get_cpmem(ipu_plane-ipu_ch);
- ipu_ch_param_zero(cpmem);
- ipu_cpmem_set_resolution(cpmem, src_w, src_h);
- ret = ipu_cpmem_set_fmt(cpmem, fb-pixel_format);
+ ipu_cpmem_zero(ipu_plane-ipu_ch);
+ ipu_cpmem_set_resolution(ipu_plane-ipu_ch, src_w, src_h);
+ ret = ipu_cpmem_set_fmt(ipu_plane-ipu_ch, fb-pixel_format);
if (ret 0) {
dev_err(dev, unsupported pixel format 0x%08x\n,
fb-pixel_format);
--
1.7.9.5
--
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[PATCH 17/28] gpu: ipu-v3: Add ipu_idmac_enable_watermark()
Adds the function ipu_idmac_enable_watermark(), which enables or disables
watermarking in the IDMAC channel. Enabling watermarking can increase a
channel's AXI bus arbitration priority.
Signed-off-by: Steve Longerbeam steve_longerb...@mentor.com
---
drivers/gpu/ipu-v3/ipu-common.c | 25 +
include/video/imx-ipu-v3.h |1 +
2 files changed, 26 insertions(+)
diff --git a/drivers/gpu/ipu-v3/ipu-common.c b/drivers/gpu/ipu-v3/ipu-common.c
index 30afef4..7be56b6 100644
--- a/drivers/gpu/ipu-v3/ipu-common.c
+++ b/drivers/gpu/ipu-v3/ipu-common.c
@@ -986,6 +986,31 @@ int ipu_idmac_disable_channel(struct ipuv3_channel
*channel)
}
EXPORT_SYMBOL_GPL(ipu_idmac_disable_channel);
+/*
+ * The imx6 rev. D TRM says that enabling the WM feature will increase
+ * a channel's priority. Refer to Table 36-8 Calculated priority value.
+ * The sub-module that is the sink or source for the channel must enable
+ * watermark signal for this to take effect (SMFC_WM for instance).
+ */
+void ipu_idmac_enable_watermark(struct ipuv3_channel *channel, bool enable)
+{
+ struct ipu_soc *ipu = channel-ipu;
+ unsigned long flags;
+ u32 val;
+
+ spin_lock_irqsave(ipu-lock, flags);
+
+ val = ipu_idmac_read(ipu, IDMAC_WM_EN(channel-num));
+ if (enable)
+ val |= 1 (channel-num % 32);
+ else
+ val = ~(1 (channel-num % 32));
+ ipu_idmac_write(ipu, val, IDMAC_WM_EN(channel-num));
+
+ spin_unlock_irqrestore(ipu-lock, flags);
+}
+EXPORT_SYMBOL_GPL(ipu_idmac_enable_watermark);
+
static int ipu_memory_reset(struct ipu_soc *ipu)
{
unsigned long timeout;
diff --git a/include/video/imx-ipu-v3.h b/include/video/imx-ipu-v3.h
index 17a0bb8..df9863a 100644
--- a/include/video/imx-ipu-v3.h
+++ b/include/video/imx-ipu-v3.h
@@ -196,6 +196,7 @@ void ipu_idmac_put(struct ipuv3_channel *);
int ipu_idmac_enable_channel(struct ipuv3_channel *channel);
int ipu_idmac_disable_channel(struct ipuv3_channel *channel);
+void ipu_idmac_enable_watermark(struct ipuv3_channel *channel, bool enable);
int ipu_idmac_wait_busy(struct ipuv3_channel *channel, int ms);
void ipu_idmac_set_double_buffer(struct ipuv3_channel *channel,
--
1.7.9.5
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[PATCH 18/28] gpu: ipu-v3: Add ipu_idmac_lock_enable()
Adds ipu_idmac_lock_enable(), which enables or disables channel
burst locking.
Signed-off-by: Steve Longerbeam steve_longerb...@mentor.com
---
drivers/gpu/ipu-v3/ipu-common.c | 69 +++
include/video/imx-ipu-v3.h |1 +
2 files changed, 70 insertions(+)
diff --git a/drivers/gpu/ipu-v3/ipu-common.c b/drivers/gpu/ipu-v3/ipu-common.c
index 7be56b6..b808ee0 100644
--- a/drivers/gpu/ipu-v3/ipu-common.c
+++ b/drivers/gpu/ipu-v3/ipu-common.c
@@ -755,6 +755,75 @@ void ipu_idmac_set_double_buffer(struct ipuv3_channel
*channel,
}
EXPORT_SYMBOL_GPL(ipu_idmac_set_double_buffer);
+static const struct {
+ int chnum;
+ u32 reg;
+ int shift;
+} idmac_lock_en_info[] = {
+ { .chnum = 5, .reg = IDMAC_CH_LOCK_EN_1, .shift = 0, },
+ { .chnum = 11, .reg = IDMAC_CH_LOCK_EN_1, .shift = 2, },
+ { .chnum = 12, .reg = IDMAC_CH_LOCK_EN_1, .shift = 4, },
+ { .chnum = 14, .reg = IDMAC_CH_LOCK_EN_1, .shift = 6, },
+ { .chnum = 15, .reg = IDMAC_CH_LOCK_EN_1, .shift = 8, },
+ { .chnum = 20, .reg = IDMAC_CH_LOCK_EN_1, .shift = 10, },
+ { .chnum = 21, .reg = IDMAC_CH_LOCK_EN_1, .shift = 12, },
+ { .chnum = 22, .reg = IDMAC_CH_LOCK_EN_1, .shift = 14, },
+ { .chnum = 23, .reg = IDMAC_CH_LOCK_EN_1, .shift = 16, },
+ { .chnum = 27, .reg = IDMAC_CH_LOCK_EN_1, .shift = 18, },
+ { .chnum = 28, .reg = IDMAC_CH_LOCK_EN_1, .shift = 20, },
+ { .chnum = 45, .reg = IDMAC_CH_LOCK_EN_2, .shift = 0, },
+ { .chnum = 46, .reg = IDMAC_CH_LOCK_EN_2, .shift = 2, },
+ { .chnum = 47, .reg = IDMAC_CH_LOCK_EN_2, .shift = 4, },
+ { .chnum = 48, .reg = IDMAC_CH_LOCK_EN_2, .shift = 6, },
+ { .chnum = 49, .reg = IDMAC_CH_LOCK_EN_2, .shift = 8, },
+ { .chnum = 50, .reg = IDMAC_CH_LOCK_EN_2, .shift = 10, },
+};
+
+int ipu_idmac_lock_enable(struct ipuv3_channel *channel, int num_bursts)
+{
+ struct ipu_soc *ipu = channel-ipu;
+ unsigned long flags;
+ u32 bursts, regval;
+ int i;
+
+ switch (num_bursts) {
+ case 0:
+ case 1:
+ bursts = 0x00; /* locking disabled */
+ break;
+ case 2:
+ bursts = 0x01;
+ break;
+ case 4:
+ bursts = 0x02;
+ break;
+ case 8:
+ bursts = 0x03;
+ break;
+ default:
+ return -EINVAL;
+ }
+
+ for (i = 0; i ARRAY_SIZE(idmac_lock_en_info); i++) {
+ if (channel-num == idmac_lock_en_info[i].chnum)
+ break;
+ }
+ if (i = ARRAY_SIZE(idmac_lock_en_info))
+ return -EINVAL;
+
+ spin_lock_irqsave(ipu-lock, flags);
+
+ regval = ipu_idmac_read(ipu, idmac_lock_en_info[i].reg);
+ regval = ~(0x03 idmac_lock_en_info[i].shift);
+ regval |= (bursts idmac_lock_en_info[i].shift);
+ ipu_idmac_write(ipu, regval, idmac_lock_en_info[i].reg);
+
+ spin_unlock_irqrestore(ipu-lock, flags);
+
+ return 0;
+}
+EXPORT_SYMBOL_GPL(ipu_idmac_lock_enable);
+
int ipu_module_enable(struct ipu_soc *ipu, u32 mask)
{
unsigned long lock_flags;
diff --git a/include/video/imx-ipu-v3.h b/include/video/imx-ipu-v3.h
index df9863a..bcd5141 100644
--- a/include/video/imx-ipu-v3.h
+++ b/include/video/imx-ipu-v3.h
@@ -197,6 +197,7 @@ void ipu_idmac_put(struct ipuv3_channel *);
int ipu_idmac_enable_channel(struct ipuv3_channel *channel);
int ipu_idmac_disable_channel(struct ipuv3_channel *channel);
void ipu_idmac_enable_watermark(struct ipuv3_channel *channel, bool enable);
+int ipu_idmac_lock_enable(struct ipuv3_channel *channel, int num_bursts);
int ipu_idmac_wait_busy(struct ipuv3_channel *channel, int ms);
void ipu_idmac_set_double_buffer(struct ipuv3_channel *channel,
--
1.7.9.5
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[PATCH 00/28] IPUv3 prep for video capture
Hi Philip, Sascha, Here is a rebased set of IPU patches that prepares for video capture support. Video capture is not included in this set. I've addressed all your IPU-specific concerns from the previous patch set, the major ones being: - the IOMUXC control for CSI input selection has been removed. This should be part of a future CSI media entity driver. - the ipu-irt unit has been removed. Enabling the IRT module is folded into ipu-ic unit. The ipu-ic unit is also cleaned up a bit. - the ipu-csi APIs are consolidated/simplified. - added CSI and IC base offsets for i.MX51/i.MX53. Steve Longerbeam (28): ARM: dts: imx6qdl: Add ipu aliases gpu: ipu-v3: Add ipu_get_num() gpu: ipu-v3: Add functions to set CSI/IC source muxes gpu: ipu-v3: Rename and add IDMAC channels gpu: ipu-v3: Add units required for video capture gpu: ipu-v3: smfc: Move enable/disable to ipu-smfc.c gpu: ipu-v3: smfc: Convert to per-channel gpu: ipu-v3: smfc: Add ipu_smfc_set_watermark() gpu: ipu-v3: Add ipu_mbus_code_to_colorspace() gpu: ipu-v3: Add rotation mode conversion utilities gpu: ipu-v3: Add helper function checking if pixfmt is planar gpu: ipu-v3: Move IDMAC channel names to imx-ipu-v3.h gpu: ipu-v3: Add ipu_idmac_buffer_is_ready() gpu: ipu-v3: Add ipu_idmac_clear_buffer() gpu: ipu-v3: Add __ipu_idmac_reset_current_buffer() gpu: ipu-v3: Add ipu_stride_to_bytes() gpu: ipu-v3: Add ipu_idmac_enable_watermark() gpu: ipu-v3: Add ipu_idmac_lock_enable() gpu: ipu-v3: Add idmac channel linking support gpu: ipu-v3: Add ipu-cpmem unit staging: imx-drm: Convert to new ipu_cpmem API gpu: ipu-cpmem: Add ipu_cpmem_set_block_mode() gpu: ipu-cpmem: Add ipu_cpmem_set_axi_id() gpu: ipu-cpmem: Add ipu_cpmem_set_rotation() gpu: ipu-cpmem: Add second buffer support to ipu_cpmem_set_image() gpu: ipu-v3: Add more planar formats support gpu: ipu-cpmem: Add ipu_cpmem_dump() gpu: ipu-v3: Add ipu_dump() arch/arm/boot/dts/imx6q.dtsi |1 + arch/arm/boot/dts/imx6qdl.dtsi|1 + drivers/gpu/ipu-v3/Makefile |3 +- drivers/gpu/ipu-v3/ipu-common.c | 1077 +++-- drivers/gpu/ipu-v3/ipu-cpmem.c| 817 + drivers/gpu/ipu-v3/ipu-csi.c | 701 + drivers/gpu/ipu-v3/ipu-ic.c | 812 + drivers/gpu/ipu-v3/ipu-prv.h | 103 +++- drivers/gpu/ipu-v3/ipu-smfc.c | 156 - drivers/staging/imx-drm/ipuv3-plane.c | 16 +- include/video/imx-ipu-v3.h| 371 +++- 11 files changed, 3389 insertions(+), 669 deletions(-) create mode 100644 drivers/gpu/ipu-v3/ipu-cpmem.c create mode 100644 drivers/gpu/ipu-v3/ipu-csi.c create mode 100644 drivers/gpu/ipu-v3/ipu-ic.c -- 1.7.9.5 -- To unsubscribe from this list: send the line unsubscribe linux-media in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
[PATCH 15/28] gpu: ipu-v3: Add __ipu_idmac_reset_current_buffer()
Adds __ipu_idmac_reset_current_buffer() that resets a channel's
internal current buffer pointer so that transfers start from buffer
0 on the next channel enable.
This operation is required for channel linking to work correctly,
for instance video capture pipelines that carry out image rotations
will fail after the first streaming unless this function is called
for each channel before re-enabling the channels.
Signed-off-by: Steve Longerbeam steve_longerb...@mentor.com
---
drivers/gpu/ipu-v3/ipu-common.c | 23 +++
1 file changed, 23 insertions(+)
diff --git a/drivers/gpu/ipu-v3/ipu-common.c b/drivers/gpu/ipu-v3/ipu-common.c
index 63f2cf2..7701974 100644
--- a/drivers/gpu/ipu-v3/ipu-common.c
+++ b/drivers/gpu/ipu-v3/ipu-common.c
@@ -684,6 +684,25 @@ EXPORT_SYMBOL_GPL(ipu_idmac_put);
#define idma_mask(ch) (1 ((ch) 0x1f))
+/*
+ * This is an undocumented feature, a write one to a channel bit in
+ * IPU_CHA_CUR_BUF and IPU_CHA_TRIPLE_CUR_BUF will reset the channel's
+ * internal current buffer pointer so that transfers start from buffer
+ * 0 on the next channel enable (that's the theory anyway, the imx6 TRM
+ * only says these are read-only registers). This operation is required
+ * for channel linking to work correctly, for instance video capture
+ * pipelines that carry out image rotations will fail after the first
+ * streaming unless this function is called for each channel before
+ * re-enabling the channels.
+ */
+static void __ipu_idmac_reset_current_buffer(struct ipuv3_channel *channel)
+{
+ struct ipu_soc *ipu = channel-ipu;
+ unsigned int chno = channel-num;
+
+ ipu_cm_write(ipu, idma_mask(chno), IPU_CHA_CUR_BUF(chno));
+}
+
void ipu_idmac_set_double_buffer(struct ipuv3_channel *channel,
bool doublebuffer)
{
@@ -700,6 +719,8 @@ void ipu_idmac_set_double_buffer(struct ipuv3_channel
*channel,
reg = ~idma_mask(channel-num);
ipu_cm_write(ipu, reg, IPU_CHA_DB_MODE_SEL(channel-num));
+ __ipu_idmac_reset_current_buffer(channel);
+
spin_unlock_irqrestore(ipu-lock, flags);
}
EXPORT_SYMBOL_GPL(ipu_idmac_set_double_buffer);
@@ -905,6 +926,8 @@ int ipu_idmac_disable_channel(struct ipuv3_channel *channel)
val = ~idma_mask(channel-num);
ipu_idmac_write(ipu, val, IDMAC_CHA_EN(channel-num));
+ __ipu_idmac_reset_current_buffer(channel);
+
/* Set channel buffers NOT to be ready */
ipu_cm_write(ipu, 0xf000, IPU_GPR); /* write one to clear */
--
1.7.9.5
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[PATCH 12/28] gpu: ipu-v3: Move IDMAC channel names to imx-ipu-v3.h
Move the IDMAC channel names to imx-ipu-v3.h, to make the names
available outside IPU. Add a couple new channels in the process
(async display BG/FG, channels 24 and 29).
Signed-off-by: Steve Longerbeam steve_longerb...@mentor.com
---
drivers/gpu/ipu-v3/ipu-prv.h | 25 -
include/video/imx-ipu-v3.h | 30 ++
2 files changed, 30 insertions(+), 25 deletions(-)
diff --git a/drivers/gpu/ipu-v3/ipu-prv.h b/drivers/gpu/ipu-v3/ipu-prv.h
index 8e0bc1d..90fc02a 100644
--- a/drivers/gpu/ipu-v3/ipu-prv.h
+++ b/drivers/gpu/ipu-v3/ipu-prv.h
@@ -24,31 +24,6 @@ struct ipu_soc;
#include video/imx-ipu-v3.h
-#define IPUV3_CHANNEL_CSI0 0
-#define IPUV3_CHANNEL_CSI1 1
-#define IPUV3_CHANNEL_CSI2 2
-#define IPUV3_CHANNEL_CSI3 3
-#define IPUV3_CHANNEL_VDI_MEM_IC_VF 5
-#define IPUV3_CHANNEL_MEM_IC_PP 11
-#define IPUV3_CHANNEL_MEM_IC_PRP_VF 12
-#define IPUV3_CHANNEL_G_MEM_IC_PRP_VF 14
-#define IPUV3_CHANNEL_G_MEM_IC_PP 15
-#define IPUV3_CHANNEL_IC_PRP_ENC_MEM20
-#define IPUV3_CHANNEL_IC_PRP_VF_MEM 21
-#define IPUV3_CHANNEL_IC_PP_MEM 22
-#define IPUV3_CHANNEL_MEM_BG_SYNC 23
-#define IPUV3_CHANNEL_MEM_FG_SYNC 27
-#define IPUV3_CHANNEL_MEM_DC_SYNC 28
-#define IPUV3_CHANNEL_MEM_FG_SYNC_ALPHA31
-#define IPUV3_CHANNEL_MEM_DC_ASYNC 41
-#define IPUV3_CHANNEL_MEM_ROT_ENC 45
-#define IPUV3_CHANNEL_MEM_ROT_VF 46
-#define IPUV3_CHANNEL_MEM_ROT_PP 47
-#define IPUV3_CHANNEL_ROT_ENC_MEM 48
-#define IPUV3_CHANNEL_ROT_VF_MEM 49
-#define IPUV3_CHANNEL_ROT_PP_MEM 50
-#define IPUV3_CHANNEL_MEM_BG_SYNC_ALPHA51
-
#define IPU_MCU_T_DEFAULT 8
#define IPU_CM_IDMAC_REG_OFS 0x8000
#define IPU_CM_IC_REG_OFS 0x0002
diff --git a/include/video/imx-ipu-v3.h b/include/video/imx-ipu-v3.h
index 20776cf..44e337b 100644
--- a/include/video/imx-ipu-v3.h
+++ b/include/video/imx-ipu-v3.h
@@ -135,6 +135,36 @@ enum ipu_channel_irq {
IPU_IRQ_EOS = 192,
};
+/*
+ * Enumeration of IDMAC channels
+ */
+#define IPUV3_CHANNEL_CSI0 0
+#define IPUV3_CHANNEL_CSI1 1
+#define IPUV3_CHANNEL_CSI2 2
+#define IPUV3_CHANNEL_CSI3 3
+#define IPUV3_CHANNEL_VDI_MEM_IC_VF 5
+#define IPUV3_CHANNEL_MEM_IC_PP11
+#define IPUV3_CHANNEL_MEM_IC_PRP_VF12
+#define IPUV3_CHANNEL_G_MEM_IC_PRP_VF 14
+#define IPUV3_CHANNEL_G_MEM_IC_PP 15
+#define IPUV3_CHANNEL_IC_PRP_ENC_MEM 20
+#define IPUV3_CHANNEL_IC_PRP_VF_MEM21
+#define IPUV3_CHANNEL_IC_PP_MEM22
+#define IPUV3_CHANNEL_MEM_BG_SYNC 23
+#define IPUV3_CHANNEL_MEM_BG_ASYNC 24
+#define IPUV3_CHANNEL_MEM_FG_SYNC 27
+#define IPUV3_CHANNEL_MEM_DC_SYNC 28
+#define IPUV3_CHANNEL_MEM_FG_ASYNC 29
+#define IPUV3_CHANNEL_MEM_FG_SYNC_ALPHA31
+#define IPUV3_CHANNEL_MEM_DC_ASYNC 41
+#define IPUV3_CHANNEL_MEM_ROT_ENC 45
+#define IPUV3_CHANNEL_MEM_ROT_VF 46
+#define IPUV3_CHANNEL_MEM_ROT_PP 47
+#define IPUV3_CHANNEL_ROT_ENC_MEM 48
+#define IPUV3_CHANNEL_ROT_VF_MEM 49
+#define IPUV3_CHANNEL_ROT_PP_MEM 50
+#define IPUV3_CHANNEL_MEM_BG_SYNC_ALPHA51
+
int ipu_map_irq(struct ipu_soc *ipu, int irq);
int ipu_idmac_channel_irq(struct ipu_soc *ipu, struct ipuv3_channel *channel,
enum ipu_channel_irq irq);
--
1.7.9.5
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[PATCH 13/28] gpu: ipu-v3: Add ipu_idmac_buffer_is_ready()
Add ipu_idmac_buffer_is_ready(), returns true if the given buffer in
the given channel is set ready (owned by IPU), or false if not ready
(owned by CPU core).
Support has been added for third buffer, there is no support yet for
triple-buffering in idmac channels, but this function checks
buffer-ready for third buffer in case this support is added later.
Signed-off-by: Steve Longerbeam steve_longerb...@mentor.com
---
drivers/gpu/ipu-v3/ipu-common.c | 26 +-
drivers/gpu/ipu-v3/ipu-prv.h|1 +
include/video/imx-ipu-v3.h |1 +
3 files changed, 27 insertions(+), 1 deletion(-)
diff --git a/drivers/gpu/ipu-v3/ipu-common.c b/drivers/gpu/ipu-v3/ipu-common.c
index 909ef71..35442f20 100644
--- a/drivers/gpu/ipu-v3/ipu-common.c
+++ b/drivers/gpu/ipu-v3/ipu-common.c
@@ -682,7 +682,7 @@ void ipu_idmac_put(struct ipuv3_channel *channel)
}
EXPORT_SYMBOL_GPL(ipu_idmac_put);
-#define idma_mask(ch) (1 (ch 0x1f))
+#define idma_mask(ch) (1 ((ch) 0x1f))
void ipu_idmac_set_double_buffer(struct ipuv3_channel *channel,
bool doublebuffer)
@@ -765,6 +765,30 @@ int ipu_idmac_get_current_buffer(struct ipuv3_channel
*channel)
}
EXPORT_SYMBOL_GPL(ipu_idmac_get_current_buffer);
+bool ipu_idmac_buffer_is_ready(struct ipuv3_channel *channel, u32 buf_num)
+{
+ struct ipu_soc *ipu = channel-ipu;
+ unsigned long flags;
+ u32 reg = 0;
+
+ spin_lock_irqsave(ipu-lock, flags);
+ switch (buf_num) {
+ case 0:
+ reg = ipu_cm_read(ipu, IPU_CHA_BUF0_RDY(channel-num));
+ break;
+ case 1:
+ reg = ipu_cm_read(ipu, IPU_CHA_BUF1_RDY(channel-num));
+ break;
+ case 2:
+ reg = ipu_cm_read(ipu, IPU_CHA_BUF2_RDY(channel-num));
+ break;
+ }
+ spin_unlock_irqrestore(ipu-lock, flags);
+
+ return ((reg idma_mask(channel-num)) != 0);
+}
+EXPORT_SYMBOL_GPL(ipu_idmac_buffer_is_ready);
+
void ipu_idmac_select_buffer(struct ipuv3_channel *channel, u32 buf_num)
{
struct ipu_soc *ipu = channel-ipu;
diff --git a/drivers/gpu/ipu-v3/ipu-prv.h b/drivers/gpu/ipu-v3/ipu-prv.h
index 90fc02a..b7b8a52 100644
--- a/drivers/gpu/ipu-v3/ipu-prv.h
+++ b/drivers/gpu/ipu-v3/ipu-prv.h
@@ -68,6 +68,7 @@ struct ipu_soc;
#define IPU_DISP_TASK_STAT IPU_CM_REG(0x0254)
#define IPU_CHA_BUF0_RDY(ch) IPU_CM_REG(0x0268 + 4 * ((ch) / 32))
#define IPU_CHA_BUF1_RDY(ch) IPU_CM_REG(0x0270 + 4 * ((ch) / 32))
+#define IPU_CHA_BUF2_RDY(ch) IPU_CM_REG(0x0288 + 4 * ((ch) / 32))
#define IPU_ALT_CHA_BUF0_RDY(ch) IPU_CM_REG(0x0278 + 4 * ((ch) / 32))
#define IPU_ALT_CHA_BUF1_RDY(ch) IPU_CM_REG(0x0280 + 4 * ((ch) / 32))
diff --git a/include/video/imx-ipu-v3.h b/include/video/imx-ipu-v3.h
index 44e337b..aeb8e63 100644
--- a/include/video/imx-ipu-v3.h
+++ b/include/video/imx-ipu-v3.h
@@ -201,6 +201,7 @@ int ipu_idmac_wait_busy(struct ipuv3_channel *channel, int
ms);
void ipu_idmac_set_double_buffer(struct ipuv3_channel *channel,
bool doublebuffer);
int ipu_idmac_get_current_buffer(struct ipuv3_channel *channel);
+bool ipu_idmac_buffer_is_ready(struct ipuv3_channel *channel, u32 buf_num);
void ipu_idmac_select_buffer(struct ipuv3_channel *channel, u32 buf_num);
/*
--
1.7.9.5
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[PATCH 02/28] gpu: ipu-v3: Add ipu_get_num()
Adds of-alias id to ipu_soc and retrieve with ipu_get_num().
ipu_get_num() is used to select inputs to CSI units in IOMUXC.
It is also used to select an SMFC channel for video capture.
Signed-off-by: Steve Longerbeam steve_longerb...@mentor.com
---
drivers/gpu/ipu-v3/ipu-common.c |8
drivers/gpu/ipu-v3/ipu-prv.h|1 +
include/video/imx-ipu-v3.h |5 +
3 files changed, 14 insertions(+)
diff --git a/drivers/gpu/ipu-v3/ipu-common.c b/drivers/gpu/ipu-v3/ipu-common.c
index 04e7b2e..a92f48b 100644
--- a/drivers/gpu/ipu-v3/ipu-common.c
+++ b/drivers/gpu/ipu-v3/ipu-common.c
@@ -55,6 +55,12 @@ static inline void ipu_idmac_write(struct ipu_soc *ipu, u32
value,
writel(value, ipu-idmac_reg + offset);
}
+int ipu_get_num(struct ipu_soc *ipu)
+{
+ return ipu-id;
+}
+EXPORT_SYMBOL_GPL(ipu_get_num);
+
void ipu_srm_dp_sync_update(struct ipu_soc *ipu)
{
u32 val;
@@ -1205,6 +1211,7 @@ static int ipu_probe(struct platform_device *pdev)
{
const struct of_device_id *of_id =
of_match_device(imx_ipu_dt_ids, pdev-dev);
+ struct device_node *np = pdev-dev.of_node;
struct ipu_soc *ipu;
struct resource *res;
unsigned long ipu_base;
@@ -1233,6 +1240,7 @@ static int ipu_probe(struct platform_device *pdev)
ipu-channel[i].ipu = ipu;
ipu-devtype = devtype;
ipu-ipu_type = devtype-type;
+ ipu-id = of_alias_get_id(np, ipu);
spin_lock_init(ipu-lock);
mutex_init(ipu-channel_lock);
diff --git a/drivers/gpu/ipu-v3/ipu-prv.h b/drivers/gpu/ipu-v3/ipu-prv.h
index c93f50e..55ae20c 100644
--- a/drivers/gpu/ipu-v3/ipu-prv.h
+++ b/drivers/gpu/ipu-v3/ipu-prv.h
@@ -166,6 +166,7 @@ struct ipu_soc {
void __iomem*idmac_reg;
struct ipu_ch_param __iomem *cpmem_base;
+ int id;
int usecount;
struct clk *clk;
diff --git a/include/video/imx-ipu-v3.h b/include/video/imx-ipu-v3.h
index 3e43e22..739d204 100644
--- a/include/video/imx-ipu-v3.h
+++ b/include/video/imx-ipu-v3.h
@@ -93,6 +93,11 @@ int ipu_idmac_channel_irq(struct ipu_soc *ipu, struct
ipuv3_channel *channel,
#define IPU_IRQ_VSYNC_PRE_1(448 + 15)
/*
+ * IPU Common functions
+ */
+int ipu_get_num(struct ipu_soc *ipu);
+
+/*
* IPU Image DMA Controller (idmac) functions
*/
struct ipuv3_channel *ipu_idmac_get(struct ipu_soc *ipu, unsigned channel);
--
1.7.9.5
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[PATCH 07/28] gpu: ipu-v3: smfc: Convert to per-channel
Convert the smfc object to be specific to a single smfc channel.
Add ipu_smfc_{get|put} to retrieve and release a single smfc channel
for exclusive use, and add use counter to ipu_smfc_{enable|disable}.
Signed-off-by: Steve Longerbeam steve_longerb...@mentor.com
---
drivers/gpu/ipu-v3/ipu-smfc.c | 132 +
include/video/imx-ipu-v3.h| 10 ++--
2 files changed, 112 insertions(+), 30 deletions(-)
diff --git a/drivers/gpu/ipu-v3/ipu-smfc.c b/drivers/gpu/ipu-v3/ipu-smfc.c
index 87ac624d..a6429ca 100644
--- a/drivers/gpu/ipu-v3/ipu-smfc.c
+++ b/drivers/gpu/ipu-v3/ipu-smfc.c
@@ -21,9 +21,18 @@
#include ipu-prv.h
+struct ipu_smfc {
+ struct ipu_smfc_priv *priv;
+ int chno;
+ bool inuse;
+};
+
struct ipu_smfc_priv {
void __iomem *base;
spinlock_t lock;
+ struct ipu_soc *ipu;
+ struct ipu_smfc channel[4];
+ int use_count;
};
/*SMFC Registers */
@@ -31,75 +40,146 @@ struct ipu_smfc_priv {
#define SMFC_WMC 0x0004
#define SMFC_BS0x0008
-int ipu_smfc_set_burstsize(struct ipu_soc *ipu, int channel, int burstsize)
+int ipu_smfc_set_burstsize(struct ipu_smfc *smfc, int burstsize)
{
- struct ipu_smfc_priv *smfc = ipu-smfc_priv;
+ struct ipu_smfc_priv *priv = smfc-priv;
unsigned long flags;
u32 val, shift;
- spin_lock_irqsave(smfc-lock, flags);
+ spin_lock_irqsave(priv-lock, flags);
- shift = channel * 4;
- val = readl(smfc-base + SMFC_BS);
+ shift = smfc-chno * 4;
+ val = readl(priv-base + SMFC_BS);
val = ~(0xf shift);
val |= burstsize shift;
- writel(val, smfc-base + SMFC_BS);
+ writel(val, priv-base + SMFC_BS);
- spin_unlock_irqrestore(smfc-lock, flags);
+ spin_unlock_irqrestore(priv-lock, flags);
return 0;
}
EXPORT_SYMBOL_GPL(ipu_smfc_set_burstsize);
-int ipu_smfc_map_channel(struct ipu_soc *ipu, int channel, int csi_id, int
mipi_id)
+int ipu_smfc_map_channel(struct ipu_smfc *smfc, int csi_id, int mipi_id)
{
- struct ipu_smfc_priv *smfc = ipu-smfc_priv;
+ struct ipu_smfc_priv *priv = smfc-priv;
unsigned long flags;
u32 val, shift;
- spin_lock_irqsave(smfc-lock, flags);
+ spin_lock_irqsave(priv-lock, flags);
- shift = channel * 3;
- val = readl(smfc-base + SMFC_MAP);
+ shift = smfc-chno * 3;
+ val = readl(priv-base + SMFC_MAP);
val = ~(0x7 shift);
val |= ((csi_id 2) | mipi_id) shift;
- writel(val, smfc-base + SMFC_MAP);
+ writel(val, priv-base + SMFC_MAP);
- spin_unlock_irqrestore(smfc-lock, flags);
+ spin_unlock_irqrestore(priv-lock, flags);
return 0;
}
EXPORT_SYMBOL_GPL(ipu_smfc_map_channel);
-int ipu_smfc_enable(struct ipu_soc *ipu)
+int ipu_smfc_enable(struct ipu_smfc *smfc)
{
- return ipu_module_enable(ipu, IPU_CONF_SMFC_EN);
+ struct ipu_smfc_priv *priv = smfc-priv;
+ unsigned long flags;
+
+ spin_lock_irqsave(priv-lock, flags);
+
+ if (!priv-use_count)
+ ipu_module_enable(priv-ipu, IPU_CONF_SMFC_EN);
+
+ priv-use_count++;
+
+ spin_unlock_irqrestore(priv-lock, flags);
+
+ return 0;
}
EXPORT_SYMBOL_GPL(ipu_smfc_enable);
-int ipu_smfc_disable(struct ipu_soc *ipu)
+int ipu_smfc_disable(struct ipu_smfc *smfc)
{
- return ipu_module_disable(ipu, IPU_CONF_SMFC_EN);
+ struct ipu_smfc_priv *priv = smfc-priv;
+ unsigned long flags;
+
+ spin_lock_irqsave(priv-lock, flags);
+
+ priv-use_count--;
+
+ if (!priv-use_count)
+ ipu_module_disable(priv-ipu, IPU_CONF_SMFC_EN);
+
+ if (priv-use_count 0)
+ priv-use_count = 0;
+
+ spin_unlock_irqrestore(priv-lock, flags);
+
+ return 0;
}
EXPORT_SYMBOL_GPL(ipu_smfc_disable);
+struct ipu_smfc *ipu_smfc_get(struct ipu_soc *ipu, unsigned int chno)
+{
+ struct ipu_smfc_priv *priv = ipu-smfc_priv;
+ struct ipu_smfc *smfc, *ret;
+ unsigned long flags;
+
+ if (chno = 4)
+ return ERR_PTR(-EINVAL);
+
+ smfc = priv-channel[chno];
+ ret = smfc;
+
+ spin_lock_irqsave(priv-lock, flags);
+
+ if (smfc-inuse) {
+ ret = ERR_PTR(-EBUSY);
+ goto unlock;
+ }
+
+ smfc-inuse = true;
+unlock:
+ spin_unlock_irqrestore(priv-lock, flags);
+ return ret;
+}
+EXPORT_SYMBOL_GPL(ipu_smfc_get);
+
+void ipu_smfc_put(struct ipu_smfc *smfc)
+{
+ struct ipu_smfc_priv *priv = smfc-priv;
+ unsigned long flags;
+
+ spin_lock_irqsave(priv-lock, flags);
+ smfc-inuse = false;
+ spin_unlock_irqrestore(priv-lock, flags);
+}
+EXPORT_SYMBOL_GPL(ipu_smfc_put);
+
int ipu_smfc_init(struct ipu_soc *ipu, struct device *dev,
unsigned long base)
{
- struct ipu_smfc_priv *smfc;
+ struct ipu_smfc_priv *priv;
+ int i;
-
[PATCH 01/28] ARM: dts: imx6qdl: Add ipu aliases
Add ipu0 (and ipu1 for quad) aliases to ipu1/ipu2 nodes respectively.
Signed-off-by: Steve Longerbeam steve_longerb...@mentor.com
---
arch/arm/boot/dts/imx6q.dtsi |1 +
arch/arm/boot/dts/imx6qdl.dtsi |1 +
2 files changed, 2 insertions(+)
diff --git a/arch/arm/boot/dts/imx6q.dtsi b/arch/arm/boot/dts/imx6q.dtsi
index addd3f8..fcfbac2 100644
--- a/arch/arm/boot/dts/imx6q.dtsi
+++ b/arch/arm/boot/dts/imx6q.dtsi
@@ -14,6 +14,7 @@
/ {
aliases {
+ ipu1 = ipu2;
spi4 = ecspi5;
};
diff --git a/arch/arm/boot/dts/imx6qdl.dtsi b/arch/arm/boot/dts/imx6qdl.dtsi
index ce05991..3b3d8fe 100644
--- a/arch/arm/boot/dts/imx6qdl.dtsi
+++ b/arch/arm/boot/dts/imx6qdl.dtsi
@@ -29,6 +29,7 @@
i2c0 = i2c1;
i2c1 = i2c2;
i2c2 = i2c3;
+ ipu0 = ipu1;
mmc0 = usdhc1;
mmc1 = usdhc2;
mmc2 = usdhc3;
--
1.7.9.5
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[PATCH 08/28] gpu: ipu-v3: smfc: Add ipu_smfc_set_watermark()
Adds ipu_smfc_set_watermark() which programs a channel's SMFC FIFO
levels at which the watermark signal is set and cleared.
Signed-off-by: Steve Longerbeam steve_longerb...@mentor.com
---
drivers/gpu/ipu-v3/ipu-smfc.c | 20
include/video/imx-ipu-v3.h|1 +
2 files changed, 21 insertions(+)
diff --git a/drivers/gpu/ipu-v3/ipu-smfc.c b/drivers/gpu/ipu-v3/ipu-smfc.c
index a6429ca..6ca9b43 100644
--- a/drivers/gpu/ipu-v3/ipu-smfc.c
+++ b/drivers/gpu/ipu-v3/ipu-smfc.c
@@ -80,6 +80,26 @@ int ipu_smfc_map_channel(struct ipu_smfc *smfc, int csi_id,
int mipi_id)
}
EXPORT_SYMBOL_GPL(ipu_smfc_map_channel);
+int ipu_smfc_set_watermark(struct ipu_smfc *smfc, u32 set_level, u32 clr_level)
+{
+ struct ipu_smfc_priv *priv = smfc-priv;
+ unsigned long flags;
+ u32 val, shift;
+
+ spin_lock_irqsave(priv-lock, flags);
+
+ shift = smfc-chno * 6 + (smfc-chno 1 ? 4 : 0);
+ val = readl(priv-base + SMFC_WMC);
+ val = ~(0x3f shift);
+ val |= ((clr_level 3) | set_level) shift;
+ writel(val, priv-base + SMFC_WMC);
+
+ spin_unlock_irqrestore(priv-lock, flags);
+
+ return 0;
+}
+EXPORT_SYMBOL_GPL(ipu_smfc_set_watermark);
+
int ipu_smfc_enable(struct ipu_smfc *smfc)
{
struct ipu_smfc_priv *priv = smfc-priv;
diff --git a/include/video/imx-ipu-v3.h b/include/video/imx-ipu-v3.h
index 27fb980..e69b247 100644
--- a/include/video/imx-ipu-v3.h
+++ b/include/video/imx-ipu-v3.h
@@ -297,6 +297,7 @@ int ipu_smfc_enable(struct ipu_smfc *smfc);
int ipu_smfc_disable(struct ipu_smfc *smfc);
int ipu_smfc_map_channel(struct ipu_smfc *smfc, int csi_id, int mipi_id);
int ipu_smfc_set_burstsize(struct ipu_smfc *smfc, int burstsize);
+int ipu_smfc_set_watermark(struct ipu_smfc *smfc, u32 set_level, u32
clr_level);
#define IPU_CPMEM_WORD(word, ofs, size) word) * 160 + (ofs)) 8) |
(size))
--
1.7.9.5
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[PATCH 14/28] gpu: ipu-v3: Add ipu_idmac_clear_buffer()
Add the reverse of ipu_idmac_select_buffer(), that is, clear a buffer
ready status in a channel.
Signed-off-by: Steve Longerbeam steve_longerb...@mentor.com
---
drivers/gpu/ipu-v3/ipu-common.c | 28
include/video/imx-ipu-v3.h |1 +
2 files changed, 29 insertions(+)
diff --git a/drivers/gpu/ipu-v3/ipu-common.c b/drivers/gpu/ipu-v3/ipu-common.c
index 35442f20..63f2cf2 100644
--- a/drivers/gpu/ipu-v3/ipu-common.c
+++ b/drivers/gpu/ipu-v3/ipu-common.c
@@ -807,6 +807,34 @@ void ipu_idmac_select_buffer(struct ipuv3_channel
*channel, u32 buf_num)
}
EXPORT_SYMBOL_GPL(ipu_idmac_select_buffer);
+void ipu_idmac_clear_buffer(struct ipuv3_channel *channel, u32 buf_num)
+{
+ struct ipu_soc *ipu = channel-ipu;
+ unsigned int chno = channel-num;
+ unsigned long flags;
+
+ spin_lock_irqsave(ipu-lock, flags);
+
+ ipu_cm_write(ipu, 0xF030, IPU_GPR); /* write one to clear */
+ switch (buf_num) {
+ case 0:
+ ipu_cm_write(ipu, idma_mask(chno), IPU_CHA_BUF0_RDY(chno));
+ break;
+ case 1:
+ ipu_cm_write(ipu, idma_mask(chno), IPU_CHA_BUF1_RDY(chno));
+ break;
+ case 2:
+ ipu_cm_write(ipu, idma_mask(chno), IPU_CHA_BUF2_RDY(chno));
+ break;
+ default:
+ break;
+ }
+ ipu_cm_write(ipu, 0x0, IPU_GPR); /* write one to set */
+
+ spin_unlock_irqrestore(ipu-lock, flags);
+}
+EXPORT_SYMBOL_GPL(ipu_idmac_clear_buffer);
+
int ipu_idmac_enable_channel(struct ipuv3_channel *channel)
{
struct ipu_soc *ipu = channel-ipu;
diff --git a/include/video/imx-ipu-v3.h b/include/video/imx-ipu-v3.h
index aeb8e63..9ed1c75 100644
--- a/include/video/imx-ipu-v3.h
+++ b/include/video/imx-ipu-v3.h
@@ -203,6 +203,7 @@ void ipu_idmac_set_double_buffer(struct ipuv3_channel
*channel,
int ipu_idmac_get_current_buffer(struct ipuv3_channel *channel);
bool ipu_idmac_buffer_is_ready(struct ipuv3_channel *channel, u32 buf_num);
void ipu_idmac_select_buffer(struct ipuv3_channel *channel, u32 buf_num);
+void ipu_idmac_clear_buffer(struct ipuv3_channel *channel, u32 buf_num);
/*
* IPU Display Controller (dc) functions
--
1.7.9.5
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[PATCH 16/28] gpu: ipu-v3: Add ipu_stride_to_bytes()
Adds ipu_stride_to_bytes(), which converts a pixel stride to bytes,
suitable for passing to cpmem.
Signed-off-by: Steve Longerbeam steve_longerb...@mentor.com
---
drivers/gpu/ipu-v3/ipu-common.c | 30 ++
include/video/imx-ipu-v3.h |1 +
2 files changed, 31 insertions(+)
diff --git a/drivers/gpu/ipu-v3/ipu-common.c b/drivers/gpu/ipu-v3/ipu-common.c
index 7701974..30afef4 100644
--- a/drivers/gpu/ipu-v3/ipu-common.c
+++ b/drivers/gpu/ipu-v3/ipu-common.c
@@ -576,6 +576,36 @@ enum ipu_color_space ipu_mbus_code_to_colorspace(u32
mbus_code)
}
EXPORT_SYMBOL_GPL(ipu_mbus_code_to_colorspace);
+int ipu_stride_to_bytes(u32 pixel_stride, u32 pixelformat)
+{
+ switch (pixelformat) {
+ case V4L2_PIX_FMT_YUV420:
+ case V4L2_PIX_FMT_YVU420:
+ /*
+* for the planar YUV formats, the stride passed to
+* cpmem must be the stride in bytes of the Y plane.
+* And all the planar YUV formats have an 8-bit
+* Y component.
+*/
+ return (8 * pixel_stride) 3;
+ case V4L2_PIX_FMT_RGB565:
+ case V4L2_PIX_FMT_YUYV:
+ case V4L2_PIX_FMT_UYVY:
+ return (16 * pixel_stride) 3;
+ case V4L2_PIX_FMT_BGR24:
+ case V4L2_PIX_FMT_RGB24:
+ return (24 * pixel_stride) 3;
+ case V4L2_PIX_FMT_BGR32:
+ case V4L2_PIX_FMT_RGB32:
+ return (32 * pixel_stride) 3;
+ default:
+ break;
+ }
+
+ return -EINVAL;
+}
+EXPORT_SYMBOL_GPL(ipu_stride_to_bytes);
+
int ipu_degrees_to_rot_mode(enum ipu_rotate_mode *mode, int degrees,
bool hflip, bool vflip)
{
diff --git a/include/video/imx-ipu-v3.h b/include/video/imx-ipu-v3.h
index 9ed1c75..17a0bb8 100644
--- a/include/video/imx-ipu-v3.h
+++ b/include/video/imx-ipu-v3.h
@@ -480,6 +480,7 @@ int ipu_cpmem_set_image(struct ipu_ch_param __iomem *cpmem,
enum ipu_color_space ipu_drm_fourcc_to_colorspace(u32 drm_fourcc);
enum ipu_color_space ipu_pixelformat_to_colorspace(u32 pixelformat);
enum ipu_color_space ipu_mbus_code_to_colorspace(u32 mbus_code);
+int ipu_stride_to_bytes(u32 pixel_stride, u32 pixelformat);
bool ipu_pixelformat_is_planar(u32 pixelformat);
int ipu_degrees_to_rot_mode(enum ipu_rotate_mode *mode, int degrees,
bool hflip, bool vflip);
--
1.7.9.5
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[PATCH 04/28] gpu: ipu-v3: Rename and add IDMAC channels
Rename the ENC/VF/PP rotation channel names, to be more consistent with the convention that *_MEM is write-to-memory channels and MEM_* is read-from-memory channels. Also add the channels who's source and destination is the IC. Signed-off-by: Steve Longerbeam steve_longerb...@mentor.com --- drivers/gpu/ipu-v3/ipu-prv.h | 20 ++-- 1 file changed, 14 insertions(+), 6 deletions(-) diff --git a/drivers/gpu/ipu-v3/ipu-prv.h b/drivers/gpu/ipu-v3/ipu-prv.h index 55ae20c..7d8d95b 100644 --- a/drivers/gpu/ipu-v3/ipu-prv.h +++ b/drivers/gpu/ipu-v3/ipu-prv.h @@ -28,17 +28,25 @@ struct ipu_soc; #define IPUV3_CHANNEL_CSI1 1 #define IPUV3_CHANNEL_CSI2 2 #define IPUV3_CHANNEL_CSI3 3 +#define IPUV3_CHANNEL_VDI_MEM_IC_VF 5 +#define IPUV3_CHANNEL_MEM_IC_PP 11 +#define IPUV3_CHANNEL_MEM_IC_PRP_VF 12 +#define IPUV3_CHANNEL_G_MEM_IC_PRP_VF 14 +#define IPUV3_CHANNEL_G_MEM_IC_PP 15 +#define IPUV3_CHANNEL_IC_PRP_ENC_MEM20 +#define IPUV3_CHANNEL_IC_PRP_VF_MEM 21 +#define IPUV3_CHANNEL_IC_PP_MEM 22 #define IPUV3_CHANNEL_MEM_BG_SYNC 23 #define IPUV3_CHANNEL_MEM_FG_SYNC 27 #define IPUV3_CHANNEL_MEM_DC_SYNC 28 #define IPUV3_CHANNEL_MEM_FG_SYNC_ALPHA31 #define IPUV3_CHANNEL_MEM_DC_ASYNC 41 -#define IPUV3_CHANNEL_ROT_ENC_MEM 45 -#define IPUV3_CHANNEL_ROT_VF_MEM 46 -#define IPUV3_CHANNEL_ROT_PP_MEM 47 -#define IPUV3_CHANNEL_ROT_ENC_MEM_OUT 48 -#define IPUV3_CHANNEL_ROT_VF_MEM_OUT 49 -#define IPUV3_CHANNEL_ROT_PP_MEM_OUT 50 +#define IPUV3_CHANNEL_MEM_ROT_ENC 45 +#define IPUV3_CHANNEL_MEM_ROT_VF 46 +#define IPUV3_CHANNEL_MEM_ROT_PP 47 +#define IPUV3_CHANNEL_ROT_ENC_MEM 48 +#define IPUV3_CHANNEL_ROT_VF_MEM 49 +#define IPUV3_CHANNEL_ROT_PP_MEM 50 #define IPUV3_CHANNEL_MEM_BG_SYNC_ALPHA51 #define IPU_MCU_T_DEFAULT 8 -- 1.7.9.5 -- To unsubscribe from this list: send the line unsubscribe linux-media in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
[PATCH 05/28] gpu: ipu-v3: Add units required for video capture
Adds the following new IPU units:
- Camera Sensor Interface (csi)
- Image Converter (ic)
Signed-off-by: Steve Longerbeam steve_longerb...@mentor.com
---
drivers/gpu/ipu-v3/Makefile |3 +-
drivers/gpu/ipu-v3/ipu-common.c | 63 ++-
drivers/gpu/ipu-v3/ipu-csi.c| 701 +
drivers/gpu/ipu-v3/ipu-ic.c | 812 +++
drivers/gpu/ipu-v3/ipu-prv.h| 12 +
include/video/imx-ipu-v3.h | 113 +-
6 files changed, 1688 insertions(+), 16 deletions(-)
create mode 100644 drivers/gpu/ipu-v3/ipu-csi.c
create mode 100644 drivers/gpu/ipu-v3/ipu-ic.c
diff --git a/drivers/gpu/ipu-v3/Makefile b/drivers/gpu/ipu-v3/Makefile
index 1887972b..830804f 100644
--- a/drivers/gpu/ipu-v3/Makefile
+++ b/drivers/gpu/ipu-v3/Makefile
@@ -1,3 +1,4 @@
obj-$(CONFIG_IMX_IPUV3_CORE) += imx-ipu-v3.o
-imx-ipu-v3-objs := ipu-common.o ipu-dc.o ipu-di.o ipu-dp.o ipu-dmfc.o
ipu-smfc.o
+imx-ipu-v3-objs := ipu-common.o ipu-csi.o ipu-dc.o ipu-di.o ipu-dp.o \
+ ipu-dmfc.o ipu-ic.o ipu-smfc.o
diff --git a/drivers/gpu/ipu-v3/ipu-common.c b/drivers/gpu/ipu-v3/ipu-common.c
index 1155eb9..0ac2103 100644
--- a/drivers/gpu/ipu-v3/ipu-common.c
+++ b/drivers/gpu/ipu-v3/ipu-common.c
@@ -667,18 +667,6 @@ int ipu_module_disable(struct ipu_soc *ipu, u32 mask)
}
EXPORT_SYMBOL_GPL(ipu_module_disable);
-int ipu_csi_enable(struct ipu_soc *ipu, int csi)
-{
- return ipu_module_enable(ipu, csi ? IPU_CONF_CSI1_EN :
IPU_CONF_CSI0_EN);
-}
-EXPORT_SYMBOL_GPL(ipu_csi_enable);
-
-int ipu_csi_disable(struct ipu_soc *ipu, int csi)
-{
- return ipu_module_disable(ipu, csi ? IPU_CONF_CSI1_EN :
IPU_CONF_CSI0_EN);
-}
-EXPORT_SYMBOL_GPL(ipu_csi_disable);
-
int ipu_smfc_enable(struct ipu_soc *ipu)
{
return ipu_module_enable(ipu, IPU_CONF_SMFC_EN);
@@ -889,6 +877,9 @@ struct ipu_devtype {
unsigned long cpmem_ofs;
unsigned long srm_ofs;
unsigned long tpm_ofs;
+ unsigned long csi0_ofs;
+ unsigned long csi1_ofs;
+ unsigned long ic_ofs;
unsigned long disp0_ofs;
unsigned long disp1_ofs;
unsigned long dc_tmpl_ofs;
@@ -902,6 +893,9 @@ static struct ipu_devtype ipu_type_imx51 = {
.cpmem_ofs = 0x1f00,
.srm_ofs = 0x1f04,
.tpm_ofs = 0x1f06,
+ .csi0_ofs = 0x1f03,
+ .csi1_ofs = 0x1f038000,
+ .ic_ofs = 0x1f02,
.disp0_ofs = 0x1e04,
.disp1_ofs = 0x1e048000,
.dc_tmpl_ofs = 0x1f08,
@@ -915,6 +909,9 @@ static struct ipu_devtype ipu_type_imx53 = {
.cpmem_ofs = 0x0700,
.srm_ofs = 0x0704,
.tpm_ofs = 0x0706,
+ .csi0_ofs = 0x0703,
+ .csi1_ofs = 0x07038000,
+ .ic_ofs = 0x0702,
.disp0_ofs = 0x0604,
.disp1_ofs = 0x06048000,
.dc_tmpl_ofs = 0x0708,
@@ -928,6 +925,9 @@ static struct ipu_devtype ipu_type_imx6q = {
.cpmem_ofs = 0x0030,
.srm_ofs = 0x0034,
.tpm_ofs = 0x0036,
+ .csi0_ofs = 0x0023,
+ .csi1_ofs = 0x00238000,
+ .ic_ofs = 0x0022,
.disp0_ofs = 0x0024,
.disp1_ofs = 0x00248000,
.dc_tmpl_ofs = 0x0038,
@@ -952,8 +952,30 @@ static int ipu_submodules_init(struct ipu_soc *ipu,
struct device *dev = pdev-dev;
const struct ipu_devtype *devtype = ipu-devtype;
+ ret = ipu_csi_init(ipu, dev, 0, ipu_base + devtype-csi0_ofs,
+ IPU_CONF_CSI0_EN, ipu_clk);
+ if (ret) {
+ unit = csi0;
+ goto err_csi_0;
+ }
+
+ ret = ipu_csi_init(ipu, dev, 1, ipu_base + devtype-csi1_ofs,
+ IPU_CONF_CSI1_EN, ipu_clk);
+ if (ret) {
+ unit = csi1;
+ goto err_csi_1;
+ }
+
+ ret = ipu_ic_init(ipu, dev,
+ ipu_base + devtype-ic_ofs,
+ ipu_base + devtype-tpm_ofs);
+ if (ret) {
+ unit = ic;
+ goto err_ic;
+ }
+
ret = ipu_di_init(ipu, dev, 0, ipu_base + devtype-disp0_ofs,
- IPU_CONF_DI0_EN, ipu_clk);
+ IPU_CONF_DI0_EN, ipu_clk);
if (ret) {
unit = di0;
goto err_di_0;
@@ -1006,6 +1028,12 @@ err_dc:
err_di_1:
ipu_di_exit(ipu, 0);
err_di_0:
+ ipu_ic_exit(ipu);
+err_ic:
+ ipu_csi_exit(ipu, 1);
+err_csi_1:
+ ipu_csi_exit(ipu, 0);
+err_csi_0:
dev_err(pdev-dev, init %s failed with %d\n, unit, ret);
return ret;
}
@@ -1082,6 +1110,9 @@ static void ipu_submodules_exit(struct ipu_soc *ipu)
ipu_dc_exit(ipu);
ipu_di_exit(ipu, 1);
ipu_di_exit(ipu, 0);
+ ipu_ic_exit(ipu);
+ ipu_csi_exit(ipu, 1);
+ ipu_csi_exit(ipu, 0);
}
static int platform_remove_devices_fn(struct device *dev, void *unused)
@@ -1302,6 +1333,12 @@ static int ipu_probe(struct platform_device
cron job: media_tree daily build: OK
This message is generated daily by a cron job that builds media_tree for the kernels and architectures in the list below. Results of the daily build of media_tree: date: Thu Jun 26 04:00:18 CEST 2014 git branch: test git hash: 1fe3a8fe494463cfe2556a25ae41a1499725c178 gcc version:i686-linux-gcc (GCC) 4.8.2 sparse version: v0.5.0-14-gf11dd94 host hardware: x86_64 host os:3.14-5.slh.5-amd64 linux-git-arm-at91: OK linux-git-arm-davinci: OK linux-git-arm-exynos: OK linux-git-arm-mx: OK linux-git-arm-omap: OK linux-git-arm-omap1: OK linux-git-arm-pxa: OK linux-git-blackfin: OK linux-git-i686: OK linux-git-m32r: OK linux-git-mips: OK linux-git-powerpc64: OK linux-git-sh: OK linux-git-x86_64: OK linux-2.6.31.14-i686: OK linux-2.6.32.27-i686: OK linux-2.6.33.7-i686: OK linux-2.6.34.7-i686: OK linux-2.6.35.9-i686: OK linux-2.6.36.4-i686: OK linux-2.6.37.6-i686: OK linux-2.6.38.8-i686: OK linux-2.6.39.4-i686: OK linux-3.0.60-i686: OK linux-3.1.10-i686: OK linux-3.2.37-i686: OK linux-3.3.8-i686: OK linux-3.4.27-i686: OK linux-3.5.7-i686: OK linux-3.6.11-i686: OK linux-3.7.4-i686: OK linux-3.8-i686: OK linux-3.9.2-i686: OK linux-3.10.1-i686: OK linux-3.11.1-i686: OK linux-3.12-i686: OK linux-3.13-i686: OK linux-3.14-i686: OK linux-3.15-i686: OK linux-3.16-rc1-i686: OK linux-2.6.31.14-x86_64: OK linux-2.6.32.27-x86_64: OK linux-2.6.33.7-x86_64: OK linux-2.6.34.7-x86_64: OK linux-2.6.35.9-x86_64: OK linux-2.6.36.4-x86_64: OK linux-2.6.37.6-x86_64: OK linux-2.6.38.8-x86_64: OK linux-2.6.39.4-x86_64: OK linux-3.0.60-x86_64: OK linux-3.1.10-x86_64: OK linux-3.2.37-x86_64: OK linux-3.3.8-x86_64: OK linux-3.4.27-x86_64: OK linux-3.5.7-x86_64: OK linux-3.6.11-x86_64: OK linux-3.7.4-x86_64: OK linux-3.8-x86_64: OK linux-3.9.2-x86_64: OK linux-3.10.1-x86_64: OK linux-3.11.1-x86_64: OK linux-3.12-x86_64: OK linux-3.13-x86_64: OK linux-3.14-x86_64: OK linux-3.15-x86_64: OK linux-3.16-rc1-x86_64: OK apps: OK spec-git: OK sparse: WARNINGS Detailed results are available here: http://www.xs4all.nl/~hverkuil/logs/Thursday.log Full logs are available here: http://www.xs4all.nl/~hverkuil/logs/Thursday.tar.bz2 The Media Infrastructure API from this daily build is here: http://www.xs4all.nl/~hverkuil/spec/media.html -- To unsubscribe from this list: send the line unsubscribe linux-media in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
