Hi Max,
Should have thought on that! I'll change it to preserve all other bits.
Thanks,
Luis
On Fri, Jul 19, 2013 at 4:37 AM, nibble.max nibble@gmail.com wrote:
Hello Luis,
The internel interrupts are rounted as follow:
flatiron(include ADC)---HammerHead(include IR inside)---Pecos(PCIe)
Luis Alves lja...@gmail.com wrote:
Hi Max,
Should have thought on that! I'll change it to preserve all other bits.
Thanks,
Luis
On Fri, Jul 19, 2013 at 4:37 AM, nibble.max nibble@gmail.com
wrote:
Hello Luis,
The internel interrupts are rounted as follow:
flatiron(include
Hi all,
This path is meant to be up-streamed.
Andy has a nice explanation for the interrupt storm when
enabling the IR interrupt:
The flatiron core (the audio adc) signals the end of its self-test
with an interrupt. Since the flatiron irq seems OR-wired
with the IR irq the result is this
Hello Luis,
The internel interrupts are rounted as follow:
flatiron(include ADC)---HammerHead(include IR inside)---Pecos(PCIe)
The flatiron interrupt is enabled when chip power up.
When HammerHead interrupt is enalbe in Pecos, the most of interrupts are coming
from flatiron.
The more accurate
