Re: [PATCH 03/20] media: adv7604: chip info and formats for ADV7612

2015-05-25 Thread Guennadi Liakhovetski 
Hi William,

Just a nitpick:

On Wed, 20 May 2015, William Towle wrote:

 Add support for the ADV7612 chip as implemented on Renesas' Lager
 board to adv7604.c, including lists for formats/colourspace/timing
 selection and an IRQ handler.
 
 Signed-off-by: William Towle william.to...@codethink.co.uk
 ---
  drivers/media/i2c/adv7604.c |   83 
 +--
  1 file changed, 81 insertions(+), 2 deletions(-)
 
 diff --git a/drivers/media/i2c/adv7604.c b/drivers/media/i2c/adv7604.c
 index be3f866..a2abb04 100644
 --- a/drivers/media/i2c/adv7604.c
 +++ b/drivers/media/i2c/adv7604.c

[snip]

 @@ -2805,8 +2883,9 @@ static int adv76xx_probe(struct i2c_client *client,
   } else {
   val = (adv_smbus_read_byte_data_check(client, 0xea, false)  8)
   | (adv_smbus_read_byte_data_check(client, 0xeb, false)  
 0);
 - if (val != 0x2051) {
 - v4l2_info(sd, not an adv7611 on address 0x%x\n,
 + if ((state-info-type == ADV7611  val != 0x2051) ||
 + (state-info-type == ADV7612  val != 0x2041)) {
 + v4l2_info(sd, not an adv761x on address 0x%x\n,

A switch / case might look slightly better here.

Thanks
Guennadi

   client-addr  1);
   return -ENODEV;
   }
 -- 
 1.7.10.4
 
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[PATCH 03/20] media: adv7604: chip info and formats for ADV7612

2015-05-21 Thread William Towle 
Add support for the ADV7612 chip as implemented on Renesas' Lager
board to adv7604.c, including lists for formats/colourspace/timing
selection and an IRQ handler.

Signed-off-by: William Towle william.to...@codethink.co.uk
---
 drivers/media/i2c/adv7604.c |   83 +--
 1 file changed, 81 insertions(+), 2 deletions(-)

diff --git a/drivers/media/i2c/adv7604.c b/drivers/media/i2c/adv7604.c
index be3f866..a2abb04 100644
--- a/drivers/media/i2c/adv7604.c
+++ b/drivers/media/i2c/adv7604.c
@@ -80,6 +80,7 @@ MODULE_LICENSE(GPL);
 enum adv76xx_type {
ADV7604,
ADV7611,
+   ADV7612,
 };
 
 struct adv76xx_reg_seq {
@@ -753,6 +754,23 @@ static const struct adv76xx_format_info adv7611_formats[] 
= {
  ADV76XX_OP_MODE_SEL_SDR_422_2X | ADV76XX_OP_FORMAT_SEL_12BIT },
 };
 
+static const struct adv76xx_format_info adv7612_formats[] = {
+   { MEDIA_BUS_FMT_RGB888_1X24, ADV76XX_OP_CH_SEL_RGB, true, false,
+ ADV76XX_OP_MODE_SEL_SDR_444 | ADV76XX_OP_FORMAT_SEL_8BIT },
+   { MEDIA_BUS_FMT_YUYV8_2X8, ADV76XX_OP_CH_SEL_RGB, false, false,
+ ADV76XX_OP_MODE_SEL_SDR_422 | ADV76XX_OP_FORMAT_SEL_8BIT },
+   { MEDIA_BUS_FMT_YVYU8_2X8, ADV76XX_OP_CH_SEL_RGB, false, true,
+ ADV76XX_OP_MODE_SEL_SDR_422 | ADV76XX_OP_FORMAT_SEL_8BIT },
+   { MEDIA_BUS_FMT_UYVY8_1X16, ADV76XX_OP_CH_SEL_RBG, false, false,
+ ADV76XX_OP_MODE_SEL_SDR_422_2X | ADV76XX_OP_FORMAT_SEL_8BIT },
+   { MEDIA_BUS_FMT_VYUY8_1X16, ADV76XX_OP_CH_SEL_RBG, false, true,
+ ADV76XX_OP_MODE_SEL_SDR_422_2X | ADV76XX_OP_FORMAT_SEL_8BIT },
+   { MEDIA_BUS_FMT_YUYV8_1X16, ADV76XX_OP_CH_SEL_RGB, false, false,
+ ADV76XX_OP_MODE_SEL_SDR_422_2X | ADV76XX_OP_FORMAT_SEL_8BIT },
+   { MEDIA_BUS_FMT_YVYU8_1X16, ADV76XX_OP_CH_SEL_RGB, false, true,
+ ADV76XX_OP_MODE_SEL_SDR_422_2X | ADV76XX_OP_FORMAT_SEL_8BIT },
+};
+
 static const struct adv76xx_format_info *
 adv76xx_format_info(struct adv76xx_state *state, u32 code)
 {
@@ -2465,6 +2483,11 @@ static void adv7611_setup_irqs(struct v4l2_subdev *sd)
io_write(sd, 0x41, 0xd0); /* STDI irq for any change, disable INT2 */
 }
 
+static void adv7612_setup_irqs(struct v4l2_subdev *sd)
+{
+   io_write(sd, 0x41, 0xd0); /* disable INT2 */
+}
+
 static void adv76xx_unregister_clients(struct adv76xx_state *state)
 {
unsigned int i;
@@ -2552,6 +2575,19 @@ static const struct adv76xx_reg_seq 
adv7611_recommended_settings_hdmi[] = {
{ ADV76XX_REG_SEQ_TERM, 0 },
 };
 
+static const struct adv76xx_reg_seq adv7612_recommended_settings_hdmi[] = {
+   { ADV76XX_REG(ADV76XX_PAGE_CP, 0x6c), 0x00 },
+   { ADV76XX_REG(ADV76XX_PAGE_HDMI, 0x9b), 0x03 },
+   { ADV76XX_REG(ADV76XX_PAGE_HDMI, 0x6f), 0x08 },
+   { ADV76XX_REG(ADV76XX_PAGE_HDMI, 0x85), 0x1f },
+   { ADV76XX_REG(ADV76XX_PAGE_HDMI, 0x87), 0x70 },
+   { ADV76XX_REG(ADV76XX_PAGE_HDMI, 0x57), 0xda },
+   { ADV76XX_REG(ADV76XX_PAGE_HDMI, 0x58), 0x01 },
+   { ADV76XX_REG(ADV76XX_PAGE_HDMI, 0x03), 0x98 },
+   { ADV76XX_REG(ADV76XX_PAGE_HDMI, 0x4c), 0x44 },
+   { ADV76XX_REG_SEQ_TERM, 0 },
+};
+
 static const struct adv76xx_chip_info adv76xx_chip_info[] = {
[ADV7604] = {
.type = ADV7604,
@@ -2640,17 +2676,59 @@ static const struct adv76xx_chip_info 
adv76xx_chip_info[] = {
.field1_vsync_mask = 0x3fff,
.field1_vbackporch_mask = 0x3fff,
},
+   [ADV7612] = {
+   .type = ADV7612,
+   .has_afe = false,
+   .max_port = ADV7604_PAD_HDMI_PORT_B,
+   .num_dv_ports = 2,
+   .edid_enable_reg = 0x74,
+   .edid_status_reg = 0x76,
+   .lcf_reg = 0xa3,
+   .tdms_lock_mask = 0x43,
+   .cable_det_mask = 0x01,
+   .fmt_change_digital_mask = 0x03,
+   .formats = adv7612_formats,
+   .nformats = ARRAY_SIZE(adv7612_formats),
+   .set_termination = adv7611_set_termination,
+   .setup_irqs = adv7612_setup_irqs,
+   .read_hdmi_pixelclock = adv7611_read_hdmi_pixelclock,
+   .read_cable_det = adv7611_read_cable_det,
+   .recommended_settings = {
+   [1] = adv7612_recommended_settings_hdmi,
+   },
+   .num_recommended_settings = {
+   [1] = ARRAY_SIZE(adv7612_recommended_settings_hdmi),
+   },
+   .page_mask = BIT(ADV76XX_PAGE_IO) | BIT(ADV76XX_PAGE_CEC) |
+   BIT(ADV76XX_PAGE_INFOFRAME) | BIT(ADV76XX_PAGE_AFE) |
+   BIT(ADV76XX_PAGE_REP) |  BIT(ADV76XX_PAGE_EDID) |
+   BIT(ADV76XX_PAGE_HDMI) | BIT(ADV76XX_PAGE_CP),
+   .linewidth_mask = 0x1fff,
+   .field0_height_mask = 0x1fff,
+   .field1_height_mask = 0x1fff,
+   .hfrontporch_mask = 0x1fff,
+   .hsync_mask =