CI reset takes several seconds on some CAM,
so there is no need to lock mutex all that time.
Also we need not to preserve CI's reset bits in
CIBUSCTRL register, they are handled automatically by FPGA.
Set it to 0 explicitly in order to not reset wrong CAM.
Signed-off-by: Abylay Ospan <aos...@netup.ru>
---
drivers/media/video/cx23885/altera-ci.c | 14 ++++++++++----
1 files changed, 10 insertions(+), 4 deletions(-)
diff --git a/drivers/media/video/cx23885/altera-ci.c
b/drivers/media/video/cx23885/altera-ci.c
index 019797b..90147d6 100644
--- a/drivers/media/video/cx23885/altera-ci.c
+++ b/drivers/media/video/cx23885/altera-ci.c
@@ -283,7 +283,7 @@ int netup_ci_op_cam(struct dvb_ca_en50221 *en50221, int
slot,
netup_fpga_op_rw(inter, NETUP_CI_ADDR1, ((addr >> 7) & 0x7f), 0);
store = netup_fpga_op_rw(inter, NETUP_CI_BUSCTRL, 0, NETUP_CI_FLG_RD);
- store &= 0x3f;
+ store &= 0x0f;
store |= ((state->nr << 7) | (flag << 6));
netup_fpga_op_rw(inter, NETUP_CI_BUSCTRL, store, 0);
@@ -340,19 +340,25 @@ int netup_ci_slot_reset(struct dvb_ca_en50221 *en50221,
int slot)
ret = netup_fpga_op_rw(inter, NETUP_CI_BUSCTRL, 0, NETUP_CI_FLG_RD);
netup_fpga_op_rw(inter, NETUP_CI_BUSCTRL,
- ret | (1 << (5 - state->nr)), 0);
+ (ret & 0xcf) | (1 << (5 - state->nr)), 0);
+
+ mutex_unlock(&inter->fpga_mutex);
for (;;) {
mdelay(50);
+
+ mutex_lock(&inter->fpga_mutex);
+
ret = netup_fpga_op_rw(inter, NETUP_CI_BUSCTRL,
0, NETUP_CI_FLG_RD);
+ mutex_unlock(&inter->fpga_mutex);
+
if ((ret & (1 << (5 - state->nr))) == 0)
break;
if (time_after(jiffies, t_out))
break;
}
- mutex_unlock(&inter->fpga_mutex);
printk("%s: %d msecs\n", __func__,
jiffies_to_msecs(jiffies + msecs_to_jiffies(9999) - t_out));
@@ -381,7 +387,7 @@ int netup_ci_slot_ts_ctl(struct dvb_ca_en50221 *en50221,
int slot)
ret = netup_fpga_op_rw(inter, NETUP_CI_BUSCTRL, 0, NETUP_CI_FLG_RD);
netup_fpga_op_rw(inter, NETUP_CI_BUSCTRL,
- ret | (1 << (3 - state->nr)), 0);
+ (ret & 0x0f) | (1 << (3 - state->nr)), 0);
mutex_unlock(&inter->fpga_mutex);
--
1.7.1
--
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