Pawel Osciak wrote:
Architectures with non-coherent CPU cache (e.g. ARM) may require a cache
flush or invalidation before starting a hardware operation if the data in
a video buffer being queued has been touched by the CPU.
This patch adds calls to sync before a hardware operation that are
Architectures with non-coherent CPU cache (e.g. ARM) may require a cache
flush or invalidation before starting a hardware operation if the data in
a video buffer being queued has been touched by the CPU.
This patch adds calls to sync before a hardware operation that are expected
to be interpreted
