RE: [PATCH 3/4 v8] TVP7002 driver for DM365

2009-11-30 Thread Karicheri, Muralidharan
Hans,

>
>Note: Murali made a new function that will fill in the v4l2_dv_enum_preset
>based on the preset value. It's not yet in the v4l-dvb repository although
>I hope that the timing patches will go in soon. The only thing I'm waiting
>for is the revised documentation patch.
>
I will try to spend some time on these this week.

>BTW: I think we need a g_dv_preset ops as well. That seems to be missing.
>Murali,
>is there any reason why we do not have that?

One reason is we don't have a g_std() ops since core maintains the current
norm. Other reason is at this point I don't see why we need this since bridge 
device driver is going to save the current std or current dv_preset set by 
application if s_std() or s_dv_preset() is successful. So if application calls 
G_DV_PRESET, bridge device driver will return the last
successful std or dv_preset value. If we really need it for some reason, we 
could add it later when we integrate the vpfe/vpif drivers with this driver. 
>
>> +}
>
>Did you check whether it is really needed to power the chip off and on
>here?
>
>It still makes no sense to me that you have to do this.


Can we make this a TODO item which can be addressed later? This driver is
holding up my vpfe enhancements to support HD. This works functionally
and we can always enhance the driver as required. So I suggest to keep
this as a TODO item and address later using another patch.
>>
>
Murali
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Re: [PATCH 3/4 v8] TVP7002 driver for DM365

2009-11-25 Thread Hans Verkuil
On Wednesday 25 November 2009 20:39:20 santiago.nu...@ridgerun.com wrote:
> From: Santiago Nunez-Corrales 
> 
> This patch provides the implementation of the TVP7002 decoder
> driver for DM365. Implemented using the V4L2 DV presets API.
> Removed shadow register values.
> 
> Signed-off-by: Santiago Nunez-Corrales 
> ---
>  drivers/media/video/tvp7002.c | 1331 
> +
>  1 files changed, 1331 insertions(+), 0 deletions(-)
>  create mode 100644 drivers/media/video/tvp7002.c
> 
> diff --git a/drivers/media/video/tvp7002.c b/drivers/media/video/tvp7002.c
> new file mode 100644
> index 000..bce4d8a
> --- /dev/null
> +++ b/drivers/media/video/tvp7002.c
> @@ -0,0 +1,1331 @@
> +/* Texas Instruments Triple 8-/10-BIT 165-/110-MSPS Video and Graphics
> + * Digitizer with Horizontal PLL registers
> + *
> + * Copyright (C) 2009 Texas Instruments Inc
> + * Author: Santiago Nunez-Corrales 
> + *
> + * This code is partially based upon the TVP5150 driver
> + * written by Mauro Carvalho Chehab (mche...@infradead.org),
> + * the TVP514x driver written by Vaibhav Hiremath 
> + * and the TVP7002 driver in the TI LSP 2.10.00.14. Revisions by
> + * Muralidharan Karicheri and Snehaprabha Narnakaje (TI).
> + *
> + * This program is free software; you can redistribute it and/or modify
> + * it under the terms of the GNU General Public License as published by
> + * the Free Software Foundation; either version 2 of the License, or
> + * (at your option) any later version.
> + *
> + * This program is distributed in the hope that it will be useful,
> + * but WITHOUT ANY WARRANTY; without even the implied warranty of
> + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
> + * GNU General Public License for more details.
> + *
> + * You should have received a copy of the GNU General Public License
> + * along with this program; if not, write to the Free Software
> + * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
> + */
> +#include 
> +#include 
> +#include 
> +#include 
> +#include 
> +#include 
> +#include "tvp7002_reg.h"
> +
> +MODULE_DESCRIPTION("TI TVP7002 Video and Graphics Digitizer driver");
> +MODULE_AUTHOR("Santiago Nunez-Corrales ");
> +MODULE_LICENSE("GPL");
> +
> +/* Module Name */
> +#define TVP7002_MODULE_NAME  "tvp7002"
> +
> +/* I2C retry attempts */
> +#define I2C_RETRY_COUNT  (5)
> +
> +/* End of registers */
> +#define TVP7002_EOR  0x5c
> +
> +/* Read write definition for registers */
> +#define TVP7002_READ 0
> +#define TVP7002_WRITE1
> +#define TVP7002_RESERVED 2
> +
> +/* Indexes for digital video presets */
> +#define INDEX_720P60 0
> +#define INDEX_1080I601
> +#define INDEX_1080I502
> +#define INDEX_720P50 3
> +#define INDEX_1080P604
> +#define INDEX_480P59_94  5
> +#define INDEX_576P50 6
> +
> +/* Interlaced vs progressive mask and shift */
> +#define TVP7002_IP_SHIFT 5
> +#define TVP7002_INPR_MASK(0x01 << TVP7002_IP_SHIFT)
> +
> +/* Shift for CPL and LPF registers */
> +#define TVP7002_CL_SHIFT 8
> +#define TVP7002_CL_MASK  0x0f
> +
> +/* Debug functions */
> +static int debug;
> +module_param(debug, bool, 0644);
> +MODULE_PARM_DESC(debug, "Debug level (0-2)");
> +
> +/* Structure for register values */
> +struct i2c_reg_value {
> + u8 reg;
> + u8 value;
> + u8 type;
> +};
> +
> +/*
> + * Register default values (according to tvp7002 datasheet)
> + * In the case of read-only registers, the value (0xff) is
> + * never written. R/W functionality is controlled by the
> + * writable bit in the register struct definition.
> + */
> +static const struct i2c_reg_value tvp7002_init_default[] = {
> + { TVP7002_CHIP_REV, 0xff, TVP7002_READ },
> + { TVP7002_HPLL_FDBK_DIV_MSBS, 0x67, TVP7002_WRITE },
> + { TVP7002_HPLL_FDBK_DIV_LSBS, 0x20, TVP7002_WRITE },
> + { TVP7002_HPLL_CRTL, 0xa0, TVP7002_WRITE },
> + { TVP7002_HPLL_PHASE_SEL, 0x80, TVP7002_WRITE },
> + { TVP7002_CLAMP_START, 0x32, TVP7002_WRITE },
> + { TVP7002_CLAMP_W, 0x20, TVP7002_WRITE },
> + { TVP7002_HSYNC_OUT_W, 0x60, TVP7002_WRITE },
> + { TVP7002_B_FINE_GAIN, 0x00, TVP7002_WRITE },
> + { TVP7002_G_FINE_GAIN, 0x00, TVP7002_WRITE },
> + { TVP7002_R_FINE_GAIN, 0x00, TVP7002_WRITE },
> + { TVP7002_B_FINE_OFF_MSBS, 0x80, TVP7002_WRITE },
> + { TVP7002_G_FINE_OFF_MSBS, 0x80, TVP7002_WRITE },
> + { TVP7002_R_FINE_OFF_MSBS, 0x80, TVP7002_WRITE },
> + { TVP7002_SYNC_CTL_1, 0x20, TVP7002_WRITE },
> + { TVP7002_HPLL_AND_CLAMP_CTL, 0x2e, TVP7002_WRITE },
> + { TVP7002_SYNC_ON_G_THRS, 0x5d, TVP7002_WRITE },
> + { TVP7002_SYNC_SEPARATOR_THRS, 0x47, TVP7002_WRITE },
> + { TVP7002_HPLL_PRE_COAST, 0x00, TVP7002_WRITE },
> + { TVP7002_HPLL_POST_COAST, 0x00, TVP7002_WRITE },
> + { TVP