Re: [PATCH v7 2/2] v4l: cadence: Add Cadence MIPI-CSI2 RX driver

2018-02-15 Thread Maxime Ripard
On Wed, Feb 14, 2018 at 05:03:26PM +0200, Laurent Pinchart wrote: > On Wednesday, 14 February 2018 15:19:33 EET Maxime Ripard wrote: > > On Thu, Feb 08, 2018 at 08:17:19PM +0200, Laurent Pinchart wrote: > > >> +/* > > >> + * Create a static mapping between the CSI virtual channels >

Re: [PATCH v7 2/2] v4l: cadence: Add Cadence MIPI-CSI2 RX driver

2018-02-14 Thread Laurent Pinchart
Hi Maxime, On Wednesday, 14 February 2018 15:19:33 EET Maxime Ripard wrote: > On Thu, Feb 08, 2018 at 08:17:19PM +0200, Laurent Pinchart wrote: > >> + /* > >> + * Create a static mapping between the CSI virtual channels > >> + * and the output stream. > >> + * > >> + * This should be enha

Re: [PATCH v7 2/2] v4l: cadence: Add Cadence MIPI-CSI2 RX driver

2018-02-14 Thread Maxime Ripard
Hi Laurent, On Thu, Feb 08, 2018 at 08:17:19PM +0200, Laurent Pinchart wrote: > > + /* > > +* Create a static mapping between the CSI virtual channels > > +* and the output stream. > > +* > > +* This should be enhanced, but v4l2 lacks the support for > > +* changing that mapp

Re: [PATCH v7 2/2] v4l: cadence: Add Cadence MIPI-CSI2 RX driver

2018-02-08 Thread Laurent Pinchart
Hi Maxime, Thank you for the patch. On Thursday, 8 February 2018 17:08:30 EET Maxime Ripard wrote: > The Cadence CSI-2 RX Controller is an hardware block meant to be used as a > bridge between a CSI-2 bus and pixel grabbers. > > It supports operating with internal or external D-PHY, with up to 4

[PATCH v7 2/2] v4l: cadence: Add Cadence MIPI-CSI2 RX driver

2018-02-08 Thread Maxime Ripard
The Cadence CSI-2 RX Controller is an hardware block meant to be used as a bridge between a CSI-2 bus and pixel grabbers. It supports operating with internal or external D-PHY, with up to 4 lanes, or without any D-PHY. The current code only supports the former case. It also support dynamic mappin