On Wed, 2019-06-12 at 10:00 +0200, Hans Verkuil wrote:
> On 6/12/19 9:55 AM, Hans Verkuil wrote:
> > On 6/11/19 2:50 PM, Philipp Zabel wrote:
> > > There are several other SoCs that contain Hantro IP based VPUs, such as
> > > NXP i.MX8MQ (Hantro G1 and G2) and i.MX8MM (Hantro G1, G2, and H1). To
>
On Wed, 12 Jun 2019 10:00:45 +0200
Hans Verkuil wrote:
> On 6/12/19 9:55 AM, Hans Verkuil wrote:
> > On 6/11/19 2:50 PM, Philipp Zabel wrote:
> >> There are several other SoCs that contain Hantro IP based VPUs, such as
> >> NXP i.MX8MQ (Hantro G1 and G2) and i.MX8MM (Hantro G1, G2, and H1). To
On 6/12/19 9:55 AM, Hans Verkuil wrote:
> On 6/11/19 2:50 PM, Philipp Zabel wrote:
>> There are several other SoCs that contain Hantro IP based VPUs, such as
>> NXP i.MX8MQ (Hantro G1 and G2) and i.MX8MM (Hantro G1, G2, and H1). To
>> maximize code sharing, add initial support for these SoCs to the
On 6/11/19 2:50 PM, Philipp Zabel wrote:
> There are several other SoCs that contain Hantro IP based VPUs, such as
> NXP i.MX8MQ (Hantro G1 and G2) and i.MX8MM (Hantro G1, G2, and H1). To
> maximize code sharing, add initial support for these SoCs to the
> Rockchip VPU driver, after renaming it to
