2010/3/31 Andreas Regel andreas.re...@gmx.de:
Hi Sergey,
Am 31.03.2010 12:14, schrieb Sergey Mironov:
Hello maillist!
I am integrating frontend with dvb-demux driver of one device
called mdemux.
The frontend includes following parts:
- stv0903bab demodulator
- stv6110a tuner
- lnbp21 power supply controller
stv6110a is connected to i2c bus via stv0903's repeater.
My question is about setting up i2c repeater frequency divider (I2CRPT
register). stv0903 datasheet says that the speed of the i2c repeater
obtained by
dividing the internal chip frequency (that is, 135 MHz)
budget.c driver uses value STV090x_RPTLEVEL_16 for this divider. But
135*10^6/16 is still too high to be valid i2c freq.
Please explain where I'm wrong. Does the base frequency really equals to
135
Mhz? Thanks.
The frequency divider in I2CRPT controls the speed of the I2C repeater HW
unit inside the STV0903. The I2C clock itself has the same speed as the one
that is used to access the STV0903. The repeater basically just routes the
signals from one bus to the other and needs a higher internal frequency to
do that properly. That is the frequency you set up with I2CRPT.
Regards
Andreas
Thanks, Andreas! Of cause, different i2c bus frequencies would require
some buffer inside repeater. But there is no information about such
things.
I've checked carefully and it seems that ENARPT_LEVEL actually defines
repeater delay.
--
Sergey
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