-Original Message-
From: Kevin Hilman [mailto:khil...@ti.com]
Sent: Wednesday, January 05, 2011 6:02 AM
To: Santosh Shilimkar
Cc: Paul Walmsley; linux-omap@vger.kernel.org; t...@atomide.com;
linux-arm-ker...@lists.infradead.org
Subject: Re: [PATCH 2/5] omap2plus: prm: Trvial build
From fffa19df17d73c1ed2e8c65c0b6604ee1dddff84 Mon Sep 17 00:00:00 2001
From: Adrian Hunter adrian.hun...@nokia.com
Date: Wed, 24 Nov 2010 13:23:21 +0200
Subject: [PATCH] OMAP: DMA: clear interrupt status correctly
When clearing the DMA channel, clear all status bits.
When handling a DMA
On Wed, Jan 5, 2011 at 8:20 AM, Fernando Guzman Lugo
fernando.l...@ti.com wrote:
Otherwise a virtual address beyond of the L1 size is used,
the MMU hardware will look into a memory that does not belong to
L1 translation tables. IOW; the MMU would allow to access any
memory, configured or not.
On Wed, Jan 5, 2011 at 12:01 AM, Rafael J. Wysocki r...@sisk.pl wrote:
On Tuesday, January 04, 2011, Jean Pihet wrote:
Hi,
On Tue, Jan 4, 2011 at 12:29 PM, Pavel Machek pa...@ucw.cz wrote:
Hi!
Uses the machine_suspend trace point, called from the
generic kernel suspend_enter function.
On Wednesday, January 05, 2011, Jean Pihet wrote:
On Wed, Jan 5, 2011 at 12:01 AM, Rafael J. Wysocki r...@sisk.pl wrote:
On Tuesday, January 04, 2011, Jean Pihet wrote:
Hi,
On Tue, Jan 4, 2011 at 12:29 PM, Pavel Machek pa...@ucw.cz wrote:
Hi!
Uses the machine_suspend trace point,
Kevin,
On Wed, Jan 5, 2011 at 04:47, Tony Lindgren t...@atomide.com wrote:
* Kevin Hilman khil...@ti.com [110104 14:45]:
On Tue, 2011-01-04 at 09:52 -0800, Kevin Hilman wrote:
Mika Westerberg ext-mika.1.westerb...@nokia.com writes:
In case on OMAP2+ we call set_24xx_gpio_triggering()
-Original Message-
From: Menon, Nishanth
Sent: Monday, January 03, 2011 9:22 PM
To: Gopinath, Thara
Cc: linux-omap@vger.kernel.org; khil...@deeprootsystems.com;
p...@pwsan.com; Cousson, Benoit; Sripathy, Vishwanath; Sawant, Anand
Subject: Re: [PATCH] OMAP3: PM: Adding T2 enabling of
Hi,
On Mon, 2011-01-03 at 18:20 +0530, ext Guruswamy Senthilvadivu wrote:
From: Senthilvadivu Guruswamy svad...@ti.com
omap_display_init function is introduced in devices.c to do the DSS driver
registration. So replace platform_device_register or platform_add_devices of
DSS with
-Original Message-
From: Hilman, Kevin
Sent: Wednesday, January 05, 2011 4:18 AM
To: Gopinath, Thara
Cc: linux-omap@vger.kernel.org; p...@pwsan.com; Cousson, Benoit; Sripathy,
Vishwanath; Sawant, Anand; Menon, Nishanth
Subject: Re: [PATCH] OMAP3: PM: Adding T2 enabling of smartreflex
Hi Tomi,
On Wed, Jan 5, 2011 at 4:21 PM, Tomi Valkeinen tomi.valkei...@nokia.com wrote:
Hi,
On Mon, 2011-01-03 at 18:20 +0530, ext Guruswamy Senthilvadivu wrote:
From: Senthilvadivu Guruswamy svad...@ti.com
omap_display_init function is introduced in devices.c to do the DSS driver
On Tue, Jan 4, 2011 at 7:03 PM, Nishanth Menon n...@ti.com wrote:
jean.pi...@newoldbits.com had written, on 01/04/2011 04:17 AM, the
following:
[..]
diff --git a/arch/arm/mach-omap2/pm34xx.c b/arch/arm/mach-omap2/pm34xx.c
index 0ec8a04..0ee0b0e 100644
--- a/arch/arm/mach-omap2/pm34xx.c
+++
LD init/built-in.o
LD .tmp_vmlinux1
arch/arm/mach-omap2/built-in.o: In function `omap2_set_init_voltage':
arch/arm/mach-omap2/pm.c:181: undefined reference to
`omap_voltage_domain_lookup'
arch/arm/mach-omap2/built-in.o: In function `omap4_twl_init':
arch/arm/mach-omap2/omap_twl.c:244:
omap2plus_defocnfig build breaks when customised with only ARCH_OMAP4
selected. This is because common files make references to the functions
which are defined only for omap2xxx and omap3xxx.
LD .tmp_vmlinux1
arch/arm/mach-omap2/built-in.o: In function `pm_dbg_regset_store':
CC arch/arm/mach-omap2/omap_hwmod_common_data.o
In file included from arch/arm/plat-omap/include/plat/omap_hwmod.h:38,
from arch/arm/mach-omap2/omap_hwmod_common_data.c:20:
arch/arm/plat-omap/include/plat/voltage.h: In function 'omap_voltage_late_init':
struct clockdomain member clktrctrl_mask is available for only for OMAP2
and OMAP3 architectures. Technially it is also used only for these archs
but this breaks the build with custom OMAP4 configuration.
CC arch/arm/mach-omap2/clockdomain.o
arch/arm/mach-omap2/clockdomain.c: In function
Fix below build warnings
CC arch/arm/mach-omap2/common.o
CC arch/arm/mach-omap2/gpio.o
In file included from arch/arm/plat-omap/include/plat/omap_hwmod.h:38,
from arch/arm/mach-omap2/gpio.c:25:
arch/arm/plat-omap/include/plat/voltage.h: In function
-Original Message-
From: Kevin Hilman [mailto:khil...@ti.com]
Sent: Wednesday, January 05, 2011 6:08 AM
To: Santosh Shilimkar
Cc: linux-omap@vger.kernel.org; t...@atomide.com; linux-arm-
ker...@lists.infradead.org
Subject: Re: [PATCH 0/5] omap2plus: Trivial build break fixes
Hi Paul,
On Tue, Jan 4, 2011 at 7:48 PM, Paul Walmsley p...@pwsan.com wrote:
Hello Jean,
On Tue, 4 Jan 2011, jean.pi...@newoldbits.com wrote:
From: Jean Pihet j-pi...@ti.com
The patch adds the new power management trace points for
the OMAP architecture.
The trace points are for:
-
On Wed, Jan 05, 2011 at 04:27:04PM +0530, Santosh Shilimkar wrote:
CC arch/arm/mach-omap2/omap_hwmod_common_data.o
In file included from arch/arm/plat-omap/include/plat/omap_hwmod.h:38,
from arch/arm/mach-omap2/omap_hwmod_common_data.c:20:
Hi!
I am in favor of 3) of 4).
What do you think?
Why don't we keep the tracepoints as proposed _and_ add two additional
tracepoints around device suspend-resume?
I like the idea but that requires to extend the current API with
additional suspend tracepoints or device state
Hi,
On Mon, 2011-01-03 at 18:21 +0530, ext Guruswamy Senthilvadivu wrote:
From: Senthilvadivu Guruswamy svad...@ti.com
Hwmod adaptation design requires each of the DSS HW IP to be a platform
driver.
Platform driver of dsshw has to be registered before of dispc, rfbi, dsi1,
venc and
-Original Message-
From: Russell King - ARM Linux [mailto:li...@arm.linux.org.uk]
Sent: Wednesday, January 05, 2011 4:50 PM
To: Santosh Shilimkar
Cc: linux-omap@vger.kernel.org; khil...@ti.com; Nishanth Menon;
t...@atomide.com; Kevin Hilman; Thara Gopinath; linux-arm-
dmtimer adaptation to platform_driver.
This patch series is adaptation of dmtimer code to platform driver
using omap_device and omap_hwmod abstraction.
Tested on following platforms:
OMAP1710 H3 SDP
OMAP2420 SDP
OMAP2430 SDP
OMAP3430 SDP
OMAP3630 SDP
OMAP4430 SDP
Baseline:
From: Thara Gopinath th...@ti.com
Add dmtimer data.
Signed-off-by: Thara Gopinath th...@ti.com
Signed-off-by: Tarun Kanti DebBarma tarun.ka...@ti.com
Acked-by: Cousson, Benoit b-cous...@ti.com
---
arch/arm/mach-omap2/omap_hwmod_2420_data.c | 634
From: Thara Gopinath th...@ti.com
Add dmtimer data.
Signed-off-by: Thara Gopinath th...@ti.com
Signed-off-by: Tarun Kanti DebBarma tarun.ka...@ti.com
Acked-by: Cousson, Benoit b-cous...@ti.com
---
arch/arm/mach-omap2/omap_hwmod_2430_data.c | 633
1 files changed,
From: Thara Gopinath th...@ti.com
Add dmtimer data.
Signed-off-by: Thara Gopinath th...@ti.com
Signed-off-by: Tarun Kanti DebBarma tarun.ka...@ti.com
Acked-by: Cousson, Benoit b-cous...@ti.com
---
arch/arm/mach-omap2/omap_hwmod_3xxx_data.c | 675
1 files changed,
The low-level read and write access routines wait on
write-pending register in posted mode to make sure that
previous write is complete on respective registers.
This waiting is done in an infinite while loop. Now it
is being modified to use timeout instead.
Signed-off-by: Tarun Kanti DebBarma
From: Cousson, Benoit b-cous...@ti.com
Add dmtimer data.
Signed-off-by: Cousson, Benoit b-cous...@ti.com
Signed-off-by: Tarun Kanti DebBarma tarun.ka...@ti.com
---
arch/arm/mach-omap2/omap_hwmod_44xx_data.c | 622
arch/arm/plat-omap/include/plat/dmtimer.h |2 +
switch-over to platform device driver through following changes:
(a) call to dmtimer initialization routine from timer-gp.c is
removed (b) initiate dmtimer early initialization from omap2_init_common_hw
in io.c (c) modify plat-omap/dmtimer routines to use new register map and
platform data.
From: Thara Gopinath th...@ti.com
Add dmtimer platform driver functions which include:
(1) platform driver initialization
(2) driver probe function
(3) driver remove function
Signed-off-by: Tarun Kanti DebBarma tarun.ka...@ti.com
Signed-off-by: Thara Gopinath th...@ti.com
Acked-by: Cousson,
Add pm_runtime support to dmtimer. Since dmtimer is used during
early boot before pm_runtime is initialized completely there are
provisions to enable/disable clocks directly in the code during
early boot.
Signed-off-by: Tarun Kanti DebBarma tarun.ka...@ti.com
[p-bas...@ti.com: added pm_runtime
Add routines to converts dmtimers to platform devices. The device data
is obtained from hwmod database of respective platform and is registered
to device model after successful binding to driver. It also provides
provision to access timers during early boot when pm_runtime framework
is not
From: Thara Gopinath th...@ti.com
Convert OMAP1 dmtimers into a platform devices and then registers with
device model framework so that it can be bound to corresponding driver.
Signed-off-by: Thara Gopinath th...@ti.com
Signed-off-by: Tarun Kanti DebBarma tarun.ka...@ti.com
Acked-by: Cousson,
From: Thara Gopinath th...@ti.com
Add device name to OMAP2 dmtimer fclk nodes so that the fclk nodes can be
retrieved by doing a clk_get with the corresponding device pointers or
device names.
NOTE: gpt1_fck is modified in patch-10 when we switch to platform device
driver. This is to make sure
Hi Tomi,
On Wed, Jan 5, 2011 at 4:57 PM, Tomi Valkeinen tomi.valkei...@nokia.com wrote:
Hi,
On Mon, 2011-01-03 at 18:21 +0530, ext Guruswamy Senthilvadivu wrote:
From: Senthilvadivu Guruswamy svad...@ti.com
Hwmod adaptation design requires each of the DSS HW IP to be a platform
driver.
Russell King - ARM Linux wrote, on 01/04/2011 06:25 PM:
On Tue, Jan 04, 2011 at 02:37:23PM -0600, Nishanth Menon wrote:
hmm.. minor nit (with codesourcery 2010.09-50 - 4.5.1):
rm arch/arm/mach-omap2/*.o;make C=1 arch/arm/mach-omap2/ 2Kerr;make C=2
arch/arm/mach-omap2/ 2Kerr1;diff Kerr Kerr1
-Original Message-
From: Santosh Shilimkar [mailto:santosh.shilim...@ti.com]
Sent: Wednesday, January 05, 2011 7:11 PM
To: linux-omap@vger.kernel.org
Cc: linux-arm-ker...@lists.infradead.org; Santosh Shilimkar; Paul
Walmsley
Subject: [PATCH] omap: wd_timer: Fix crash frm wdt_probe
Mark,
On Tue, Dec 28, 2010 at 8:18 AM, Mark Brown
broo...@opensource.wolfsonmicro.com wrote:
On Mon, Dec 27, 2010 at 10:17:02PM -0600, David Lambert wrote:
+ case 1920:
+ if (div == 5)
+ div_sel = 0x1;
+ else if (div == 8)
+
From: Ming Lei tom.leim...@gmail.com
Panda uses both twl6030 otg phy(vbus, id) and internal
phy(data lines, DP/DM), so removes usb_nop_xceiv_register to make
twl6030 otg driver working since current otg code only supports
one global transceiver. Otherwise, musb doesn't work without
the remove.
On Wed, Jan 05, 2011 at 07:56:13AM -0600, Lambert, David wrote:
On Tue, Dec 28, 2010 at 8:18 AM, Mark Brown
A comment explaining why we don't actually do anything with the request
would be helpful. Given that we're ignoring the event it'd seem better
to just leave it masked and not take
Hi,
It seems like there's a bug on flush_pmd_entry() for multicore ARM CPUs.
I'm testing 2.6.37 with pandaboard and when running reboot it gets
stuck on:
asm(mcrp15, 0, %0, c7, c10, 1 @ flush_pmd
: : r (pmd) : cc);
I added a few printk()s around the code to
Hi,
On Wed, Jan 05, 2011 at 09:40:19PM +0800, Ming Lei wrote:
Reviewed-by: Felipe Balbi ba...@ti.com
This is ok, but can only go after 2.6.38 merge window. There are patches
to add support for internal PHY. Ideally we would actually register both
PHYs and it would work. They would have
-Original Message-
From: linux-omap-ow...@vger.kernel.org [mailto:linux-omap-
ow...@vger.kernel.org] On Behalf Of Felipe Balbi
Sent: Wednesday, January 05, 2011 7:38 PM
To: Russell King; Tony Lindgren
Cc: Linux ARM Kernel Mailing List; Linux OMAP Mailing List
Subject: OMAP4 panda
Hi,
On Wed, Jan 05, 2011 at 07:44:31PM +0530, Santosh Shilimkar wrote:
What could it be ? Any more debugging I could do to help ?
This is known and seems to OMAP specific issue. Test patch and
Doesn't look like omap-specific from patch description. Looks like like
CPU1 is turned off and the
-Original Message-
From: Felipe Balbi [mailto:ba...@ti.com]
Sent: Wednesday, January 05, 2011 7:48 PM
To: Santosh Shilimkar
Cc: ba...@ti.com; Russell King; Tony Lindgren; Linux ARM Kernel
Mailing List; Linux OMAP Mailing List
Subject: Re: OMAP4 panda gets stuck during reboot
Hi,
Define the following architecture specific funtions for omap2/3
.clkdm_add_wkdep
.clkdm_del_wkdep
.clkdm_read_wkdep
.clkdm_clear_all_wkdeps
.clkdm_add_sleepdep
.clkdm_del_sleepdep
.clkdm_read_sleepdep
.clkdm_clear_all_sleepdeps
Convert the platform-independent framework to call these functions.
Define the following architecture specific funtions for omap2/3/4
.clkdm_clk_enable
.clkdm_clk_disable
Convert the platform-independent framework to call these functions.
Also rename the api's by removing the omap2_ preamble.
Hence call omap2_clkdm_k_enable as clkdm_clk_enable and
This patch series is an effort to split the clockdomain
framework into platform independent and platform specific parts
as was done for the powerdomain framework.
This certainlly helps remove the various cpu_is_* checks
which exist today in the framework and makes
the code more maintainable and
Define the following architecture specific funtions for omap2/3/4
.clkdm_allow_idle
.clkdm_deny_idle
Convert the platform-independent framework to call these functions.
Also rename the api's by removing the omap2_ preamble.
Hence call omap2_clkdm_allow_idle as clkdm_allow_idle and
Put infrastructure in place, so arch specific func pointers
can be hooked up to the platform-independent part of the
framework.
This is in preparation of splitting the clockdomain framework into
platform-independent part (for all omaps) and platform-specific
parts.
Signed-off-by: Rajendra Nayak
Define the following architecture specific funtions for omap2/3/4
.clkdm_sleep
.clkdm_wakeup
Convert the platform-independent framework to call these functions.
Also rename the api's by removing the omap2_ preamble.
Hence call omap2_clkdm_wakeup as clkdm_wakeup and
omap2_clkdm_sleep as
Hi,
On Wed, Jan 05, 2011 at 07:52:34PM +0530, Santosh Shilimkar wrote:
On Wed, Jan 05, 2011 at 07:44:31PM +0530, Santosh Shilimkar wrote:
What could it be ? Any more debugging I could do to help ?
This is known and seems to OMAP specific issue. Test patch and
Doesn't look like
On Wed, 2011-01-05 at 18:55 +0530, ext Semwal, Sumit wrote:
Hi Tomi,
On Wed, Jan 5, 2011 at 4:57 PM, Tomi Valkeinen tomi.valkei...@nokia.com
wrote:
Hi,
Does this even work if the DSS is compiled as a module? I have the
recollection that a module can only have one initcall, and in
On Mon, 2011-01-03 at 18:21 +0530, ext Guruswamy Senthilvadivu wrote:
From: Senthilvadivu Guruswamy svad...@ti.com
clks are moved to dss platform driver. clk_get/put APIs use dss device
instead
of core platform device. So the device name is changed from omap_display to
omap_dss in 2420,
Hello All,
I have rebased the available DVFS code for OMAP tree
against LO master which contains the latest OMAP voltage
layer and smartreflex changes and hosted it at
http://dev.omapzoom.org/?p=thara/omap-dvfs.git;a=shortlog;h=refs/heads/pm-dvfs
head - pm-dvfs
Regards
Thara
On Mon, 2011-01-03 at 18:21 +0530, ext Guruswamy Senthilvadivu wrote:
From: Senthilvadivu Guruswamy svad...@ti.com
For hwmod adaptation, move init exit methods from core.c to its driver probe,
remove. pdev member has to be maintained by its own drivers. Replace printk
with dev_dbg for boot
This is an attempt to clean up the omap
cpufreq driver so that it functions properly even with
multi omap builds. The main changes involve removal of
static CONFIG_ARCH_X checks and introducing relevant
cpu_is_X checks instead.
Signed-off-by: Thara Gopinath th...@ti.com
---
This patch is agains
memcpy() copies 8 bytes too much (omap_mux_entry vs. omap_mux). Correct
by replacing memcpy() with struct assignment, which is safer.
Signed-off-by: Aaro Koskinen aaro.koski...@nokia.com
---
arch/arm/mach-omap2/mux.c |2 +-
1 files changed, 1 insertions(+), 1 deletions(-)
diff --git
Hi Charu,
Varadarajan, Charulatha ch...@ti.com writes:
On Wed, Jan 5, 2011 at 04:47, Tony Lindgren t...@atomide.com wrote:
* Kevin Hilman khil...@ti.com [110104 14:45]:
On Tue, 2011-01-04 at 09:52 -0800, Kevin Hilman wrote:
Mika Westerberg ext-mika.1.westerb...@nokia.com writes:
In
Felipe Balbi ba...@ti.com writes:
On Tue, Jan 04, 2011 at 04:24:58PM -0800, Kevin Hilman wrote:
Felipe Balbi ba...@ti.com writes:
Instead of accessing the irq_desc array directly
we can use irq_to_desc(irq). That will allow us to,
if wanted, select SPARSE_IRQ and irq_descs will be
Gopinath, Thara th...@ti.com writes:
-Original Message-
From: Hilman, Kevin
Sent: Wednesday, January 05, 2011 4:18 AM
To: Gopinath, Thara
Cc: linux-omap@vger.kernel.org; p...@pwsan.com; Cousson, Benoit; Sripathy,
Vishwanath; Sawant, Anand; Menon, Nishanth
Subject: Re: [PATCH] OMAP3: PM:
Santosh Shilimkar santosh.shilim...@ti.com writes:
[...]
Minor nit in your git-send-email config.
Can you add the following to your ~/.gitconfig, or update to newer
git
where this is now the default:
[sendemail]
chainreplyto = false
This will make all patches a reply to PATCH 0
Adrian Hunter adrian.hun...@nokia.com writes:
From fffa19df17d73c1ed2e8c65c0b6604ee1dddff84 Mon Sep 17 00:00:00 2001
From: Adrian Hunter adrian.hun...@nokia.com
Date: Wed, 24 Nov 2010 13:23:21 +0200
Subject: [PATCH] OMAP: DMA: clear interrupt status correctly
When clearing the DMA channel,
This patch series changes dss clock names to generic role names for all DSS
clocks across clk APIs, hwmod data, dss driver.
It also changes the enums used within DSS framework to refer to the clocks
to make them generic and related to functionality than value.
eg. DSS_CLK_TVFCK replaces
opt clocks require (NULL, act-clock-name) as entries in clock database,
so that hwmod can replace it with (dev, role) tuple during hwmod data init.
These role names are aligned to be same across OMAP2420, 2430, 3xxx, 44xx
platforms,
so clk_get/put/enable/disable APIs in dss can use uniform role
From: Archit Taneja arc...@ti.com
enum dss_clock structure is replaced with generic names that
could be used across OMAP2420, 2430, 3xxx, 44xx platforms.
Signed-off-by: Archit Taneja arc...@ti.com
---
drivers/video/omap2/dss/core.c|4 +-
drivers/video/omap2/dss/dispc.c | 10 +++---
From: Archit Taneja arc...@ti.com
The dss struct in dss.c has omap2/3 specific clock names. Making them generic,
to increase readability and extendability.
Signed-off-by: Archit Taneja arc...@ti.com
---
drivers/video/omap2/dss/dss.c | 108
1 files
Hi Santosh,
Santosh Shilimkar santosh.shilim...@ti.com writes:
struct clockdomain member clktrctrl_mask is available for only for OMAP2
and OMAP3 architectures. Technially it is also used only for these archs
but this breaks the build with custom OMAP4 configuration.
I'll queue patches 3-5
This patch series enables support for OMAP4 DSS, and adds hwmod support
for dss, dispc, dsi1, dsi2, hdmi, rfbi and venc hwmods.
In OMAP4 there are severals IPs that can be reached by differents
interconnect paths depending of the access initiator (MPU vs. SDMA).
In the case of the DSS, both L3
From: Mayuresh Janorkar ma...@ti.com
Enable DSS2 and OMAPFB for OMAP4
Signed-off-by: Mayuresh Janorkar ma...@ti.com
---
drivers/video/omap2/dss/Kconfig|6 +++---
drivers/video/omap2/omapfb/Kconfig |6 +++---
2 files changed, 6 insertions(+), 6 deletions(-)
diff --git
From: Benoit Cousson b-cous...@ti.com
Add dss, dispc, dsi1, dsi2, hdmi, rfbi and venc hwmods.
In OMAP4 there are severals IPs that can be reached by differents
interconnect paths depending of the access initiator (MPU vs. SDMA).
In the case of the DSS, both L3 direct path and L4 CFG path can be
Add hwmod device names for OMAP4; this enables device build for omap4 dss
hwmod IPs.
Signed-off-by: Sumit Semwal sumit.sem...@ti.com
---
arch/arm/mach-omap2/display.c | 23 +++
1 files changed, 15 insertions(+), 8 deletions(-)
diff --git a/arch/arm/mach-omap2/display.c
Santosh Shilimkar santosh.shilim...@ti.com writes:
Commit ff2516fb 'wd_timer: disable on boot via hwmod postsetup mechanism'
introduced watchdog timer state state management using postsetup_state.
This was done to allow some board files to support watchdog coverage
throughout kernel
Currently, if one calls disable_irq(gpio_irq), the irq
won't get disabled.
This is happening because the omap gpio code defines only
a .mask callback. And the default_disable function is just
a stub. The result is that, when someone calls disable_irq
for an irq in a gpio line, it will be kept
On Wed, Jan 05, 2011 at 07:58:03PM +0200, Eduardo Valentin wrote:
Currently, if one calls disable_irq(gpio_irq), the irq
won't get disabled.
This is happening because the omap gpio code defines only
a .mask callback. And the default_disable function is just
a stub. The result is that, when
Hi,
On Wed, Jan 5, 2011 at 12:20 AM, Fernando Guzman Lugo
fernando.l...@ti.com wrote:
Otherwise a virtual address beyond of the L1 size is used,
the MMU hardware will look into a memory that does not belong to
L1 translation tables. IOW; the MMU would allow to access any
memory, configured or
From: Jean Pihet j-pi...@ti.com
Provides:
. calls to machine_suspend trace point,
. API Documentation
The OMAP specific changes will be submitted separately on
the linux-omap ML because:
- the OMAP changes need to be rebased on the latest linux-omap 2.6.37 tree,
- more feedback is needed from
From: Jean Pihet j-pi...@ti.com
Uses the machine_suspend trace point, called from the
generic kernel suspend_devices_and_enter function.
Signed-off-by: Jean Pihet j-pi...@ti.com
CC: Thomas Renninger tr...@suse.de
Acked-by: Rafael J. Wysocki r...@sisk.pl
---
kernel/power/suspend.c |3 +++
1
From: Jean Pihet j-pi...@ti.com
Provides documentation for the following:
- the new power trace API,
- the old (legacy) power trace API,
- the DEPRECATED Kconfig option usage.
Signed-off-by: Jean Pihet j-pi...@ti.com
---
Documentation/trace/events-power.txt | 90
Hello Russell,
On Wed, Jan 05, 2011 at 06:19:18PM +, Russell King wrote:
On Wed, Jan 05, 2011 at 07:58:03PM +0200, Eduardo Valentin wrote:
Currently, if one calls disable_irq(gpio_irq), the irq
won't get disabled.
This is happening because the omap gpio code defines only
a .mask
On Wed, Jan 5, 2011 at 12:46 PM, Ramirez Luna, Omar omar.rami...@ti.com wrote:
Hi,
On Wed, Jan 5, 2011 at 12:20 AM, Fernando Guzman Lugo
fernando.l...@ti.com wrote:
Otherwise a virtual address beyond of the L1 size is used,
the MMU hardware will look into a memory that does not belong to
L1
On Wed, Jan 05, 2011 at 09:24:25PM +0200, Eduardo Valentin wrote:
The way this works is that although it isn't disabled at that point,
if it never triggers, then everything remains happy. However, if it
does trigger, the genirq code will then mask the interrupt and won't
call the handler.
Beagle XM uses 3730 and the board design allows enabling 800MHz and 1GHz
OPPs. However, We need Smart reflex class 1.5 and ABB to enable 1GHz safely.
For the moment, we tweak the default table to allow for 800Mhz OPP usage.
Reported-by: Koen Kooi k...@beagleboard.org
Tested-by: Koen Kooi
Source: git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap-2.6.git
branch: omap-for-linus (dc69d1a omap2: Make OMAP2PLUS select OMAP_DM_TIMER)
Nishanth Menon (2):
omap3|4: opp: make omapx_opp_init non-static
OMAP3: beagle xm: enable upto 800MHz OPP
omap3 and omap4 opp_init should be made non-static to allow
for platform specific opp table tweaking. making these static
conflicts with the definition in pm.h(global) as well.
we include pm.h as well to ensure that there are no such prototype
conflicts with actual implementation in the future.
From: Guzman Lugo, Fernando fernando.l...@ti.com
IVA MMU can manage up to 4GB of address space through its page tables,
given that it's L1 is divided into 1MB sections it requires at least
16KB for its table which represents 4096 entries of 32 bits each.
Previously, only 1GB was being handled by
On Tue, Jan 04, 2011 at 04:06:39PM +0300, Sergei Shtylyov wrote:
Putting MUSB DMA enignes into drivers/dma/ is the same as taking *any*
chip capable of bus-mastering DMA, separating its bus mastering related
code from its driver and putting this code into drivers/dma/. This
doesn't make
On Wed, Jan 05, 2011 at 07:10:55PM +0530, Santosh Shilimkar wrote:
Commit ff2516fb 'wd_timer: disable on boot via hwmod postsetup mechanism'
introduced watchdog timer state state management using postsetup_state.
This was done to allow some board files to support watchdog coverage
throughout
Eduardo Valentin eduardo.valen...@nokia.com writes:
Hello Russell,
On Wed, Jan 05, 2011 at 06:19:18PM +, Russell King wrote:
On Wed, Jan 05, 2011 at 07:58:03PM +0200, Eduardo Valentin wrote:
Currently, if one calls disable_irq(gpio_irq), the irq
won't get disabled.
This is
Nishanth Menon n...@ti.com writes:
Beagle XM uses 3730 and the board design allows enabling 800MHz and 1GHz
OPPs. However, We need Smart reflex class 1.5 and ABB to enable 1GHz safely.
For the moment, we tweak the default table to allow for 800Mhz OPP usage.
Isn't this common to any board
Hi Tarun,
Tarun Kanti DebBarma tarun.ka...@ti.com writes:
From: Thara Gopinath th...@ti.com
Convert OMAP1 dmtimers into a platform devices and then registers with
device model framework so that it can be bound to corresponding driver.
Signed-off-by: Thara Gopinath th...@ti.com
linux-omap-ow...@vger.kernel.org wrote on :
Tony Lindgren wrote on Wednesday, January 05, 2011 4:56 AM:
* Paul Walmsley p...@pwsan.com [110104 09:48]:
On Tue, 4 Jan 2011, Pedanekar, Hemant wrote:
Looking at above, it seems another config option like
CONFIG_SOC_OMAP3XXX is also needed in
checkpatch warns that pointers for certain structs should be const,
and platform_suspend_ops is one of those structs. If you follow this
suggestion you trade a checkpatch warning for a compiler warning of
the form:
warning: passing argument 1 of 'suspend_set_ops' discards qualifiers from
Hi Aaro,
Aaro Koskinen aaro.koski...@nokia.com writes:
Make !CONFIG_SUSPEND init declarations identical on all OMAPs and
eliminate some ifdefs.
Signed-off-by: Aaro Koskinen aaro.koski...@nokia.com
I like this solution, but it introduces compiler warnings:
Nishanth Menon n...@ti.com writes:
omap_enable_smartreflex_on_init is meant to be used by boards
which would like to have SR enabled by default on the platform, while
omap_devinit_smartreflex is used by pm code, the protos are defined
in pm.h. This header should be included to ensure that
Tarun Kanti DebBarma tarun.ka...@ti.com writes:
From: Thara Gopinath th...@ti.com
Add dmtimer data.
Signed-off-by: Thara Gopinath th...@ti.com
Signed-off-by: Tarun Kanti DebBarma tarun.ka...@ti.com
Acked-by: Cousson, Benoit b-cous...@ti.com
This patch only adds GPT1-11. What about GPT12
Tarun Kanti DebBarma tarun.ka...@ti.com writes:
dmtimer adaptation to platform_driver.
This patch series is adaptation of dmtimer code to platform driver
using omap_device and omap_hwmod abstraction.
Tested on following platforms:
OMAP1710 H3 SDP
OMAP2420 SDP
OMAP2430 SDP
OMAP3430 SDP
Subpage reading already provides a certain degree of alignment in that it
aligns the reads to 16-bits if the bus is 16-bits wide.
For some situations this is not enough. For eample, the OMAP2 prefetch
engine only works with u32 aligned buffers and read sizes.
This patch set adds a mechanism to
Some nand controllers (eg. omap2) need to have their buffers u32 aligned
to use high speed transfer mechanisms.
This commit provides a way to plug in an alignment function and provides a
32-bit algnment function.
Signed-off-by: Charles Manning cdhmann...@gmail.com
---
Set align_subpage to align buffer to u32 to use the prefetch engine.
Signed-off-by: Charles Manning cdhmann...@gmail.com
---
drivers/mtd/nand/omap2.c |1 +
1 files changed, 1 insertions(+), 0 deletions(-)
diff --git a/drivers/mtd/nand/omap2.c b/drivers/mtd/nand/omap2.c
index
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