On Sat, Feb 19, 2011 at 9:41 AM, Ming Lei tom.leim...@gmail.com wrote:
It looks like an issue with what you have selected in the menuconfig. Could
you ensure you have DPI and VENC selected, and in displays Generic DPI panel
and sharp-ls panel selected.
Even after enabling all this options
Hi,
Thanks for your reply.
2011/2/19 Felipe Contreras felipe.contre...@gmail.com:
On Sat, Feb 19, 2011 at 9:41 AM, Ming Lei tom.leim...@gmail.com wrote:
It looks like an issue with what you have selected in the menuconfig. Could
you ensure you have DPI and VENC selected, and in displays
On Sat, Feb 19, 2011 at 11:24 AM, Ming Lei tom.leim...@gmail.com wrote:
Hi,
Thanks for your reply.
2011/2/19 Felipe Contreras felipe.contre...@gmail.com:
On Sat, Feb 19, 2011 at 9:41 AM, Ming Lei tom.leim...@gmail.com wrote:
It looks like an issue with what you have selected in the
Hi,
2011/2/19 Felipe Contreras felipe.contre...@gmail.com:
Are you sure? AFAIK early_param is executed _after_ memory blocks are
reserved.
Yes, I am sure.
If 'vram=16M' is passed in, I can find the below:
[0.00] Memory: 1008MB = 1008MB total
but if 'vram=8M' is taken, will be
The scu base address needs to be accessed in cpu hotplug
for power management. Hence export the same
Signed-off-by: Santosh Shilimkar santosh.shilim...@ti.com
Reviewed-by: Kevin Hilman khil...@ti.com
---
arch/arm/mach-omap2/include/mach/omap4-common.h |4
arch/arm/mach-omap2/omap-smp.c
Program non-boot CPUs to hit lowest supported power state
when it is off-lined using cpu hotplug framework.
Signed-off-by: Santosh Shilimkar santosh.shilim...@ti.com
Reviewed-by: Kevin Hilman khil...@ti.com
---
arch/arm/mach-omap2/omap-hotplug.c | 18 +-
1 files changed, 13
Initialise hardware supervised mode for all clockdomains if it's
supported. Initiate sleep transition for other clockdomains,
if they are not being used.
Signed-off-by: Santosh Shilimkar santosh.shilim...@ti.com
Signed-off-by: Rajendra Nayak rna...@ti.com
Reviewed-by: Kevin Hilman khil...@ti.com
WakeupGen is lost only when device hits off-mode. Though the register
context is retained in MPUSS OFF/OSWR state, hardware recommondation is
to save/restore WakeupGen along with GIC to have consistent interrupt
state at both the blocks. The ROM code restore mechinism also does
restore of
This patch adds OMAP WakeupGen support. The WakeupGen unit is responsible
for generating wakeup event from the incoming interrupts and enable bits.
The WakeupGen is implemented in MPU Always-On power domain. During normal
operation, WakeupGen delivers external interrupts directly to the GIC.
When
The SGI(Software Generated Interrupts) are not wakeup capable from
low power states. This is known limitation on OMAP4 and needs to be
worked around by using software forced clockdomain wake-up. CPU0 forces
the CPU1 clockdomain to software force wakeup. After the wakeup, CPU1
restores its
This series adds OMAP4 suspend and cpuidle support till MPU subsystem
(MPUSS) off-mode. The suspend on SMP machines uses cpu-hotplug
infrastructure to take down the non-boot CPUs. We put secondary
CPU(CPU1 in OMAP4) to OFF state via cpu-hotplug.
In cpuidle too, low power states are attempted only
This patch adds SAR RAM support on OMAP4430. SAR RAM used to save
and restore the HW context in low power modes.
Signed-off-by: Santosh Shilimkar santosh.shilim...@ti.com
Reviewed-by: Kevin Hilman khil...@ti.com
---
arch/arm/mach-omap2/omap4-common.c | 25 -
From: Rajendra Nayak rna...@ti.com
The patch adds a basic CPUidle driver for OMAP4. Just
one C state is registered for both CPU cores which
does a wfi.
Signed-off-by: Rajendra Nayak rna...@ti.com
Signed-off-by: Santosh Shilimkar santosh.shilim...@ti.com
Reviewed-by: Kevin Hilman khil...@ti.com
When MPUSS hits off-mode e, L2 cache is lost. This patch adds L2X0
necessary maintenance operations and context restoration in the
low power code.
Signed-off-by: Santosh Shilimkar santosh.shilim...@ti.com
Reviewed-by: Kevin Hilman khil...@ti.com
---
arch/arm/mach-omap2/omap4-mpuss-lowpower.c |
This patch adds MPUSS low power states in cpuidle.
C1 - CPU0 ON + CPU1 ON/OFF + MPU ON + CORE ON
C2 - CPU0 ON + CPU1 OFF + MPU ON + CORE ON
C3 - CPU0 OFF + CPU1 OFF + MPU CSWR + CORE ON
C4 - CPU0 OFF + CPU1 OFF + MPU OFF + CORE ON
MPU OSWR isn't supported yet. To
This patch adds MPUSS(MPU Sub System) RET and OFF mode support
to suspend path. For both MPUSS RET and OFF support, CPUs are
programmed to OFF state.
Only MPUSS RET and OFF supported at this point of time. CORE RET
will be added subsequently.
Signed-off-by: Santosh Shilimkar
This patch adds configurable wakeup timer support in suspend. Also
for statistics pm counter support is added.
Signed-off-by: Santosh Shilimkar santosh.shilim...@ti.com
Reviewed-by: Kevin Hilman khil...@ti.com
---
arch/arm/mach-omap2/omap4-mpuss-lowpower.c |8
On OMAP4 when attempting MPU off-mode or OSWR, the GIC context is
lost. This patch adds GIC context save and restore support.
The context save is done by software and restore is done by
ROM code from predefined SAR locations where the context suppose
to be saved. Refer to ROM code specs for the
Only MPU OFF and RET is controllable. CORE state is blocked
at ON state till the CORE RET support is added.
Signed-off-by: Santosh Shilimkar santosh.shilim...@ti.com
Reviewed-by: Kevin Hilman khil...@ti.com
---
arch/arm/mach-omap2/cpuidle44xx.c | 30 ++
With OMAP4 suspend, idle and hotplug series, we no longer need
do_wfi() macro.
Remove the same.
Signed-off-by: Santosh Shilimkar santosh.shilim...@ti.com
---
arch/arm/mach-omap2/include/mach/omap4-common.h |6 --
1 files changed, 0 insertions(+), 6 deletions(-)
diff --git
CPU local timer(TWD) stops when the CPU is transitioning into
deeper C-States. Since these timers are not wakeup capable, we
need the wakeup capable global timer to program the wakeup time
depending on the next timer expiry.
It can be handled by registering a global wakeup capable timer along
This patch adds the CPU0 and CPU1 off mode support. CPUX close switch
retention (CSWR) is not supported by hardware design.
The CPUx OFF mode isn't supported on OMAP4430 ES1.0
CPUx sleep code is common for hotplug, suspend and cpuilde.
Signed-off-by: Santosh Shilimkar santosh.shilim...@ti.com
Hi,
Which board are you on? For all the display devices you add in the board
file, you should have the corresponding drivers in the menuconfig set also.
For example, in board3430-sdp.c, we add a sharp ls, a dvi and venc
panel. We therefore select sharpls and generic dpi panel in menuconfig.
Hi Sakari and Felipe,
On Tue, Feb 15, 2011 at 2:17 PM, Sakari Ailus
sakari.ai...@maxwell.research.nokia.com wrote:
Felipe Balbi wrote:
Hi,
On Tue, Feb 15, 2011 at 12:50:12PM +0100, Thomas Weber wrote:
Hello Felipe,
in include/linux/wait.h
#define wake_up(x) __wake_up(x,
Hi,
This series intends to introduce SmartReflex AVS Class 1.5 support which
is now the recommended AVS class for usage in OMAP3630, OMAP4 an potentially
in later generation of silicon as well. Smartreflex class 1.5 is a software
controlled hardware calibration mechanism designed to improve dvfs
OMAP3 smartreflex irqs in hwmod structures with the same naming as
present in OMAP4. Without these IRQs being registered, SmartReflex
driver will be unable to get the irq numbers to handle notifications
Signed-off-by: Nishanth Menon n...@ti.com
---
arch/arm/mach-omap2/omap_hwmod_3xxx_data.c |
Enable hwmod entries for OMAP3630 for higher ES revisions as
well. This is to ensure that SR can be used in all revisions of
OMAP3630 as of this posting.
Signed-off-by: Nishanth Menon n...@ti.com
---
arch/arm/mach-omap2/omap_hwmod_3xxx_data.c |8 ++--
1 files changed, 6 insertions(+), 2
omap2_set_init_voltage should setup the curr_volt based on which OPP
the system is functioning at. Blindly setting a 1.2v setting in the
initial structure may not even match the default voltages stored in
the voltage table which are supported for the domain.
For example, OMAP3430 core domain does
cat of debugfs entry for vp_volt provides voltage. The additional pr_notice
is just spam on console and provides no additional information.
Signed-off-by: Nishanth Menon n...@ti.com
---
arch/arm/mach-omap2/voltage.c |1 -
1 files changed, 0 insertions(+), 1 deletions(-)
diff --git
Use IS_ERR_OR_NULL macro instead of just IS_ERR or !xyz || IS_ERR(xyz)
style usage.
Signed-off-by: Nishanth Menon n...@ti.com
---
arch/arm/mach-omap2/voltage.c | 28 ++--
1 files changed, 14 insertions(+), 14 deletions(-)
diff --git a/arch/arm/mach-omap2/voltage.c
Voltage values can get confusing in meaning with various Smartreflex
classes being active. Depending on the class used, the actual voltage
selected might be a variant. Hence pass the volt_data pointers through
the structure. Each voltage domain contains a set of volt_data structs.
Each of those
Transdone event in Voltage processor gives us fine grained status on
the current status of the voltage communication with the PMIC.
Unfortunately, irq generation by VP is based on the start of the
transmission to VC from VP, not at the end (or the completion of
the voltage setting). Hence any
Certain class drivers such as class 1.5 drivers, will need specific
notification that they have to be started up or stopped independent
of smart reflex operation. They also may need private data to be
used for operations of their own, provide the same.
Signed-off-by: Nishanth Menon n...@ti.com
Error label case seems to have a 2 tab indentation when just 1 is
necessary.
Signed-off-by: Nishanth Menon n...@ti.com
---
arch/arm/mach-omap2/smartreflex.c | 18 +-
1 files changed, 9 insertions(+), 9 deletions(-)
diff --git a/arch/arm/mach-omap2/smartreflex.c
We will enable and disable interrupt on a need basis in the class
driver. we need to keep the irq disabled by default else the
forceupdate or vcbypass events could trigger events that we dont
need/expect to handle.
Signed-off-by: Nishanth Menon n...@ti.com
---
arch/arm/mach-omap2/smartreflex.c |
Since we already know the state of the autocomp enablement, we can
see if the requested state is different from the current state and
enable/disable SR only on the need basis.
Signed-off-by: Nishanth Menon n...@ti.com
---
arch/arm/mach-omap2/smartreflex.c | 11 +++
1 files changed, 7
SmartReflex IP v1 and v2 have different registers and offsets.
Currently, we pass the status as is to the class driver. However,
since we dont pass the version of the underlying SR hardware
to the Class driver, it will not be unable to make consistent
sense of the status bits coming over to it.
A
We need some mechanism from class drivers to control when notifiers
should be triggered and when not, currently we have none, which makes
Class driver usage of the interrupt events almost impossible.
Introduce an smartreflex driver api for doing the same.
Signed-off-by: Nishanth Menon n...@ti.com
At times with bad SR configurations especially during silicon bringups,
we could get continuous spurious interrupts which end up hanging the
platform in the form of an ISR call for status bits that are
automatically enabled by the h/w without any s/w clearing option.
If we detect scenarios where
Passing the volt_data pointers accross allows us to save us the effort
of looking up the voltage data pointer from the voltage value at
multiple layers, we need to look at the voltage data in dvfs layer
for further processing, so modify the APIs to pass the voltage data
pointer all the way through
Traditional SmartReflex AVS(Automatic Voltage Scaling) classes are:
* Class 0 - Product test calibration
Silicon is calibration at production floor and fused with voltages
for each OPP
* Class 1 - Boot time calibration
Silicon is calibrated once at boot time and voltages
Use SmartReflex AVS Class3 initialization only for OMAP343x family of
processors.
Signed-off-by: Nishanth Menon n...@ti.com
---
arch/arm/mach-omap2/smartreflex-class3.c |5 +
1 files changed, 5 insertions(+), 0 deletions(-)
diff --git a/arch/arm/mach-omap2/smartreflex-class3.c
Request the handler irq such that there is no nesting for calls.
the notifiers are not expected to be nested, further the interrupt
events for status change should be handled prior to the next event
else there is a risk of loosing events.
Signed-off-by: Nishanth Menon n...@ti.com
---
Hi,
2011/2/19 archit taneja arc...@ti.com:
Hi,
Which board are you on? For all the display devices you add in the board
file, you should have the corresponding drivers in the menuconfig set also.
Pandaboard.
For example, in board3430-sdp.c, we add a sharp ls, a dvi and venc panel. We
-Original Message-
From: linux-omap-ow...@vger.kernel.org [mailto:linux-omap-
ow...@vger.kernel.org] On Behalf Of Nishanth Menon
Sent: Saturday, February 19, 2011 5:32 PM
To: linux-omap
Cc: Tony Lindgren; Kevin Hilman; Nishanth Menon
Subject: [PATCH 02/19] omap3630: hwmod: sr:
-Original Message-
From: linux-omap-ow...@vger.kernel.org [mailto:linux-omap-
ow...@vger.kernel.org] On Behalf Of Nishanth Menon
Sent: Saturday, February 19, 2011 5:32 PM
To: linux-omap
Cc: Tony Lindgren; Kevin Hilman; Nishanth Menon
Subject: [PATCH 03/19] omap3+: voltage: remove
On Mon, Feb 14, 2011 at 02:06:53PM -0800, Kevin Hilman wrote:
G, Manjunath Kondaiah manj...@ti.com writes:
From: Manjunath G Kondaiah manj...@ti.com
Enable runtime pm and use pm_runtime_get_sync and pm_runtime_put_autosuspend
for OMAP DMA driver.
The DMA driver uses auto suspend
-Original Message-
From: linux-omap-ow...@vger.kernel.org [mailto:linux-omap-
ow...@vger.kernel.org] On Behalf Of Nishanth Menon
Sent: Saturday, February 19, 2011 5:32 PM
To: linux-omap
Cc: Tony Lindgren; Kevin Hilman; Nishanth Menon
Subject: [PATCH 15/19] omap3+: sr: introduce
Hi,
On Fri, Feb 18, 2011 at 08:35:14AM -0800, Greg KH wrote:
On Fri, Feb 18, 2011 at 08:31:44AM -0800, Greg KH wrote:
On Fri, Feb 18, 2011 at 02:11:45PM +0200, Felipe Balbi wrote:
Hi Greg,
Here are the patches I have for the next merge window.
The outstanding feature is the
Hi,
On Sat, Feb 19, 2011 at 01:35:09PM +0200, David Cohen wrote:
aha, now I get it, so shouldn't the real fix be including linux/sched.h
on linux/wait.h, I mean, it's linuux/wait.h who uses a symbol
defined in linux/sched.h, right ?
That's a tricky situation. linux/sched.h includes
On Sat, Feb 19, 2011 at 5:00 PM, Felipe Balbi ba...@ti.com wrote:
Hi,
On Sat, Feb 19, 2011 at 01:35:09PM +0200, David Cohen wrote:
aha, now I get it, so shouldn't the real fix be including linux/sched.h
on linux/wait.h, I mean, it's linuux/wait.h who uses a symbol
defined in
-Original Message-
From: linux-omap-ow...@vger.kernel.org [mailto:linux-omap-
ow...@vger.kernel.org] On Behalf Of jean.pi...@newoldbits.com
Sent: Friday, February 18, 2011 11:41 PM
To: Kevin Hilman; Thomas Renninger; linux-omap@vger.kernel.org;
linux-arm-ker...@lists.infradead.org
On Sat, Feb 19, 2011 at 2:44 AM, David Cohen daco...@gmail.com wrote:
On Sat, Feb 19, 2011 at 1:33 AM, David Cohen daco...@gmail.com wrote:
Hi,
On Fri, Feb 18, 2011 at 7:08 PM, Lesly A M lesl...@ti.com wrote:
Workaround for TWL5030 Silicon Errata 27 28:
27 - VDD1, VDD2, may have
Vishwanath Sripathy wrote, on 02/19/2011 07:10 PM:
+int sr_notifier_control(struct voltagedomain *voltdm, bool enable)
+{
+ struct omap_sr *sr = _sr_lookup(voltdm);
+ u32 value = 0;
+ if (IS_ERR_OR_NULL(sr)) {
+ pr_warning(%s: sr corresponding to domain not
Vishwanath Sripathy wrote, on 02/19/2011 06:54 PM:
[..]
omap2_set_init_voltage should setup the curr_volt based on which OPP
the system is functioning at. Blindly setting a 1.2v setting in the
initial structure may not even match the default voltages stored in
the voltage table which are
Vishwanath Sripathy wrote, on 02/19/2011 06:52 PM:
-Original Message-
From: linux-omap-ow...@vger.kernel.org [mailto:linux-omap-
ow...@vger.kernel.org] On Behalf Of Nishanth Menon
Sent: Saturday, February 19, 2011 5:32 PM
To: linux-omap
Cc: Tony Lindgren; Kevin Hilman; Nishanth Menon
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