Hi Rajendra
On Sat, 2 Jul 2011, Rajendra Nayak wrote:
This patch adds additional register bitshifts for
registers added in OMAP4460 platform.
Signed-off-by: Rajendra Nayak rna...@ti.com
Signed-off-by: Nishanth Menon n...@ti.com
Signed-off-by: Benoit Cousson b-cous...@ti.com
Reviewed-by:
On Thu, 7 Jul 2011, Tony Lindgren wrote:
* Rajendra Nayak rna...@ti.com [110706 22:26]:
On 7/6/2011 12:19 AM, Paul Walmsley wrote:
Patch 16, to me, belongs best with the 4460 support series and so I'll see
if it makes sense to fit it in there somewhere.
Paul,
Do you want me to
On Sat, 2 Jul 2011, Rajendra Nayak wrote:
From: Aneesh V ane...@ti.com
Add support for detecting the latest in the OMAP4 family: OMAP4460
Among other changes, the new chip also can support 1.5GHz A9s,
1080p stereoscopic 3D and 12 MP stereo (dual camera). In addition,
we have changes to
On Sat, 2 Jul 2011, Rajendra Nayak wrote:
From: Aneesh V ane...@ti.com
Macros for identifying the max frequency supported by various
OMAP4 variants - Expanding along the lines of OMAP3's feature
handling.
[n...@ti.com: minor fixes for checks that should only for 443x|446x]
On Sat, 2 Jul 2011, Rajendra Nayak wrote:
Add the new clock nodes (bandgap_ts_fclk, div_ts_ck) for omap4460.
Handle these nodes using the clock flags (CK_*).
Signed-off-by: Rajendra Nayak rna...@ti.com
Signed-off-by: Nishanth Menon n...@ti.com
Signed-off-by: Benoit Cousson b-cous...@ti.com
On Sat, 2 Jul 2011, Rajendra Nayak wrote:
The 4460 platform has no difference in the clockdomains as compared
to the 4430 platform. Hence just update the .omap_chip field to make
sure the same clockdomain data can be reused on the 4460 platform.
Signed-off-by: Rajendra Nayak rna...@ti.com
On Sat, 2 Jul 2011, Rajendra Nayak wrote:
The 4460 platform has no difference in the powerdomains as compared
to the 4430 platform. Hence just update the .omap_chip field to make
sure the same powerdomain data can be reused on the 4460 platform.
Signed-off-by: Rajendra Nayak rna...@ti.com
Hi Paul,
On 7/7/2011 11:30 PM, Paul Walmsley wrote:
Hi Rajendra
On Sat, 2 Jul 2011, Rajendra Nayak wrote:
This patch adds additional register bitshifts for
registers added in OMAP4460 platform.
Signed-off-by: Rajendra Nayakrna...@ti.com
Signed-off-by: Nishanth Menonn...@ti.com
On 7/7/2011 11:49 PM, Paul Walmsley wrote:
On Sat, 2 Jul 2011, Rajendra Nayak wrote:
Add the new clock nodes (bandgap_ts_fclk, div_ts_ck) for omap4460.
Handle these nodes using the clock flags (CK_*).
Signed-off-by: Rajendra Nayakrna...@ti.com
Signed-off-by: Nishanth Menonn...@ti.com
On Thu, 7 Jul 2011, Martin Fouts wrote:
From: Tony Lindgren [t...@atomide.com]
The second problem we have here is why does adding 4460 support depend
on a cosmetic clean-up patch. That dependency should not exist at all
as it seems the 4460 patches should work even without this patch.
On 7/8/2011 12:11 AM, Paul Walmsley wrote:
On Thu, 7 Jul 2011, Martin Fouts wrote:
From: Tony Lindgren [t...@atomide.com]
The second problem we have here is why does adding 4460 support depend
on a cosmetic clean-up patch. That dependency should not exist at all
as it seems the 4460 patches
* Rajendra Nayak rna...@ti.com [110708 10:17]:
On 7/8/2011 12:11 AM, Paul Walmsley wrote:
On Thu, 7 Jul 2011, Martin Fouts wrote:
From: Tony Lindgren [t...@atomide.com]
The second problem we have here is why does adding 4460 support depend
on a cosmetic clean-up patch. That dependency
On Thu, 7 Jul 2011, Tony Lindgren wrote:
Well sounds like we might be able to get rid of CHIP_IS in the *_data.c
files if we use SoC variant specific lists. Of course Paul might have
some other ideas here.
Sounds like a reasonable approach to me for the data files. The
powerdomain,
On Fri, 8 Jul 2011, Rajendra Nayak wrote:
Hi Paul,
On 7/7/2011 11:30 PM, Paul Walmsley wrote:
Hi Rajendra
On Sat, 2 Jul 2011, Rajendra Nayak wrote:
This patch adds additional register bitshifts for
registers added in OMAP4460 platform.
Signed-off-by: Rajendra
On Fri, 8 Jul 2011, Rajendra Nayak wrote:
On 7/7/2011 11:49 PM, Paul Walmsley wrote:
On Sat, 2 Jul 2011, Rajendra Nayak wrote:
Add the new clock nodes (bandgap_ts_fclk, div_ts_ck) for omap4460.
Handle these nodes using the clock flags (CK_*).
Signed-off-by: Rajendra
Hi
On Fri, 1 Jul 2011, Benoit Cousson wrote:
Here is the second part of the modulemode series.
The goal here is to do the cleanup on the clock nodes and PRCM macros
that are not needed anymore by the hwmod data.
Some macros are still needed because of clock data. It should be removed
once
Hi,
I am planning to move TI SDMA driver in OMAP tree
into the dmaengine framework.
The first immediate issue of concern I noticed is the
huge number of client drivers that use the existing SDMA driver.
More than 15 client drivers are using the current SDMA driver.
Moving the SDMA driver along
* Arnd Bergmann a...@arndb.de [110707 13:36]:
On Thursday 07 July 2011 18:29:11 Tony Lindgren wrote:
Please pull omap board updates from:
git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap-2.6.git
devel-board
These are currently on top of the fixes you pulled earlier
On Friday 08 July 2011 10:30:42 Tony Lindgren wrote:
* Arnd Bergmann a...@arndb.de [110707 13:36]:
On Thursday 07 July 2011 18:29:11 Tony Lindgren wrote:
Please pull omap board updates from:
git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap-2.6.git
devel-board
On Fri, Jul 08, 2011 at 09:11:43AM +0200, Paul Walmsley wrote:
On Thu, 7 Jul 2011, Martin Fouts wrote:
From: Tony Lindgren [t...@atomide.com]
The second problem we have here is why does adding 4460 support depend
on a cosmetic clean-up patch. That dependency should not exist at all
Restoring the missing INDEX register value in musb_restore_context().
Without this suspend resume functionality is broken with offmode
enabled.
Cc: sta...@kernel.org
Signed-off-by: Ajay Kumar Gupta ajay.gu...@ti.com
---
drivers/usb/musb/musb_core.c |1 +
1 files changed, 1 insertions(+), 0
Gupta, Ajay Kumar wrote:
Restoring the missing INDEX register value in musb_restore_context().
Without this suspend resume functionality is broken with offmode
enabled.
Cc: sta...@kernel.org
Signed-off-by: Ajay Kumar Gupta ajay.gu...@ti.com
FWIW,
Acked-by: Anand Gadiyar gadi...@ti.com
On Fri, Jul 08, 2011 at 01:52:17PM +0530, Raju, Sundaram wrote:
I am planning to move TI SDMA driver in OMAP tree
into the dmaengine framework.
The first immediate issue of concern I noticed is the
huge number of client drivers that use the existing SDMA driver.
More than 15 client drivers
This adds support for the Phytec OMAP4430 board called phyCORE-OMAP4 PCM049.
GPMC is used for the smsc911x. A gpmc clk fix is needed.
The lcd display pd050vl1 for the generic_dpi_panel gets own patch.
Jan
Jan Weitzel (3):
ARM: OMAP4: Add pcm049 to Kconfig/Makefile
ARM: OMAP4: add pcm049
Signed-off-by: Jan Weitzel j.weit...@phytec.de
---
arch/arm/mach-omap2/Kconfig |5 +
arch/arm/mach-omap2/Makefile |4
2 files changed, 9 insertions(+), 0 deletions(-)
diff --git a/arch/arm/mach-omap2/Kconfig b/arch/arm/mach-omap2/Kconfig
index 19d5891..c6a2d43 100644
---
Signed-off-by: Jan Weitzel j.weit...@phytec.de
---
arch/arm/plat-omap/include/plat/uncompress.h |1 +
1 files changed, 1 insertions(+), 0 deletions(-)
diff --git a/arch/arm/plat-omap/include/plat/uncompress.h
b/arch/arm/plat-omap/include/plat/uncompress.h
index ac4b60d..10507a6 100644
---
platformcode for Phytec phyCORE-OMAP4 PCM049 OMAP4430 board.
Signed-off-by: Jan Weitzel j.weit...@phytec.de
---
arch/arm/mach-omap2/board-omap4pcm049.c | 728 +++
1 files changed, 728 insertions(+), 0 deletions(-)
create mode 100644
-Original Message-
From: Russell King - ARM Linux [mailto:li...@arm.linux.org.uk]
Sent: Friday, July 08, 2011 3:34 PM
To: Raju, Sundaram
Cc: linux-arm-ker...@lists.infradead.org; linux-omap@vger.kernel.org; Dan;
Shilimkar, Santosh; linux-ker...@vger.kernel.org
Subject: Re: [RFC]
* Arnd Bergmann a...@arndb.de [110708 01:49]:
On Friday 08 July 2011 10:30:42 Tony Lindgren wrote:
* Arnd Bergmann a...@arndb.de [110707 13:36]:
On Thursday 07 July 2011 18:29:11 Tony Lindgren wrote:
Please pull omap board updates from:
* Raju, Sundaram sunda...@ti.com [110708 03:09]:
-Original Message-
From: Russell King - ARM Linux [mailto:li...@arm.linux.org.uk]
Sent: Friday, July 08, 2011 3:34 PM
To: Raju, Sundaram
Cc: linux-arm-ker...@lists.infradead.org; linux-omap@vger.kernel.org; Dan;
Shilimkar,
Add displays to panel-generic-dpi.c
Prime View PD035VL1 (640 x 480)
Prime View PD050VL1 (640 x 480)
Prime View PD104SLF (800 x 600)
Prime View PM070WL4 (800 x 480)
Signed-off-by: Jan Weitzel j.weit...@phytec.de
---
drivers/video/omap2/displays/panel-generic-dpi.c | 100 ++
1
* Paul Walmsley p...@pwsan.com [110707 23:34]:
On Sat, 2 Jul 2011, Rajendra Nayak wrote:
From: Aneesh V ane...@ti.com
Add support for detecting the latest in the OMAP4 family: OMAP4460
Among other changes, the new chip also can support 1.5GHz A9s,
1080p stereoscopic 3D and 12 MP
* Paul Walmsley p...@pwsan.com [110708 00:29]:
On Fri, 8 Jul 2011, Rajendra Nayak wrote:
Hi Paul,
On 7/7/2011 11:30 PM, Paul Walmsley wrote:
Hi Rajendra
On Sat, 2 Jul 2011, Rajendra Nayak wrote:
This patch adds additional register bitshifts for
registers added in
On Fri, Jul 08, 2011 at 03:06:13PM +0530, Ajay Kumar Gupta wrote:
Restoring the missing INDEX register value in musb_restore_context().
Without this suspend resume functionality is broken with offmode
enabled.
Cc: sta...@kernel.org
Signed-off-by: Ajay Kumar Gupta ajay.gu...@ti.com
applied,
* Paul Walmsley p...@pwsan.com [110708 00:30]:
On Fri, 8 Jul 2011, Rajendra Nayak wrote:
On 7/7/2011 11:49 PM, Paul Walmsley wrote:
On Sat, 2 Jul 2011, Rajendra Nayak wrote:
Add the new clock nodes (bandgap_ts_fclk, div_ts_ck) for omap4460.
Handle these nodes using the clock
The Hwmod structures and Runtime PM features are implemented
For EHCI and OHCI drivers of OMAP3 and OMAP4.
The global suspend/resume of EHCI and OHCI
is validated on OMAP3430 sdp board with these patches.
V3:
Set MSTANDBY_SMART_WKUP for idlemode of usbhost
Rebased on top of
Following 4 hwmod strcuture are added:
UHH hwmod of usbhs with uhh base address and functional clock,
EHCI hwmod with irq and base address,
OHCI hwmod with irq and base address,
TLL hwmod of usbhs with the TLL base address and irq.
Signed-off-by: Keshava Munegowda keshava_mgo...@ti.com
---
From: Benoit Cousson b-cous...@ti.com
Following 4 hwmod strcuture are added:
UHH hwmod of usbhs with uhh base address and functional clock,
EHCI hwmod with irq and base address,
OHCI hwmod with irq and base address,
TLL hwmod of usbhs with the TLL base address and irq.
Signed-off-by: Benoit
device name usbhs clocks are changed from
usbhs-omap.0 to usbhs_omap; this is because
in the hwmod registration the device name is set
as usbhs_omap
Signed-off-by: Keshava Munegowda keshava_mgo...@ti.com
---
arch/arm/mach-omap2/clock3xxx_data.c | 28 ++--
The usbhs core driver does not enable/disable the intefrace and
fucntional clocks; These clocks are handled by hwmod and runtime pm,
hence insted of the clock enable/disable, the runtime pm APIS are
used. however,the port clocks and tll clocks are handled
by the usbhs core.
In this architecture,
The global suspend and resume functions for ehci and ohci
drivers are implemented; these functions does the
pm_runtime_get_sync and pm_runtime_put_sync of the
parent device usbhs core driver respectively.
Signed-off-by: Keshava Munegowda keshava_mgo...@ti.com
---
drivers/usb/host/ehci-omap.c |
The hwmod structure of uhh, ohci, ehci and tll are
retrived and registered with omap device
Signed-off-by: Keshava Munegowda keshava_mgo...@ti.com
---
arch/arm/mach-omap2/usb-host.c | 113 +--
1 files changed, 49 insertions(+), 64 deletions(-)
diff --git
On Friday 08 July 2011, Tony Lindgren wrote:
* Arnd Bergmann a...@arndb.de [110708 01:49]:
On Friday 08 July 2011 10:30:42 Tony Lindgren wrote:
Sorry for being unclear, I forgot to say that I did in fact pull your tree
already.
OK no problem that's fine with me.
BTW, looks like
* Arnd Bergmann a...@arndb.de [110708 04:06]:
On Friday 08 July 2011, Tony Lindgren wrote:
* Arnd Bergmann a...@arndb.de [110708 01:49]:
On Friday 08 July 2011 10:30:42 Tony Lindgren wrote:
Sorry for being unclear, I forgot to say that I did in fact pull your tree
already.
OK
Hi Kevin, Paul, Tony, Benoit,
On Fri, Jul 08, 2011 at 04:32:39PM +0530, Keshava Munegowda wrote:
The Hwmod structures and Runtime PM features are implemented
For EHCI and OHCI drivers of OMAP3 and OMAP4.
The global suspend/resume of EHCI and OHCI
is validated on OMAP3430 sdp board with these
Hello.
On 08-07-2011 14:04, Jan Weitzel wrote:
Signed-off-by: Jan Weitzelj.weit...@phytec.de
---
arch/arm/mach-omap2/Kconfig |5 +
arch/arm/mach-omap2/Makefile |4
2 files changed, 9 insertions(+), 0 deletions(-)
diff --git a/arch/arm/mach-omap2/Kconfig
Hi Linus,
Please pull one fix from:
git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap-2.6.git
omap-fixes-for-linus
This fixes an embarassing segfault by dropping __initdata from data that
should not be marked __initdata.
Regards,
Tony
The following changes since commit
* Sergei Shtylyov sshtyl...@mvista.com [110708 04:45]:
Hello.
On 08-07-2011 14:04, Jan Weitzel wrote:
Signed-off-by: Jan Weitzelj.weit...@phytec.de
---
arch/arm/mach-omap2/Kconfig |5 +
arch/arm/mach-omap2/Makefile |4
2 files changed, 9 insertions(+), 0
Hi Tony,
On Fri, Jul 08, 2011 at 04:55:21AM -0700, Tony Lindgren wrote:
* Sergei Shtylyov sshtyl...@mvista.com [110708 04:45]:
Hello.
On 08-07-2011 14:04, Jan Weitzel wrote:
Signed-off-by: Jan Weitzelj.weit...@phytec.de
---
arch/arm/mach-omap2/Kconfig |5 +
This adds support for the Phytec OMAP4430 board called phyCORE-OMAP4 PCM049.
Signed-off-by: Jan Weitzel j.weit...@phytec.de
---
v2:
join
ARM: OMAP4: Add pcm049 to Kconfig/Makefile
ARM: OMAP4: add pcm049 DEBUGLL
ARM: OMAP4: platformcode board-omap4pcm049.c
arch/arm/mach-omap2/Kconfig
A mutex is locked on entry into twl4030_madc_conversion().
Immediate return on some error conditions leaves the
mutex locked.
This patch ensures that mutex is always unlocked before
leaving the function.
Signed-off-by: Sanjeev Premi pr...@ti.com
Cc: Keerthy j-keer...@ti.com
---
Compile tested
Hi Arnd,
Please pull TWL cleanup from:
git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap-2.6.git
cleanup-part-2
This can be pulled into your omap/cleanup. It will cause a minor
merge conflict with omap/board.
I've attached a conflict resolution patch too, it's trivial execpt
On Fri, Jun 03, 2011 at 02:43:11PM +0300, Grazvydas Ignotas wrote:
Fix warnings emitted by some versions of gcc:
drivers/power/twl4030_charger.c:490: warning: overflow in implicit constant
conversion
drivers/power/twl4030_charger.c:498: warning: overflow in implicit constant
conversion
* Paul Walmsley p...@pwsan.com [110708 09:34]:
On Thu, 7 Jul 2011, Tony Lindgren wrote:
Rajendra's patch series doesn't require the 4430 - 44XX changes in the
PRM/CM macros (Benoît's patch 16). That patch can be put in a separate
series, if you like.
It does require changing
Paul, Benoit,
Do you have any comments for this series?
Regards
Kishon
On Mon, Jul 4, 2011 at 4:38 PM, Kishon Vijay Abraham I kis...@ti.com wrote:
Certain peripherals require autoidle bits to be disabled before performing
some operations. This patch series provides APIs in omap_device layer
Hi,
On Wed, Jul 6, 2011 at 11:05 AM, Maximilian Schwerin
maximilian.schwe...@tigris.de wrote:
I'm currently working on a beagleboard clone that has two NAND chips on
OMAP3 CS0 and CS1. The flash on CS0 works as expected. What would be the
correct way to get both chips to work?
You need to add
Paul Walmsley p...@pwsan.com writes:
cc'ing Kevin, since this touches mach-omap2/pm.c - an ack would be great
if you have the chance
On Fri, 1 Jul 2011, Benoit Cousson wrote:
From: Rajendra Nayak rna...@ti.com
sleep_switch which is initialised to 0 in omap_set_pwrdm_state
happens to be
Paul Walmsley p...@pwsan.com writes:
cc'ing Kevin, since this touches mach-omap2/pm.c - an ack would be great
if you have the chance
On Fri, 1 Jul 2011, Benoit Cousson wrote:
From: Rajendra Nayak rna...@ti.com
The omap_set_pwrdm_state function forces clockdomains
to idle, without
On Thu, Jul 07, 2011 at 08:55:16PM +0100, Liam Girdwood wrote:
On 07/07/11 17:53, Mark Brown wrote:
My comment was more that the changelog should say why it's not suitable
given that it involves a near total rewrite of the driver which is a
pretty big step, I'm fine with the actual change.
Sorry for hijacking this CC: list...
Can somebody at TI comment on these two email threads?
http://marc.info/?t=13094441991r=1w=2
http://marc.info/?t=13086613221r=1w=2
The gist of the problem is that Ed's OMAP EHCI controllers sometimes
stop working when an unlink
On Fri, 8 Jul 2011, Keshava Munegowda wrote:
The usbhs core driver does not enable/disable the intefrace and
fucntional clocks; These clocks are handled by hwmod and runtime pm,
hence insted of the clock enable/disable, the runtime pm APIS are
used. however,the port clocks and tll clocks are
Felipe Balbi ba...@ti.com writes:
Hi Kevin, Paul, Tony, Benoit,
On Fri, Jul 08, 2011 at 04:32:39PM +0530, Keshava Munegowda wrote:
The Hwmod structures and Runtime PM features are implemented
For EHCI and OHCI drivers of OMAP3 and OMAP4.
The global suspend/resume of EHCI and OHCI
is
On Friday 08 July 2011 16:28:05 Mark Brown wrote:
It's not that simple in this situation. We also have a PM dependency on
the CODEC here too, it supplies our interface clock via the DAI so we
have to be very careful how we interact with the ABE and CODEC. The
critical thing here is the pop
Ben Dooks ben-...@fluff.org writes:
On Tue, Jul 05, 2011 at 12:00:56PM -0700, Kevin Hilman wrote:
Hi Ben,
On Mon, 2011-06-27 at 15:15 -0700, Kevin Hilman wrote:
On Mon, 2011-06-27 at 15:12 -0700, Kevin Hilman wrote:
Ping. I don't see this in linux-next yet.
Are you planning
On Friday 08 July 2011, Tony Lindgren wrote:
I've attached a conflict resolution patch too, it's trivial execpt
note that .vdac needs to be removed in board-rx51-peripherals.c.
If this conflict causes problems for you, I can also base this series
on omap/board.
The conflict resolution you
Hello,
Following patches add an external controller support for TWL SMPS regulators.
This is needed because OMAP has voltage processor support which provides
interface to control a few regulators (VDD1 / VDD2 for OMAP3), and this
is shared with smartreflex.
These patches work in a way that twl
This commit adds two things to the TWL regulator driver code :
* It extends the twl4030_set_voltage() and twl4030_get_voltage()
functions to understand that VDD1 and VDD2 are different regulators
from all the other regulators: they don't support a fixed set of
voltages, but a wide range
Instiante a twlreg_ext_ctrl structure in the OMAP voltage code for
VDD1 and VDD2 and attach it as an external controller for these
regulators. It will allow the OMAP voltage code to take over the
default regulator driver code for -set_voltage() and -get_voltage().
TODO:
* Does this really
From: Thomas Petazzoni thomas.petazz...@free-electrons.com
Instantiate the VDD1 and VDD2 regulators and connect them to their
respective consumers: mpu.0 for VDD1 and l3_main.0 for VDD2.
TODO:
* As these instantiations will be identical for all OMAP3 boards,
find a way of sharing them
Beagleboard rev-c4 has a speed sorted OMAP3530 chip which can run at 720MHz.
Signed-off-by: Tero Kristo t-kri...@ti.com
---
arch/arm/mach-omap2/board-omap3beagle.c | 32 +++
arch/arm/mach-omap2/opp3xxx_data.c |4 +++
2 files changed, 36 insertions(+), 0
Paul,
I've separated out the omap_hwmod data changes from Andy's original
series so they can be easier managed with the rest of the hwmod data
changes.
This series applies against v3.0-rc6 and is also available here:
git://git.kernel.org/pub/scm/linux/kernel/git/khilman/linux-omap-pm.git
From: Andy Green a...@warmcat.com
Peter Maydell noticed when running under QEMU he was getting
errors reporting 32-bit access to I2C peripheral unit registers
that are documented to be 8 or 16-bit only[1][2]
The I2C driver is blameless as it wraps its accesses in a
function using __raw_writew
From: Andy Green a...@warmcat.com
Since we cannot trust (or even reliably find) the OMAP I2C
peripheral unit's own revision register, we must inform the
OMAP i2c driver of which IP version it is running on. We
do this by tagging the omap_hwmod_class for i2c on all the
OMAP2+ platform / cpu
From: Andy Green a...@warmcat.com
This adds the new functionality flags for omap i2c unit to all OMAP2
hwmod definitions
Cc: patc...@linaro.org
Cc: Ben Dooks ben-li...@fluff.org
Reported-by: Peter Maydell peter.mayd...@linaro.org
Signed-off-by: Andy Green andy.gr...@linaro.org
Signed-off-by:
Tony,
Please pull the I2C cleanup changes below for v3.1.
This is the same series from Andy Green that has been
posted/reviewed/tested many times except the omap_hwmod data patches
have been separated out into a separate series.
This version also has an Ack from Ben Dooks for merge via
Hi,
On Fri, Jul 08, 2011 at 06:56:26PM +0300, Tero Kristo wrote:
From: Thomas Petazzoni thomas.petazz...@free-electrons.com
Instantiate the VDD1 and VDD2 regulators and connect them to their
respective consumers: mpu.0 for VDD1 and l3_main.0 for VDD2.
TODO:
* As these instantiations
Hi,
On Fri, Jul 08, 2011 at 06:56:27PM +0300, Tero Kristo wrote:
Instiante a twlreg_ext_ctrl structure in the OMAP voltage code for
VDD1 and VDD2 and attach it as an external controller for these
regulators. It will allow the OMAP voltage code to take over the
default regulator driver code
Op 8 jul. 2011 om 16:56 heeft Tero Kristo t-kri...@ti.com het volgende
geschreven:
Beagleboard rev-c4 has a speed sorted OMAP3530 chip which can run at 720MHz.
Signed-off-by: Tero Kristo t-kri...@ti.com
---
arch/arm/mach-omap2/board-omap3beagle.c | 32 +++
Hi Jean-Christophe,
On Thu, May 26, 2011 at 06:32:57, Jean-Christophe PLAGNIOL-VILLARD wrote:
From: Russell King - ARM Linux li...@arm.linux.org.uk
We have two SoCs using SRAM, both with their own allocation systems,
and both with their own ways of copying functions into the SRAM.
Let's
On 7/7/2011 11:39 PM, Paul Walmsley wrote:
On Thu, 7 Jul 2011, Tony Lindgren wrote:
* Rajendra Nayakrna...@ti.com [110706 22:26]:
On 7/6/2011 12:19 AM, Paul Walmsley wrote:
Patch 16, to me, belongs best with the 4460 support series and so I'll see
if it makes sense to fit it in there
On Fri, Jul 08, 2011 at 22:21:52, Nori, Sekhar wrote:
Hi Jean-Christophe,
On Thu, May 26, 2011 at 06:32:57, Jean-Christophe PLAGNIOL-VILLARD wrote:
From: Russell King - ARM Linux li...@arm.linux.org.uk
diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig
index f4b7dfa..5ec5e5f 100644
---
On Fri, Jul 8, 2011 at 10:22 AM, Raju, Sundaram sunda...@ti.com wrote:
I would like to follow the Freescale i.MX DMA driver model,
where imx-dma.c in drivers/dma which implements all the
dmaengine hooks, internally uses the APIs in dma-v1.c file in
arch/arm/mach-imx. All APIs in dma-v1.c are
On 07/07/11 11:35 AM, Tony Lindgren wrote:
* Raphaël Assénat r...@8d.com [110707 17:36]:
This is unrelated to this thread but..
do you think we could merge this one?
[PATCH 5/5] am3505/3517: Various platform defines for UART4
http://marc.info/?l=linux-omapm=130980816418020w=4
It does not
On Monday, March 28, 2011, Ben Dooks wrote:
On Mon, Mar 28, 2011 at 01:29:49AM +0200, Rafael J. Wysocki wrote:
From: Rafael J. Wysocki r...@sisk.pl
Replace sysdev classes and struct sys_device objects used for core
power management by Samsung platforms with struct syscore_ops objects
Balaji T K balaj...@ti.com writes:
add runtime pm support to HSMMC host controller
Use runtime pm API to enable/disable HSMMC clock
Use runtime autosuspend APIs to enable auto suspend delay
Based on OMAP HSMMC runtime implementation by Kevin Hilman, Kishore Kadiyala
Signed-off-by: Balaji T
On Fri, 2011-07-08 at 17:56 +0200, Kristo, Tero wrote:
This commit adds two things to the TWL regulator driver code :
* It extends the twl4030_set_voltage() and twl4030_get_voltage()
functions to understand that VDD1 and VDD2 are different regulators
from all the other regulators:
Hi Tony,
a few more CBUS patches. I started cleaning
up tahvo and also found two possible optimizations
on Retu which are based on patches from Thomas
Gleixner and Sebastian Siewior - on other pieces
of code, of course :-p
These patches were compile tested only. It would
be very nice if someone
GPIO operations can sleep, so move to a
mutex.
Signed-off-by: Felipe Balbi ba...@ti.com
---
drivers/cbus/tahvo.c | 19 +--
1 files changed, 9 insertions(+), 10 deletions(-)
diff --git a/drivers/cbus/tahvo.c b/drivers/cbus/tahvo.c
index d4a89a6..bc3ca6d 100644
---
while at that, also remove a few annoying and pretty
much useless comments.
Signed-off-by: Felipe Balbi ba...@ti.com
---
drivers/cbus/tahvo.c | 36 +++-
1 files changed, 3 insertions(+), 33 deletions(-)
diff --git a/drivers/cbus/tahvo.c b/drivers/cbus/tahvo.c
cleanup only, no functional changes.
Signed-off-by: Felipe Balbi ba...@ti.com
---
drivers/cbus/tahvo.c | 10 +++---
1 files changed, 7 insertions(+), 3 deletions(-)
diff --git a/drivers/cbus/tahvo.c b/drivers/cbus/tahvo.c
index 0da156e..647d263 100644
--- a/drivers/cbus/tahvo.c
+++
cleanup only, no functional changes.
Signed-off-by: Felipe Balbi ba...@ti.com
---
drivers/cbus/tahvo.c |5 +++--
1 files changed, 3 insertions(+), 2 deletions(-)
diff --git a/drivers/cbus/tahvo.c b/drivers/cbus/tahvo.c
index 647d263..0e28208 100644
--- a/drivers/cbus/tahvo.c
+++
by moving to threaded IRQ.
Signed-off-by: Felipe Balbi ba...@ti.com
---
drivers/cbus/tahvo.c | 16
1 files changed, 4 insertions(+), 12 deletions(-)
diff --git a/drivers/cbus/tahvo.c b/drivers/cbus/tahvo.c
index 0e28208..4b062de 100644
--- a/drivers/cbus/tahvo.c
+++
for LEVEL handlers which don't have top half,
it's necessary to always set IRQF_ONESHOT
Signed-off-by: Felipe Balbi ba...@ti.com
---
drivers/cbus/retu.c |4 ++--
1 files changed, 2 insertions(+), 2 deletions(-)
diff --git a/drivers/cbus/retu.c b/drivers/cbus/retu.c
index b58c6e5..b7fbd18
just moving things around. It's a lot easier
to handle a dynamically allocated structure
as it allows for multiple instances of the
same device.
Signed-off-by: Felipe Balbi ba...@ti.com
---
drivers/cbus/tahvo.c | 128 --
1 files changed, 82
that way we don't need to access the global
pointer
Signed-off-by: Felipe Balbi ba...@ti.com
---
drivers/cbus/tahvo.c |6 +++---
1 files changed, 3 insertions(+), 3 deletions(-)
diff --git a/drivers/cbus/tahvo.c b/drivers/cbus/tahvo.c
index 3a77d12..740bb05 100644
--- a/drivers/cbus/tahvo.c
those two functions are local to tahvo.c and
should be used to read/write Tahvo's registers.
Signed-off-by: Felipe Balbi ba...@ti.com
---
drivers/cbus/tahvo.c | 56 +++--
1 files changed, 40 insertions(+), 16 deletions(-)
diff --git
no functional changes.
Signed-off-by: Felipe Balbi ba...@ti.com
---
drivers/cbus/tahvo.c |8 +++-
1 files changed, 3 insertions(+), 5 deletions(-)
diff --git a/drivers/cbus/tahvo.c b/drivers/cbus/tahvo.c
index 04b8203..a538f13 100644
--- a/drivers/cbus/tahvo.c
+++ b/drivers/cbus/tahvo.c
it's definitely not always that we will have
all 16 interrupts fired at the same time, so
in order to avoid looping so many times, we
are now using ffs() which is implemented
(on ARM) using the far better clz instruction.
This will save us quite some loops and could
improve IRQ latency on Retu
Hi
On Fri, 8 Jul 2011, Kevin Hilman wrote:
I've separated out the omap_hwmod data changes from Andy's original
series so they can be easier managed with the rest of the hwmod data
changes.
This series applies against v3.0-rc6 and is also available here:
Hi Rafael,
Just curious why pm_runtime_suspended() requires the device to be
enabled for it to return true:
static inline bool pm_runtime_suspended(struct device *dev)
{
return dev-power.runtime_status == RPM_SUSPENDED
!dev-power.disable_depth;
}
I must be
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