On Tue, Oct 11, 2011 at 3:54 AM, Kevin Hilman khil...@ti.com wrote:
Govindraj govindraj...@gmail.com writes:
On Mon, Oct 3, 2011 at 10:53 AM, Rajendra Nayak rna...@ti.com wrote:
On Monday 03 October 2011 10:30 AM, Govindraj wrote:
On Sat, Oct 1, 2011 at 8:03 PM, Rajendra Nayakrna...@ti.com
On Tue, Oct 11, 2011 at 4:00 AM, Kevin Hilman khil...@ti.com wrote:
Govindraj.R govindraj.r...@ti.com writes:
Currently we use a shared irq handler to identify uart activity and then
trigger a timer.
OK.
Based the timeout value set from sysfs the timer used to expire.
Please re-phrase as
Hi Paul,
On Tue, Oct 11, 2011 at 12:52 AM, Paul Walmsley p...@pwsan.com wrote:
On Mon, 10 Oct 2011, Paul Walmsley wrote:
OK. sys_offmode only applies to OFF mode. Voltage scaling can also occur
during RETENTION and INACTIVE (sleep). So were these results with
retention and voltage scaling
+ if (supply) {
+ struct regulator_dev *r;
+ struct device_node *node;
+
+ /* first do a dt based lookup */
+ if (dev) {
+ node = of_get_regulator(dev, supply);
+ if (node)
+
On Monday 10 October 2011 11:31 PM, Kevin Hilman wrote:
Hi Santosh,
Santosh Shilimkar santosh.shilim...@ti.com writes:
The series adds OMAP4 MPUSS (MPU SubSystem) power management support for
suspend (S2R), CPU hotplug and CPUidle.
There are a few more compile errors when doing
From: Keshava Munegowda keshava_mgo...@ti.com
The Hwmod structures for ehci and ohci drivers are implemented for
EHCI and OHCI drivers of OMAP3 and OMAP4.
The ehci and ohci drivers does not use the APIs of the usbhs
core driver; the runtime pm APIs are used for clock
enable/disable.
TODO:
-
From: Benoit Cousson b-cous...@ti.com
Following 2 hwmod structures are added
1. usb_host_hs
The hwmod of usbhs with uhh, ehci and ohci base addresses
functional clock and ehci, ohci irqs
2. usb_tll_hs
hwmod of usbhs with the TLL base address and irq.
Signed-off-by: Benoit
Following 2 hwmod structures are added
1. usb_host_hs
The hwmod of usbhs with uhh, ehci and ohci base addresses
functional clock and ehci, ohci irqs
2. usb_tll_hs
hwmod of usbhs with the TLL base address and irq.
Signed-off-by: Keshava Munegowda
Following 2 hwmod structures are added
1. usb_host_hs
The hwmod of usbhs with uhh, ehci and ohci base addresses
functional clock and ehci, ohci irqs
2. usb_tll_hs
hwmod of usbhs with the TLL base address and irq.
Signed-off-by: Keshava Munegowda
The hwmod structure of usb_host_hs and usb_tll are
retrieved and registered with omap device
Signed-off-by: Keshava Munegowda keshava_mgo...@ti.com
Reviewed-by: Partha Basak part...@india.ti.com
---
arch/arm/mach-omap2/usb-host.c | 100 ++--
1 files changed,
From: Keshava Munegowda keshava_mgo...@ti.com
device name usbhs clocks are changed from
usbhs-omap.0 to usbhs_omap; this is because
in the hwmod registration the device name is set
as usbhs_omap; The redudant clock nodes are removed.
Signed-off-by: Keshava Munegowda keshava_mgo...@ti.com
From: Keshava Munegowda keshava_mgo...@ti.com
The ehci and ohci drivers does not use the APIs of the usbhs
core driver; the runtime pm APIs are used for clock
enable/disable. Since usbhs is parent platform device of the
ehci and ohci devices, the runtime apis indirectly uses the
usb hs core
From: Keshava Munegowda keshava_mgo...@ti.com
The usbhs core driver does not enable/disable the interface and
functional clocks directly, These clocks are handled by runtime pm,
hence instead of the clock enable/disable, the runtime pm APIS are
used. however,the optional clocks and port clocks
From: Keshava Munegowda keshava_mgo...@ti.com
The usbhs core driver does not enable/disable the interface and
functional clocks directly, These clocks are handled by runtime pm,
hence instead of the clock enable/disable, the runtime pm APIS are
used. however,the optional clocks and port clocks
On Tue, Oct 11, 2011 at 1:21 PM, Keshava Munegowda
keshava_mgo...@ti.com wrote:
Following 2 hwmod structures are added
1. usb_host_hs
The hwmod of usbhs with uhh, ehci and ohci base addresses
functional clock and ehci, ohci irqs
2. usb_tll_hs
hwmod of usbhs
hi Kevin,
Apologies for the delayed response, I was on vacation.
On October 01, 2011 4:57 AM, Hilman, Kevin wrote:
Abhilash,
Kevin Hilman khil...@ti.com writes:
Abhilash K V abhilash...@ti.com writes:
From: Abhilash K V abhilash...@ti.com
In case of AM3517 AM3505, SmartReflex is not
On Tue, Oct 11, 2011 at 11:18 AM, Munegowda, Keshava
keshava_mgo...@ti.com wrote:
On Tue, Oct 11, 2011 at 6:08 AM, Paul Walmsley p...@pwsan.com wrote:
Hi
so I just noticed another problem with these hwmods:
On Thu, 6 Oct 2011, Keshava Munegowda wrote:
Following 2 hwmod structures are added
Hi Paul,
On 10/11/2011 2:40 AM, Paul Walmsley wrote:
Hi
and some comments on this one ...
On Thu, 6 Oct 2011, Keshava Munegowda wrote:
[...]
+static struct omap_hwmod_ocp_if omap44xx_l4_cfg__usb_tll_hs = {
+ .master =omap44xx_l4_cfg_hwmod,
+ .slave
Hi,
On Mon, Oct 10, 2011 at 08:15:29PM -0400, Alan Stern wrote:
In fact we do already have sibling lists. They are maintained as
part
of the device_private structure. What we are missing is a
device_for_each_sibling() routine. It could be added pretty easily;
it
Hi,
On Mon, Oct 10, 2011 at 10:40:55AM +0530, Gupta, Ajay Kumar wrote:
Hi,
On Mon, Sep 26, 2011 at 03:21:07PM +0530, Gupta, Ajay Kumar wrote:
To: linux-omap@vger.kernel.org
Cc: linux-...@vger.kernel.org; Balbi, Felipe; t...@atomide.com;
B, Ravi; Cousson, Benoit; Gupta, Ajay
Hi,
On Tue, Oct 11, 2011 at 02:13:07PM +0530, Gupta, Ajay Kumar wrote:
Hi,
On Mon, Oct 10, 2011 at 10:40:55AM +0530, Gupta, Ajay Kumar wrote:
Hi,
On Mon, Sep 26, 2011 at 03:21:07PM +0530, Gupta, Ajay Kumar wrote:
To: linux-omap@vger.kernel.org
Cc: linux-...@vger.kernel.org;
Hi,
On Tue, Oct 11, 2011 at 02:13:07PM +0530, Gupta, Ajay Kumar wrote:
Hi,
On Mon, Oct 10, 2011 at 10:40:55AM +0530, Gupta, Ajay Kumar wrote:
Hi,
On Mon, Sep 26, 2011 at 03:21:07PM +0530, Gupta, Ajay Kumar
wrote:
To: linux-omap@vger.kernel.org
Cc:
Hi,
On Tue, Oct 11, 2011 at 03:07:46PM +0530, Gupta, Ajay Kumar wrote:
Hi,
On Tue, Oct 11, 2011 at 02:13:07PM +0530, Gupta, Ajay Kumar wrote:
Hi,
On Mon, Oct 10, 2011 at 10:40:55AM +0530, Gupta, Ajay Kumar wrote:
Hi,
On Mon, Sep 26, 2011 at 03:21:07PM +0530, Gupta, Ajay Kumar
Hi,
On Tue, Oct 11, 2011 at 02:13:07PM +0530, Gupta, Ajay Kumar wrote:
Hi,
On Mon, Oct 10, 2011 at 10:40:55AM +0530, Gupta, Ajay Kumar
wrote:
Hi,
On Mon, Sep 26, 2011 at 03:21:07PM +0530, Gupta, Ajay Kumar
wrote:
To: linux-omap@vger.kernel.org
Cc:
Hi Ohad,
On Mon, Oct 10, 2011 at 01:02:46PM -0400, Ohad Ben-Cohen wrote:
On Mon, Oct 10, 2011 at 5:36 PM, Roedel, Joerg joerg.roe...@amd.com wrote:
Yes, somthing like that. Probably the iommu_ops-unmap function should
be turned into a unmap_page function call which only takes an iova and
On Mon, Oct 10, 2011 at 06:01:06PM -0400, Ohad Ben-Cohen wrote:
On Mon, Oct 10, 2011 at 5:36 PM, Roedel, Joerg joerg.roe...@amd.com wrote:
The master branch is best to base your patches on for generic work.
It looks like the master branch is missing something like this:
From
On Mon, Oct 10, 2011 at 06:49:32PM -0400, Ohad Ben-Cohen wrote:
-int iommu_unmap(struct iommu_domain *domain, unsigned long iova, int
gfp_order)
+int iommu_unmap(struct iommu_domain *domain, unsigned long iova, int size)
{
- size_t size;
+ int order, unmapped_size,
Hello.
On 10-10-2011 16:26, Felipe Balbi wrote:
val (val != 1) == val 1
Signed-off-by: Felipe Balbiba...@ti.com
---
arch/arm/mach-omap2/smartreflex.c |2 +-
1 files changed, 1 insertions(+), 1 deletions(-)
diff --git a/arch/arm/mach-omap2/smartreflex.c
Hello.
On 10-10-2011 16:26, Felipe Balbi wrote:
fix a bug which has been on this driver since
it was added by the original commit 984aa6db
Please also specify that commit's summary in parens.
which would never clear IRQSTATUS bits.
Signed-off-by: Felipe Balbi ba...@ti.com
WBR,
This patch set adds support for musb interface for TI81XX and AM33XX
platforms and are dependent on recent patch series from Hemant Pedanekar
at [1] and [2] and Vaibhav Hiremath at [3]
TI81XX and AM33XX platform has dual musb instances, uses CPPI4.1 DMA and
has built in usb PHY. The current set
From: Ravi Babu ravib...@ti.com
Added musb support for ti81xx platform which has two instances of musb
interface and uses CPPI4.1 DMA. The current patch set adds support for
single instance and in PIO mode only.
Signed-off-by: Ajay Kumar Gupta ajay.gu...@ti.com
Signed-off-by: Ravi Babu
From: Ravi Babu ravib...@ti.com
Adding musb support in ti816 EVM board file.
Signed-off-by: Ajay Kumar Gupta ajay.gu...@ti.com
Signed-off-by: Ravi Babu ravib...@ti.com
Acked-by: Felipe Balbi ba...@ti.com
---
arch/arm/mach-omap2/board-ti8168evm.c |9 +
1 files changed, 9
Switch on the phy for am335x.
Signed-off-by: Ajay Kumar Gupta ajay.gu...@ti.com
---
Changes from v1:
- Added ioremap for AM33x SCM base.
arch/arm/mach-omap2/omap_phy_internal.c | 21 ++---
1 files changed, 14 insertions(+), 7 deletions(-)
diff --git
Enabled the flag so that musb_dsps glue file can be used for am335x
Signed-off-by: Ajay Kumar Gupta ajay.gu...@ti.com
---
Changes from v1
- Removed unneeded parens.
drivers/usb/musb/Kconfig |6 +++---
1 files changed, 3 insertions(+), 3 deletions(-)
diff --git
Adding ti81xx_musb_phy_power() which will be used by musb driver through
its function pointer in board_data.
Signed-off-by: Ajay Kumar Gupta ajay.gu...@ti.com
Signed-off-by: Ravi Babu ravib...@ti.com
---
Changes from v3:
- Added ioremap and inumap for SCM register access instead of using
From: Ravi Babu ravib...@ti.com
TI81XX platform has two musb interfaces and uses CPPI4.1 DMA engine.
It has builtin USB PHYs as AM35x. The current set of patches adds support
for one instance and only in PIO mode.
Signed-off-by: Ajay Kumar Gupta ajay.gu...@ti.com
Signed-off-by: Ravi Babu
Adding musb support in am335x EVM board file.
Signed-off-by: Ajay Kumar Gupta ajay.gu...@ti.com
Acked-by: Felipe Balbi ba...@ti.com
---
arch/arm/mach-omap2/board-am335xevm.c |9 +
arch/arm/mach-omap2/usb-musb.c|2 +-
2 files changed, 10 insertions(+), 1 deletions(-)
diff
From: Ravi Babu ravib...@ti.com
Adding musb support in ti814 EVM board file.
Signed-off-by: Ajay Kumar Gupta ajay.gu...@ti.com
Signed-off-by: Ravi Babu ravib...@ti.com
Acked-by: Felipe Balbi ba...@ti.com
---
arch/arm/mach-omap2/board-ti8148evm.c |9 +
1 files changed, 9
On 10/10/2011 11:34 PM, Hunter, Jon wrote:
Hi Benoit,
On 10/10/2011 4:54, Cousson, Benoit wrote:
Hi Jon,
On 10/8/2011 12:46 AM, Hunter, Jon wrote:
Hi Benoit,
On 10/7/2011 3:23, Cousson, Benoit wrote:
Hi Paul Jon,
On 10/7/2011 3:42 AM, Paul Walmsley wrote:
+ Benoît
On Fri, 16 Sep
Hi Ajay,
On 10/11/11 13:26, Ajay Kumar Gupta wrote:
From: Ravi Babu ravib...@ti.com
Adding musb support in ti814 EVM board file.
Signed-off-by: Ajay Kumar Gupta ajay.gu...@ti.com
Signed-off-by: Ravi Babu ravib...@ti.com
Acked-by: Felipe Balbi ba...@ti.com
---
Hi Ajay,
On 10/11/11 13:26, Ajay Kumar Gupta wrote:
From: Ravi Babu ravib...@ti.com
Adding musb support in ti816 EVM board file.
Signed-off-by: Ajay Kumar Gupta ajay.gu...@ti.com
Signed-off-by: Ravi Babu ravib...@ti.com
Acked-by: Felipe Balbi ba...@ti.com
This patch can result in a
On Tue, Oct 11, 2011 at 03:22:33PM +0400, Sergei Shtylyov wrote:
Hello.
On 10-10-2011 16:26, Felipe Balbi wrote:
val (val != 1) == val 1
Signed-off-by: Felipe Balbiba...@ti.com
---
arch/arm/mach-omap2/smartreflex.c |2 +-
1 files changed, 1 insertions(+), 1 deletions(-)
On Tue, Oct 11, 2011 at 03:23:52PM +0400, Sergei Shtylyov wrote:
Hello.
On 10-10-2011 16:26, Felipe Balbi wrote:
fix a bug which has been on this driver since
it was added by the original commit 984aa6db
Please also specify that commit's summary in parens.
sure, no problem
--
On Tue, Oct 11, 2011 at 1:37 AM, Andrei Warkentin awarken...@vmware.com wrote:
Hi,
- Original Message -
From: Greg KH g...@kroah.com
To: Josh Triplett j...@joshtriplett.org
Cc: G, Manjunath Kondaiah manj...@ti.com,
linux-arm-ker...@lists.infradead.org, Grant Likely
On Tue, Oct 11, 2011 at 5:28 AM, Kevin Hilman khil...@ti.com wrote:
Govindraj.R govindraj.r...@ti.com writes:
In preparation to runtime conversion add missing uart regs to
port structure which can be used in context restore.
Also ensuring all uart reg info's are part of port structure.
On Monday 10 October 2011, Kevin Hilman wrote:
I got this build error only now after pulling in the latest omap series, but
I cannot tell what caused it. It's also not clear to me if this is the
correct
solution. Please ack or provide a better fix.
This code was merged for v2.6.39, so
On Tue, 11 Oct 2011, Felipe Balbi wrote:
It doesn't shown here, but the TLL link is completely optional. It's
mainly used for modem integration, IIRC. Still, if we're using TLL, EHCI
and OHCI will depend on a clock provided by the USBTLL block.
Clearly, USBTLL isn't either a
Hi,
On Tue, Oct 11, 2011 at 10:04:28AM -0400, Alan Stern wrote:
On Tue, 11 Oct 2011, Felipe Balbi wrote:
It doesn't shown here, but the TLL link is completely optional. It's
mainly used for modem integration, IIRC. Still, if we're using TLL, EHCI
and OHCI will depend on a clock
Hi Igor,
On 10/11/11 13:26, Ajay Kumar Gupta wrote:
From: Ravi Babu ravib...@ti.com
Adding musb support in ti814 EVM board file.
Signed-off-by: Ajay Kumar Gupta ajay.gu...@ti.com
Signed-off-by: Ravi Babu ravib...@ti.com
Acked-by: Felipe Balbi ba...@ti.com
---
On Tue, Oct 11, 2011 at 7:49 AM, Ohad Ben-Cohen o...@wizery.com wrote:
int iommu_map(struct iommu_domain *domain, unsigned long iova,
- phys_addr_t paddr, int gfp_order, int prot)
+ phys_addr_t paddr, int size, int prot)
{
Even though it is not realistic that size
Hi,
On 10/11/11 13:26, Ajay Kumar Gupta wrote:
From: Ravi Babu ravib...@ti.com
Adding musb support in ti816 EVM board file.
Signed-off-by: Ajay Kumar Gupta ajay.gu...@ti.com
Signed-off-by: Ravi Babu ravib...@ti.com
Acked-by: Felipe Balbi ba...@ti.com
This patch can result in a
Santosh Shilimkar santosh.shilim...@ti.com writes:
On Monday 10 October 2011 11:31 PM, Kevin Hilman wrote:
Hi Santosh,
Santosh Shilimkar santosh.shilim...@ti.com writes:
The series adds OMAP4 MPUSS (MPU SubSystem) power management support for
suspend (S2R), CPU hotplug and CPUidle.
On Tue, Oct 11, 2011 at 12:38 PM, Roedel, Joerg joerg.roe...@amd.com wrote:
You need to make sure that you don;t pass larger regions then requested
to the low-level driver. Some logic like in the iommu_map function
should do it.
You're right. But the solution IMHO should be getting rid of that
Hi KyongHo,
On Tue, Oct 11, 2011 at 4:59 PM, KyongHo Cho pullip@samsung.com wrote:
I think the type of size should be size_t.
..
Thus, it should be
iommu_unmap(domain, orig_iova, orig_size - size)
Agree with both suggestions, thanks !
P.S - please only keep the parts of my email which
Hi,
Adding musb support in ti816 EVM board file.
Signed-off-by: Ajay Kumar Gupta ajay.gu...@ti.com
Signed-off-by: Ravi Babu ravib...@ti.com
Acked-by: Felipe Balbi ba...@ti.com
This patch can result in a merge conflict, therefore I think
this one should be taken through Tony's
Koyamangalath, Abhilash abhilash...@ti.com writes:
hi Kevin,
Apologies for the delayed response, I was on vacation.
On October 01, 2011 4:57 AM, Hilman, Kevin wrote:
Abhilash,
Kevin Hilman khil...@ti.com writes:
Abhilash K V abhilash...@ti.com writes:
From: Abhilash K V
Govindraj.R govindraj.r...@ti.com writes:
Modify the omap_uart_can_sleep function to check uart is active
or not to be used by pm code to enter low power states.
Doesn't the driver now control when the UART clocks are gated (using
runtime PM autosuspend)?
IMO, this check should be completely
Hi Felipe
On Tue, 11 Oct 2011, Felipe Balbi wrote:
maybe, but let's go with EXPORT_SYMBOL_GPL(). My only concern is that
this IP comes from synopsys, and I'm not really keen on adding
OMAP-specific, integration-related knowledge on a driver which was
supposed to be reusable ;-)
But at
Govindraj.R govindraj.r...@ti.com writes:
From: Deepak K deepa...@ti.com
The following UART parameters are defined within the UART driver:
1). Whether the UART uses DMA (dma_enabled), by default set to 0
2). The size of dma buffer (set to 4096 bytes)
3). The time after which the dma should
Govindraj.R govindraj.r...@ti.com writes:
In suspend path the console_lock is taken by uart_port_suspend
however when no_console_suspend is used console_lock is not taken.
During system wide suspend omap_pwr_domain hooks cut all
clocks that are left enabled. So its unsafe to proceed printing
On Tue, Oct 11, 2011 at 12:52:05PM -0600, Paul Walmsley wrote:
Hi Felipe
On Tue, 11 Oct 2011, Felipe Balbi wrote:
maybe, but let's go with EXPORT_SYMBOL_GPL(). My only concern is that
this IP comes from synopsys, and I'm not really keen on adding
OMAP-specific, integration-related
Hi
On Tue, 11 Oct 2011, Felipe Balbi wrote:
On Tue, Oct 11, 2011 at 12:52:05PM -0600, Paul Walmsley wrote:
On Tue, 11 Oct 2011, Felipe Balbi wrote:
maybe, but let's go with EXPORT_SYMBOL_GPL(). My only concern is that
this IP comes from synopsys, and I'm not really keen on adding
Hi,
On Tue, Oct 11, 2011 at 01:17:03PM -0600, Paul Walmsley wrote:
On Tue, 11 Oct 2011, Felipe Balbi wrote:
maybe, but let's go with EXPORT_SYMBOL_GPL(). My only concern is that
this IP comes from synopsys, and I'm not really keen on adding
OMAP-specific, integration-related
Govindraj.R govindraj.r...@ti.com writes:
Move the errata handling mechanism from serial.c to omap-serial file
and utilise the same func in driver file.
Errata i202, i291 are moved to be handled with omap-serial
Moving the errata macro from serial.c file to driver header file
as from on
Govindraj.R govindraj.r...@ti.com writes:
For the early console probing we had avoided hwmod reset and idling
and uart was idled using hwmod API and enabled back using omap_device API
after omap_device registration.
Now since we are using runtime API's to enable back uart, move hwmod
idling
On Fri, 07 Oct 2011 12:45:43 -0700
Tony Lindgren t...@atomide.com wrote:
This allows mapping external memory such as SRAM for use.
This is needed for some small chunks of code, such as reprogramming
SDRAM memory source clocks that can't be executed in SDRAM. Other
use cases include some PM
* Andres Salomon dilin...@queued.net [111011 14:11]:
On Fri, 07 Oct 2011 12:45:43 -0700
Tony Lindgren t...@atomide.com wrote:
This allows mapping external memory such as SRAM for use.
This is needed for some small chunks of code, such as reprogramming
SDRAM memory source clocks that
Hi,
On Thu, Sep 22, 2011 at 12:14 AM, Jean Pihet jean.pi...@newoldbits.com wrote:
Update the data from the measurements performed at HW and SW levels.
Cf.
http://www.omappedia.org/wiki/Power_Management_Device_Latencies_Measurement
for a detailed explanation on where are the numbers
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