On Wed, Apr 25, 2012 at 8:46 PM, Jon Hunter jon-hun...@ti.com wrote:
Hi Tero,
On 04/25/2012 02:26 AM, Tero Kristo wrote:
On Tue, 2012-04-24 at 13:22 -0500, Jon Hunter wrote:
Hi Tero,
On 04/20/2012 04:33 AM, Tero Kristo wrote:
From: Santosh Shilimkar santosh.shilim...@ti.com
Work around
On Thu, Apr 26, 2012 at 11:15:21, Paul Walmsley wrote:
Hi,
+/*
+ * clkdiv32 is generated from fixed division of 732.4219
+ */
+static struct clk clkdiv32k_ick = {
+ .name = clkdiv32k_ick,
+ .clkdm_name = clk_24mhz_clkdm,
+ .rate = 32768,
+ .parent
On Thu, Apr 26, 2012 at 11:26:09, Russ Dill wrote:
On Wed, Apr 25, 2012 at 10:42 PM, Hiremath, Vaibhav hvaib...@ti.com wrote:
On Thu, Apr 26, 2012 at 10:06:40, Russ Dill wrote:
On Tue, Apr 24, 2012 at 2:45 AM, Vaibhav Hiremath hvaib...@ti.com wrote:
Current OMAP code supports couple of
Hi Vaibhav, Afzal, Vaibhav,
while working on clock33xx_data.c, it became clear that we would not be
able to remove the MODULEMODE leaf clocks for several IP blocks that share
driver code with other DaVinci chips. This is because:
1. the drivers for these IP blocks only use the clock
On Tuesday 24 April 2012 11:48 PM, Wolfram Sang wrote:
On Tue, Apr 24, 2012 at 11:44:15PM +0530, Shubhrajyoti wrote:
On Monday 23 April 2012 10:19 PM, Wolfram Sang wrote:
[ 154.901153] Exception stack(0xdf9b9fb0 to 0xdf9b9ff8)
[ 154.907104] 9fa0:
On Thu, 26 Apr 2012, Hiremath, Vaibhav wrote:
Unfortunately, this is fractional divider, assuming input clock of 24MHz.
24MHz / 732.4219 = 32KHz (Normal OPP100)
24MHz / 366.2109 = 32KHz (OPP50)
Yes, I already saw that in the TRM. The question is, how is the
fractional divider implemented
On Thursday 26 April 2012 11:58 AM, Shubhrajyoti wrote:
On Tuesday 24 April 2012 11:48 PM, Wolfram Sang wrote:
On Tue, Apr 24, 2012 at 11:44:15PM +0530, Shubhrajyoti wrote:
On Monday 23 April 2012 10:19 PM, Wolfram Sang wrote:
[ 154.901153] Exception stack(0xdf9b9fb0 to 0xdf9b9ff8)
[
On Thu, Apr 26, 2012 at 12:06:00, Paul Walmsley wrote:
On Thu, 26 Apr 2012, Hiremath, Vaibhav wrote:
Unfortunately, this is fractional divider, assuming input clock of 24MHz.
24MHz / 732.4219 = 32KHz (Normal OPP100)
24MHz / 366.2109 = 32KHz (OPP50)
Yes, I already saw that in the
On Thu, Apr 26, 2012 at 11:54:51, Paul Walmsley wrote:
Hi Vaibhav, Afzal, Vaibhav,
while working on clock33xx_data.c, it became clear that we would not be
able to remove the MODULEMODE leaf clocks for several IP blocks that share
driver code with other DaVinci chips. This is because:
On Wed, 2012-04-25 at 18:01 -0500, Ricardo Neri wrote:
If so, we need to make sure it's not currently called in an atomic
context, because it would break if the function will sleep in the
future. And with make sure I just mean that we check the code and keep
it in mind. Or perhaps adding
On Wed, Apr 25, 2012 at 11:23 PM, Hiremath, Vaibhav hvaib...@ti.com wrote:
On Thu, Apr 26, 2012 at 11:26:09, Russ Dill wrote:
On Wed, Apr 25, 2012 at 10:42 PM, Hiremath, Vaibhav hvaib...@ti.com wrote:
On Thu, Apr 26, 2012 at 10:06:40, Russ Dill wrote:
On Tue, Apr 24, 2012 at 2:45 AM, Vaibhav
On Thu, 26 Apr 2012, Hiremath, Vaibhav wrote:
On Thu, Apr 26, 2012 at 12:06:00, Paul Walmsley wrote:
On Thu, 26 Apr 2012, Hiremath, Vaibhav wrote:
Unfortunately, this is fractional divider, assuming input clock of 24MHz.
24MHz / 732.4219 = 32KHz (Normal OPP100)
24MHz / 366.2109
On Wed, 25 Apr 2012, Hiremath, Vaibhav wrote:
On Wed, Apr 25, 2012 at 19:25:29, Paul Walmsley wrote:
On Wed, 25 Apr 2012, Hiremath, Vaibhav wrote:
Thanks for describing it for me. I will change AM33XX clock tree for this
And submit the next version soon.
Well I can just remove
On Thu, 26 Apr 2012, Paul Walmsley wrote:
I have taken a first pass at this. The updated patch is below. It has
been compile-tested only. Could you please review this and try testing
it? It is also in the branch 'am33xx_support_3.5' of
git://git.pwsan.com/linux-2.6.
Here is the patch.
Hello Vaibhav,
looking at Table 1-1 Device Features of SPRUH73D, it seems that some
AM33xx family chips come with some features disabled, such as the
PRU-ICSS, the SGX, Ethernet, or USB. How will this affect the clock tree?
For example, is it correct for us to include the PRU-ICSS clock
On Thu, 26 Apr 2012, Hiremath, Vaibhav wrote:
On Thu, Apr 26, 2012 at 08:49:28, Paul Walmsley wrote:
(attribution lost)
Also, since we're not defining any autodeps for the AM335x platform, we
shouldn't need the CLKDM_NO_AUTODEPS flag either? Since no autodeps
are
defined,
Hello,
Here is version 3 of this patch after review from Tony Lindgren.
This version adds a separate initialization function mostly to check CPU
compatibility. This check cannot be done in gpmc_enable_hwecc_bch() (which
is meant to be called from mtd function ecc.hwctl) because ecc.hwctl is
not
Paul Walmsley p...@pwsan.com writes:
On Tue, 24 Apr 2012, Kevin Hilman wrote:
Iteration over all power domains in the idle path is unnecessary since
only power domains that are transitioning need to be accounted for.
Also PRCM register accesses are known to be expensive, so the
additional
On Thu, Apr 26, 2012 at 13:15:18, Russ Dill wrote:
On Wed, Apr 25, 2012 at 11:23 PM, Hiremath, Vaibhav hvaib...@ti.com wrote:
On Thu, Apr 26, 2012 at 11:26:09, Russ Dill wrote:
On Wed, Apr 25, 2012 at 10:42 PM, Hiremath, Vaibhav hvaib...@ti.com
wrote:
On Thu, Apr 26, 2012 at 10:06:40,
Hi
a question
On Wed, 25 Apr 2012, Vaibhav Hiremath wrote:
Current OMAP code supports couple of clocksource options based
on compilation flag (CONFIG_OMAP_32K_TIMER). The 32KHz sync-timer
and a gptimer which can run on 32KHz or system clock (e.g 38.4 MHz).
So there can be 3 options -
1.
Hi Vaibhav, Russ,
On 04/26/2012 08:46 AM, Hiremath, Vaibhav wrote:
On Thu, Apr 26, 2012 at 13:15:18, Russ Dill wrote:
On Wed, Apr 25, 2012 at 11:23 PM, Hiremath, Vaibhav hvaib...@ti.com wrote:
On Thu, Apr 26, 2012 at 11:26:09, Russ Dill wrote:
On Wed, Apr 25, 2012 at 10:42 PM, Hiremath,
On Thu, Apr 26, 2012 at 20:40:34, Paul Walmsley wrote:
Hi
a question
On Wed, 25 Apr 2012, Vaibhav Hiremath wrote:
Current OMAP code supports couple of clocksource options based
on compilation flag (CONFIG_OMAP_32K_TIMER). The 32KHz sync-timer
and a gptimer which can run on 32KHz or
On Thu, Apr 26, 2012 at 21:28:15, Hunter, Jon wrote:
Hi Vaibhav, Russ,
On 04/26/2012 08:46 AM, Hiremath, Vaibhav wrote:
On Thu, Apr 26, 2012 at 13:15:18, Russ Dill wrote:
On Wed, Apr 25, 2012 at 11:23 PM, Hiremath, Vaibhav hvaib...@ti.com
wrote:
On Thu, Apr 26, 2012 at 11:26:09, Russ
On Thu, Apr 26, 2012 at 14:27:20, Paul Walmsley wrote:
On Thu, 26 Apr 2012, Hiremath, Vaibhav wrote:
On Thu, Apr 26, 2012 at 08:49:28, Paul Walmsley wrote:
(attribution lost)
Also, since we're not defining any autodeps for the AM335x platform,
we
shouldn't need the
On Thu, Apr 26, 2012 at 20:40:34, Paul Walmsley wrote:
Hi
a question
On Wed, 25 Apr 2012, Vaibhav Hiremath wrote:
snip
+
+ sync32k_ick = clk_get(NULL, omap_32ksync_ick);
+ if (!IS_ERR(sync32k_ick))
+ clk_enable(sync32k_ick);
You've added hwmod data for this IP
From: J Keerthy j-keer...@ti.com
AVS(Adaptive Voltage Scaling) is a power management technique which
controls the operating voltage of a device in order to optimize (i.e. reduce)
its power consumption. The voltage is adapted depending on static factors
(chip manufacturing process) and dynamic
From: Jean Pihet j-pi...@ti.com
Change the name field value to better reflect the smartreflex
integration in the system.
Signed-off-by: Jean Pihet j-pi...@ti.com
Signed-off-by: J Keerthy j-keer...@ti.com
---
arch/arm/mach-omap2/omap_hwmod_3xxx_data.c |8
From: J Keerthy j-keer...@ti.com
Move the omap_volt_data structure from mach-omap2/ directory
to arch/arm/plat-omap/include/plat/ so that it is accessible
from both mach-omap2 and drivers directories.
Signed-off-by: J Keerthy j-keer...@ti.com
---
arch/arm/mach-omap2/voltage.h | 21
From: Jean Pihet j-pi...@ti.com
Convert SmartReflex class functions to take a struct omap_sr *, rather than
a struct voltagedomain *. SmartReflex code should be driver code and not
tightly coupled to OMAP subarchitecture-specific structures.
Based on Paul's original code for the SmartReflex
From: Jean Pihet j-pi...@ti.com
Add a Kconfig menu (POWER_AVS) and rename the Kconfig options
for the OMAP SmartReflex implementation:
CONFIG_OMAP_SMARTREFLEX renames to CONFIG_POWER_AVS_OMAP
CONFIG_OMAP_SMARTREFLEX_CLASS3 renames to CONFIG_POWER_AVS_OMAP_CLASS3
This change makes
From: Jean Pihet j-pi...@ti.com
Remove the global errminlimit debugfs entry and create per-voltage
entries from the data tables.
Signed-off-by: Jean Pihet j-pi...@ti.com
Signed-off-by: J Keerthy j-keer...@ti.com
---
arch/arm/mach-omap2/smartreflex.c |7 +--
1 files changed, 5
From: Jean Pihet j-pi...@ti.com
The SmartReflex driver incorrectly treats some per-OPP data as data
common to all OPPs (e.g., ERRMINLIMIT). Move this data into a per-OPP
data structure.
Furthermore, in order to make the SmartReflex implementation ready for
the move to drivers/, remove the
From: Jean Pihet j-pi...@ti.com
Associate a name with each SmartReflex instance from the hwmod data,
rather than attempting to reuse the name of a voltage domain. The name
from hwmod better reflects the smartreflex integration in the system.
Also have the name passed to the drivers using pdata,
From: Jean Pihet j-pi...@ti.com
After a clean-up of the interfaces the OMAP Smartreflex IP driver is now a
generic driver. Move it to drivers/power/avs/.
The build is controlled by the following Kconfig options:
. CONFIG_POWER_AVS: general knob for Adaptive Voltage Scaling support,
.
From: Jean Pihet j-pi...@ti.com
Now that omap_test_timeout is only accessible from mach-omap2/,
introduce a similar function for SR.
This change makes the SmartReflex implementation ready for the move
to drivers/.
Signed-off-by: Jean Pihet j-pi...@ti.com
Signed-off-by: J Keerthy
From: Jean Pihet j-pi...@ti.com
Move the smartreflex header file
(arch/arm/mach-omap2/smartreflex.h) in a new header file
include/linux/power/smartreflex.h.
This change makes the SmartReflex implementation ready for the move
to drivers/.
Signed-off-by: Jean Pihet j-pi...@ti.com
Signed-off-by: J
From: J Keerthy j-keer...@ti.com
AVS(Adaptive Voltage Scaling) is a power management technique which
controls the operating voltage of a device in order to optimize (i.e. reduce)
its power consumption. The voltage is adapted depending on static factors
(chip manufacturing process) and dynamic
On Wed, Apr 04, 2012 at 12:15:24PM +0100, Will Deacon wrote:
On Wed, Apr 04, 2012 at 12:29:49AM +0100, Paul Walmsley wrote:
Part of the problem is that the clockdomain data for the emu_sys
clockdomain is wrong. Here's something to try to fix it. It might just
be enough to get it to
Vaibhav Hiremath hvaib...@ti.com writes:
Current OMAP code supports couple of clocksource options based
on compilation flag (CONFIG_OMAP_32K_TIMER). The 32KHz sync-timer
and a gptimer which can run on 32KHz or system clock (e.g 38.4 MHz).
[...]
+
+ sync32k_ick = clk_get(NULL,
* Hiremath, Vaibhav hvaib...@ti.com [120423 11:31]:
On Thu, Apr 19, 2012 at 04:48:37, Tony Lindgren wrote:
* Hiremath, Vaibhav hvaib...@ti.com [120413 03:39]:
On Thu, Apr 12, 2012 at 13:56:06, Paul Walmsley wrote:
Yes, we are using am3517evm file for AM33XX MACHINE_INIT definition
On Fri, Apr 27, 2012 at 00:13:13, Tony Lindgren wrote:
* Hiremath, Vaibhav hvaib...@ti.com [120423 11:31]:
On Thu, Apr 19, 2012 at 04:48:37, Tony Lindgren wrote:
* Hiremath, Vaibhav hvaib...@ti.com [120413 03:39]:
On Thu, Apr 12, 2012 at 13:56:06, Paul Walmsley wrote:
Yes, we
On Thu, 26 Apr 2012, Hiremath, Vaibhav wrote:
On Thu, Apr 26, 2012 at 14:27:20, Paul Walmsley wrote:
(attribution lost)
I am thinking of separating clocktree patch (PATCH-V3 3/3) from this
series,
so that clockdomain stuff can get in independently, and clocktree anyway
will
* Hiremath, Vaibhav hvaib...@ti.com [120426 11:52]:
Yes, they were accepted and were also available under linux-omap/soc2 branch
for quite some time.
Hmm sorry if I've dropped them accidentally. I tend to drop the branches
after each merge window and purge my linux-omap mailbox too.
On Thu, Apr 26, 2012 at 11:10:31PM +0530, Keerthy wrote:
From: J Keerthy j-keer...@ti.com
AVS(Adaptive Voltage Scaling) is a power management technique which
controls the operating voltage of a device in order to optimize (i.e. reduce)
its power consumption. The voltage is adapted depending
On Wed, 25 Apr 2012, Vaibhav Hiremath wrote:
Add missing idle_st bit for 32k-sync timer into the prcm-common
header file, required for hwmod data.
Signed-off-by: Vaibhav Hiremath hvaib...@ti.com
Reviewed-by: Santosh Shilimkar santosh.shilim...@ti.com
Cc: Felipe Balbi ba...@ti.com
Cc:
On Wed, 25 Apr 2012, Vaibhav Hiremath wrote:
Add 32k-sync timer hwmod-data and add ocp_if details to
omap2 3 hwmod table.
Signed-off-by: Vaibhav Hiremath hvaib...@ti.com
Signed-off-by: Felipe Balbi ba...@ti.com
Reviewed-by: Santosh Shilimkar santosh.shilim...@ti.com
Cc: Benoit Cousson
On Thu, 26 Apr 2012, Hiremath, Vaibhav wrote:
On Thu, Apr 26, 2012 at 20:40:34, Paul Walmsley wrote:
On Wed, 25 Apr 2012, Vaibhav Hiremath wrote:
snip
+
+ sync32k_ick = clk_get(NULL, omap_32ksync_ick);
+ if (!IS_ERR(sync32k_ick))
+ clk_enable(sync32k_ick);
You've
On 04/26/2012 11:33 AM, Kevin Hilman wrote:
Vaibhav Hiremathhvaib...@ti.com writes:
Current OMAP code supports couple of clocksource options based
on compilation flag (CONFIG_OMAP_32K_TIMER). The 32KHz sync-timer
and a gptimer which can run on 32KHz or system clock (e.g 38.4 MHz).
[...]
+
NeilBrown ne...@suse.de writes:
All interrupts can wake-from-sleep (I think) so it should be
permissible to call enable_irq_wake(). Setting this flag allows that.
It is needed because without this, an interrupt which is delivered
during late suspend will get ignored but will not cause
* Kevin Hilman khil...@ti.com [120426 13:11]:
NeilBrown ne...@suse.de writes:
All interrupts can wake-from-sleep (I think) so it should be
permissible to call enable_irq_wake(). Setting this flag allows that.
It is needed because without this, an interrupt which is delivered
during
NeilBrown ne...@suse.de writes:
All interrupts can wake-from-sleep (I think) so it should be
permissible to call enable_irq_wake(). Setting this flag allows that.
It is needed because without this, an interrupt which is delivered
during late suspend will get ignored but will not cause
NeilBrown ne...@suse.de writes:
Most of the interrupts that come through this line should trigger
wakeups:
power button
RTC alarm
power available
usb plug/unplug
so mark the interrupt as a wakeup interrupt.
This is particularly important for when the interrupt arrives during
the
On Thu, Apr 26, 2012 at 11:33 AM, Kevin Hilman khil...@ti.com wrote:
Vaibhav Hiremath hvaib...@ti.com writes:
Current OMAP code supports couple of clocksource options based
on compilation flag (CONFIG_OMAP_32K_TIMER). The 32KHz sync-timer
and a gptimer which can run on 32KHz or system clock
On Thu, 26 Apr 2012 13:39:07 -0700 Kevin Hilman khil...@ti.com wrote:
NeilBrown ne...@suse.de writes:
All interrupts can wake-from-sleep (I think) so it should be
permissible to call enable_irq_wake(). Setting this flag allows that.
It is needed because without this, an interrupt
Vaibhav Hiremath hvaib...@ti.com writes:
Current OMAP code supports couple of clocksource options based
on compilation flag (CONFIG_OMAP_32K_TIMER). The 32KHz sync-timer
and a gptimer which can run on 32KHz or system clock (e.g 38.4 MHz).
So there can be 3 options -
1. 32KHz sync-timer
2.
On Thu, 26 Apr 2012, Paul Walmsley wrote:
Okay, thanks for testing. Please do update this patch to use
omap_hwmod_enable(), etc.; see for example omap_dm_timer_init_one().
And, just to be explicit, the ioremap(), clk_get(), and clk_enable()
should no longer be needed for OMAP2+, once you
On Thu, 19 Apr 2012, Mark A. Greer wrote:
From: Mark A. Greer mgr...@animalcreek.com
The am35x family of SoCs do not have an IVA so
a parallel set of clockdomain dependencies are
required that are simililar to OMAP3 but without
any IVA dependencies.
Signed-off-by: Mark A. Greer
This is a rebased version of this series which is ready for broader
testing. I'd especially appreciate testing from those of you with
AM35x platforms.
Currently, our SoC detection is based on SoC family detection
(using die ID) and the presence of specific IP blocks (or feature.)
This series
The cpu_is_omap35* macros for 3503, 3515, 3525) are unused.
Remove them in order to start removing IP detection from SoC family
detection.
Acked-by: Vaibhav Hiremath hvaib...@ti.com
Tested-by: Vaibhav Hiremath hvaib...@ti.com
Signed-off-by: Kevin Hilman khil...@ti.com
---
The AM35x UART4 is common to all AM35x devices, so use CK_AM35XX instead
of (CK_3505 | CK_3517), which is equivalent.
Acked-by: Vaibhav Hiremath hvaib...@ti.com
Tested-by: Vaibhav Hiremath hvaib...@ti.com
Signed-off-by: Kevin Hilman khil...@ti.com
---
arch/arm/mach-omap2/clock3xxx_data.c |2
The init for 3505/3517 specific clocks depends on the ordering of
cpu_is checks, is error prone and confusing (there are 2 separate
checks for cpu_is_omap3505()).
Remove the 3505-specific checking since CK_3505 flag is not used, and
treat all AM35x clocks the same.
This means that the SGX clock
There are several checks for AM35x devices done using
if (cpu_is_omap3517() || cpu_is_omap3505())
However, since the 3505 is just a 3517 without an SGX, the 3505 check
is redundant because cpu_is_omap3517() will always be true whenever
cpu_is_omap3505() is true. From plat/cpu.h:
#define
This flag is no longer used since clock init all AM35x devices
is now the same.
Acked-by: Vaibhav Hiremath hvaib...@ti.com
Tested-by: Vaibhav Hiremath hvaib...@ti.com
Signed-off-by: Kevin Hilman khil...@ti.com
---
arch/arm/plat-omap/include/plat/clkdev_omap.h |3 +--
1 file changed, 1
The 3505 check is now unused and can be removed.
There are no longer any cpu_is_* checks that depend on specific IP
detection.
Acked-by: Vaibhav Hiremath hvaib...@ti.com
Tested-by: Vaibhav Hiremath hvaib...@ti.com
Signed-off-by: Kevin Hilman khil...@ti.com
---
The cpu_is_omap3530() macro is unused, remove.
Acked-by: Vaibhav Hiremath hvaib...@ti.com
Tested-by: Vaibhav Hiremath hvaib...@ti.com
Signed-off-by: Kevin Hilman khil...@ti.com
---
arch/arm/plat-omap/include/plat/cpu.h |3 ---
1 file changed, 3 deletions(-)
diff --git
Currently cpu_is_omap3517() actually detects any device in the AM35x
family (3517 and no-SGX version 3505.) To make it more clear what is
being detected, convert the names from 3517 to AM35xx.
For the same reason, replace the CK_3517 flag used in the clock data
to CK_AM35XX.
Acked-by: Vaibhav
Vaibhav Hiremath hvaib...@ti.com writes:
As far as PRM/CM/PRCM modules are concerned, AM33XX device is
different than OMAP3 and OMAP4 architectures; so we need to
handle it separately.
This patch adds support for, Powerdomain, Powerdomain data,
PRM api's required for AM33XX device.
And
On 04/24/2012 10:37 PM, Ricardo Neri wrote:
On 04/23/2012 08:12 AM, Tomi Valkeinen wrote:
On Wed, 2012-03-28 at 16:38 -0600, Ricardo Neri wrote:
In order to avoid duplication of definitions. Use the definitions
provided
by asoundef.h. Furthermore, as CEA-861 and IEC-60958 are used by both
On Fri, Apr 27, 2012 at 04:08:07, Paul Walmsley wrote:
On Thu, 26 Apr 2012, Paul Walmsley wrote:
Okay, thanks for testing. Please do update this patch to use
omap_hwmod_enable(), etc.; see for example omap_dm_timer_init_one().
And, just to be explicit, the ioremap(), clk_get(), and
Hello Mark,
On Fri, Apr 27, 2012 at 12:41 AM, Mark Brown
broo...@opensource.wolfsonmicro.com wrote:
On Thu, Apr 26, 2012 at 11:10:31PM +0530, Keerthy wrote:
From: J Keerthy j-keer...@ti.com
AVS(Adaptive Voltage Scaling) is a power management technique which
controls the operating voltage of
On Fri, Apr 27, 2012 at 03:56:56, Hilman, Kevin wrote:
Vaibhav Hiremath hvaib...@ti.com writes:
Current OMAP code supports couple of clocksource options based
on compilation flag (CONFIG_OMAP_32K_TIMER). The 32KHz sync-timer
and a gptimer which can run on 32KHz or system clock (e.g 38.4
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