On 11/14/2012 07:08 PM, AnilKumar Ch wrote:
Add a new address space/memory resource to d_can device tree node. D_CAN
RAM initialization is achieved through RAMINIT register which is part of
AM33XX control module address space. D_CAN RAM init or de-init should be
done by writing instance
On 11/21/2012 06:45 AM, AnilKumar, Chimata wrote:
On Tue, Nov 20, 2012 at 15:56:32, Marc Kleine-Budde wrote:
On 11/20/2012 11:23 AM, AnilKumar, Chimata wrote:
On Tue, Nov 20, 2012 at 15:43:04, Marc Kleine-Budde wrote:
On 11/14/2012 07:08 PM, AnilKumar Ch wrote:
Add a new address space/memory
On 11/21/2012 06:44 AM, AnilKumar Ch wrote:
Add D_CAN raminit support to C_CAN driver to enable D_CAN RAM,
which holds all the message objects during transmission or
receiving of data. This initialization/de-initialization should
be done in synchronous with D_CAN clock.
In case of
On Wed, Nov 21, 2012 at 13:57:17, Marc Kleine-Budde wrote:
On 11/21/2012 06:44 AM, AnilKumar Ch wrote:
Add D_CAN raminit support to C_CAN driver to enable D_CAN RAM,
which holds all the message objects during transmission or
receiving of data. This initialization/de-initialization should
On 11/21/2012 06:44 AM, AnilKumar Ch wrote:
Add D_CAN raminit support to C_CAN driver to enable D_CAN RAM,
which holds all the message objects during transmission or
receiving of data. This initialization/de-initialization should
be done in synchronous with D_CAN clock.
In case of
A == AnilKumar Ch anilku...@ti.com writes:
A Add matrix keypad device tree data to am335x-evm by adding all
A the necessary parameters like keymap, row column gpios and etc.
A Signed-off-by: AnilKumar Ch anilku...@ti.com
A ---
A arch/arm/boot/dts/am335x-evm.dts | 20
On Wed, Nov 21, 2012 at 14:18:56, Marc Kleine-Budde wrote:
On 11/21/2012 06:44 AM, AnilKumar Ch wrote:
Add D_CAN raminit support to C_CAN driver to enable D_CAN RAM,
which holds all the message objects during transmission or
receiving of data. This initialization/de-initialization should
From: AnilKumar Ch anilku...@ti.com
Add D_CAN raminit support to C_CAN driver to enable D_CAN RAM,
which holds all the message objects during transmission or
receiving of data. This initialization/de-initialization should
be done in synchronous with D_CAN clock.
In case of AM335X-EVM (current
Hi Tony,
On 11/21/2012 01:13 AM, Tony Lindgren wrote:
Hi Roger,
* Kevin Hilman khil...@deeprootsystems.com [121119 15:24]:
Roger Quadros rog...@ti.com writes:
Kevin,
On 11/16/2012 10:08 PM, Kevin Hilman wrote:
Roger Quadros rog...@ti.com writes:
Hi,
This patchset addresses the
On Wed, Nov 21, 2012 at 15:01:22, Marc Kleine-Budde wrote:
From: AnilKumar Ch anilku...@ti.com
Add D_CAN raminit support to C_CAN driver to enable D_CAN RAM,
which holds all the message objects during transmission or
receiving of data. This initialization/de-initialization should
be done in
On 11/21/2012 11:07 AM, AnilKumar, Chimata wrote:
On Wed, Nov 21, 2012 at 15:01:22, Marc Kleine-Budde wrote:
From: AnilKumar Ch anilku...@ti.com
Add D_CAN raminit support to C_CAN driver to enable D_CAN RAM,
which holds all the message objects during transmission or
receiving of data. This
On 20.11.2012 16:59, Peter Korsgaard wrote:
Daniel == Daniel Mack zon...@gmail.com writes:
Hi,
In omap2 driver NAND_ECC_HW ecc mode supports 3 ecc layout
OMAP_ECC_HAMMING_CODE_HW_ROMCODE
OMAP_ECC_BCH4_CODE_HW
OMAP_ECC_BCH8_CODE_HW
So selection of ecc layout data should
2012/11/20 Bill Pemberton wf...@virginia.edu:
CONFIG_HOTPLUG is going away as an option so __devinit is no longer
needed.
Signed-off-by: Bill Pemberton wf...@virginia.edu
Cc: Russell King li...@arm.linux.org.uk
Cc: Will Deacon will.dea...@arm.com
Cc: Jason Cooper ja...@lakedaemon.net
Cc:
2012/11/20 Bill Pemberton wf...@virginia.edu:
CONFIG_HOTPLUG is going away as an option so __devinit is no longer
needed.
Signed-off-by: Bill Pemberton wf...@virginia.edu
Cc: Jean Delvare kh...@linux-fr.org
Cc: Wolfram Sang w.s...@pengutronix.de
Cc: Ben Dooks ben-li...@fluff.org
Cc:
Hi,
On Wed, Nov 21, 2012 at 12:05:12PM +0200, Roger Quadros wrote:
Hi Tony,
On 11/21/2012 01:13 AM, Tony Lindgren wrote:
Hi Roger,
* Kevin Hilman khil...@deeprootsystems.com [121119 15:24]:
Roger Quadros rog...@ti.com writes:
Kevin,
On 11/16/2012 10:08 PM, Kevin Hilman wrote:
On Thu, Nov 15, 2012 at 04:33:59PM +0200, Roger Quadros wrote:
Just a pointer to the platform data should suffice.
Signed-off-by: Roger Quadros rog...@ti.com
this looks fine to me:
Acked-by: Felipe Balbi ba...@ti.com
---
drivers/mfd/omap-usb-tll.c |9 -
1 files changed, 4
Rename I2C and GPIO nodes according to AM33XX TRM. According to
AM33XX TRM device instances are starting from 0 like i2c0, i2c1
and i2c3.
Signed-off-by: Pantelis Antoniou pa...@antoniou-consulting.com
[pa...@antoniou-consulting.com: initial patch by pantelis's]
Signed-off-by: AnilKumar Ch
Bill Pemberton wrote:
CONFIG_HOTPLUG is going away as an option so __devexit_p is no longer
needed.
Signed-off-by: Bill Pemberton wf...@virginia.edu
Cc: Russell King li...@arm.linux.org.uk
Cc: Tony Lindgren t...@atomide.com
Cc: Eric Miao eric.y.m...@gmail.com
Cc: Haojian Zhuang
Bill Pemberton wrote:
CONFIG_HOTPLUG is going away as an option so __devinit is no longer
needed.
Signed-off-by: Bill Pemberton wf...@virginia.edu
Cc: Russell King li...@arm.linux.org.uk
Cc: Will Deacon will.dea...@arm.com
Cc: Jason Cooper ja...@lakedaemon.net
Cc: Andrew Lunn
Bill Pemberton wrote:
CONFIG_HOTPLUG is going away as an option so __devexit is no
longer needed.
Signed-off-by: Bill Pemberton wf...@virginia.edu
Cc: Russell King li...@arm.linux.org.uk
Cc: Eric Miao eric.y.m...@gmail.com
Cc: Haojian Zhuang haojian.zhu...@gmail.com
Cc: Tony Lindgren
On Thu, Nov 15, 2012 at 04:34:00PM +0200, Roger Quadros wrote:
Every channel has a functional clock that is similarly named.
It makes sense to use a for loop to manage these clocks as OMAPs
can come with upto 3 channels.
s/upto/up to
BTW, this patch is doing a lot more than cleaning up clock
On Thu, Nov 15, 2012 at 04:34:01PM +0200, Roger Quadros wrote:
This is a handy macro to check if the port requires the
USB TLL module or not. Use it to Enable the TLL module and manage
the clocks.
Signed-off-by: Roger Quadros rog...@ti.com
---
drivers/mfd/omap-usb-tll.c | 20
On Mon, 19 Nov 2012, Bill Pemberton wrote:
drivers/mmc/host/sh_mobile_sdhi.c | 2 +-
drivers/mmc/host/tmio_mmc.c| 2 +-
Acked-by: Guennadi Liakhovetski g.liakhovet...@gmx.de
Thanks
Guennadi
---
Guennadi Liakhovetski, Ph.D.
Freelance Open-Source Software Developer
On Thu, Nov 15, 2012 at 04:34:02PM +0200, Roger Quadros wrote:
The port clocks are not required to access the port registers,
they are only needed when the PORT is used. So we move the port clock
handling code to omap_tll_enable/disable().
Also get of unnecessary spinlock code in probe
On Thu, Nov 15, 2012 at 04:34:03PM +0200, Roger Quadros wrote:
The TLL module on OMAP5 has 3 channels.
HSIC mode requires the TLL channel to be in Transparent UTMI mode.
Signed-off-by: Roger Quadros rog...@ti.com
---
drivers/mfd/omap-usb-tll.c | 14 ++
1 files changed, 14
Felipe,
Thanks for reviewing.
On 11/21/2012 01:55 PM, Felipe Balbi wrote:
On Thu, Nov 15, 2012 at 04:34:00PM +0200, Roger Quadros wrote:
Every channel has a functional clock that is similarly named.
It makes sense to use a for loop to manage these clocks as OMAPs
can come with upto 3
On 11/21/2012 01:57 PM, Felipe Balbi wrote:
On Thu, Nov 15, 2012 at 04:34:01PM +0200, Roger Quadros wrote:
This is a handy macro to check if the port requires the
USB TLL module or not. Use it to Enable the TLL module and manage
the clocks.
Signed-off-by: Roger Quadros rog...@ti.com
---
On 11/21/2012 02:06 PM, Felipe Balbi wrote:
On Thu, Nov 15, 2012 at 04:34:02PM +0200, Roger Quadros wrote:
The port clocks are not required to access the port registers,
they are only needed when the PORT is used. So we move the port clock
handling code to omap_tll_enable/disable().
Also get
On 11/21/2012 02:12 PM, Felipe Balbi wrote:
On Thu, Nov 15, 2012 at 04:34:03PM +0200, Roger Quadros wrote:
The TLL module on OMAP5 has 3 channels.
HSIC mode requires the TLL channel to be in Transparent UTMI mode.
Signed-off-by: Roger Quadros rog...@ti.com
---
drivers/mfd/omap-usb-tll.c |
A == AnilKumar Ch anilku...@ti.com writes:
A Rename I2C and GPIO nodes according to AM33XX TRM. According to
A AM33XX TRM device instances are starting from 0 like i2c0, i2c1
A and i2c3.
A Signed-off-by: Pantelis Antoniou pa...@antoniou-consulting.com
A [pa...@antoniou-consulting.com:
In AM33xx PWM sub modules like ECAP, EHRPWM EQEP are integrated to
PWM subsystem. All these submodules shares the resources (clock) has
a clock gating register in PWM Subsystem. This patch series creates a
parent PWM Subsystem driver to handle access synchronization of shared
resources clock
In some platforms (like am33xx), PWM sub modules (ECAP, EHRPWM, EQEP)
are integrated to PWM subsystem. These PWM submodules has resources
shared and only one register bit-field is provided to control
module/clock enable/disable, makes it difficult to handle common
resources from independent PWMSS
EHRPWM module requires explicit clock gating from control module.
Hence add clock node in clock tree for EHRPWM modules.
Signed-off-by: Philip, Avinash avinashphi...@ti.com
---
:100644 100644 1a45d6b... 08b21d2... M arch/arm/mach-omap2/clock33xx_data.c
:100644 100644 a89e825... c0e34e6... M
As part of PWM subsystem integration, PWM subsystem are sharing
resources like clock across submodules (ECAP, EQEP EHRPWM).
To handle resource sharing IP integration
1. Rework on parent child relation between PWMSS and
ECAP, EQEP EHRPWM child devices to support runtime PM.
2. Add support for
Enable pinctrl for pwm-tiecap
Signed-off-by: Philip, Avinash avinashphi...@ti.com
---
:100644 100644 e0bcc85... 646f8b4... M drivers/pwm/pwm-tiecap.c
drivers/pwm/pwm-tiecap.c |6 ++
1 files changed, 6 insertions(+), 0 deletions(-)
diff --git a/drivers/pwm/pwm-tiecap.c
Enable pinctrl for pwm-tiehrpwm
Signed-off-by: Philip, Avinash avinashphi...@ti.com
---
:100644 100644 34f9378... 23fd3c3... M drivers/pwm/pwm-tiehrpwm.c
drivers/pwm/pwm-tiehrpwm.c |6 ++
1 files changed, 6 insertions(+), 0 deletions(-)
diff --git a/drivers/pwm/pwm-tiehrpwm.c
Some platforms (like AM33XX) requires clock gating from control module
explicitly for TBCLK. Enabling of this clock required for the
functioning of the time base sub module in EHRPWM module. So adding
optional TBCLK handling if DT node populated with tbclkgating. This
helps the driver can coexist
This patch
1. Add support for device-tree binding for ECAP APWM driver.
2. Set size of pwm-cells set to 3 to support PWM channel number, PWM
period polarity configuration from device tree.
3. Add enable/disable clock gating in PWM subsystem common config space.
4. When here set .owner member
This patch
1. Add support for device-tree binding for EHRWPM driver.
2. Set size of pwm-cells set to 3 to support PWM channel number, PWM
period polarity configuration from device tree.
3. Add enable/disable clock gating in PWM subsystem common config space.
4. When here set .owner member in
Add PWMSS device tree nodes in relation with ECAP EHRPWM DT nodes to
AM33XX SoC family. Also populates device tree nodes for ECAP EHRPWM by
adding necessary properties like pwm-cells, base reg set disabled as
status.
Signed-off-by: Philip, Avinash avinashphi...@ti.com
---
Changes since v2:
PWM output from ecap0 uses as backlight source. Also adds low threshold
value to have a uniform divisions in brightness-levels scales.
Signed-off-by: Philip, Avinash avinashphi...@ti.com
---
Changes since v3:
- Add epwmss parent status=okay field.
:100644 100644 9f65f17... 4178ba4c.. M
PWM output from ecap2 uses as backlight source. Also adds low threshold
value to have a uniform divisions in brightness-levels scales with
inverse polarity.
Signed-off-by: Philip, Avinash avinashphi...@ti.com
---
:100644 100644 f5a6162... 6f3de83... M arch/arm/boot/dts/am335x-evmsk.dts
Since udev-182, udev no longer creates device nodes under /dev
and this has to be managed by the kernel devtmpfs filesystem.
This means that a kernel built with the current OMAP2+ config
will not boot on a system with a recent udev.
Also, it is good to have /dev automatically mounted since some
Hi,
On Thu, Nov 15, 2012 at 04:34:04PM +0200, Roger Quadros wrote:
All ports have similarly named port clocks so we can
bunch them into a port data structure and use for loop
to enable/disable the clocks.
Signed-off-by: Roger Quadros rog...@ti.com
---
drivers/mfd/omap-usb-host.c | 208
On Thu, Nov 15, 2012 at 04:34:05PM +0200, Roger Quadros wrote:
We can just hold the pointer to the platform data instead
of creating a copy of it.
Also get rid of the unnecessary missing platform data checks
in runtime_suspend/resume. We are already checking for missing
platform data in
Hi Anilkumar,
On Tue, Nov 20, 2012 at 03:18:44PM +0530, AnilKumar Ch wrote:
From: Colin Foe-Parker colin.foepar...@logicpd.com
Set tps65217 PMIC status to OFF if power enable toggle is supported.
By setting this bit to 1 to enter PMIC to OFF state when PWR_EN pin
is pulled low. Also adds a
On Thu, Nov 15, 2012 at 04:34:06PM +0200, Roger Quadros wrote:
prevents getting clocks that don't exist on the platform.
Signed-off-by: Roger Quadros rog...@ti.com
---
drivers/mfd/omap-usb-host.c | 47
---
1 files changed, 35 insertions(+), 12
On Thu, Nov 15, 2012 at 04:34:07PM +0200, Roger Quadros wrote:
For some platforms e.g. OMAP5, we cannot rely on USBHOST revision
to determine the number of ports available. In such cases we have
you need to make it clear *why* we can't. Imagine someone reading this 5
years from now... he'll be
On Thu, Nov 15, 2012 at 04:34:08PM +0200, Roger Quadros wrote:
OMAPs till date can have upto 3 ports. We need to initialize
s/upto/up to/
the port mode in HOSTCONFIG register for all of them.
why *all* of them ? Isn't it enough to initialize only the ones we're
going to use ? If not, why ?
Hi,
On Thu, Nov 15, 2012 at 04:34:09PM +0200, Roger Quadros wrote:
Enable the optional HSIC clocks (60MHz and 480MHz) for the ports
that are configured in HSIC mode.
Signed-off-by: Roger Quadros rog...@ti.com
---
drivers/mfd/omap-usb-host.c | 56
Hi,
On Thu, Nov 15, 2012 at 04:34:11PM +0200, Roger Quadros wrote:
We don't really need a spinlock here, so get rid of it.
can you prove it ? what if an IRQ happens right after disabling clocks
on -runtime_suspend() but before it returns ? Will this not cause a
problem for you ?
(note that I
On Thu, Nov 15, 2012 at 04:34:12PM +0200, Roger Quadros wrote:
Boards like Panda require an auxiliary clock to clock the PHY
that is connected to one of the USB ports. This patch enables
board support code to provide the name and the rate of such
a clock for each of the USB ports.
On Thu, Nov 15, 2012 at 04:34:13PM +0200, Roger Quadros wrote:
Instead of enabling the USB PHY clock in the board file we
provide the PHY clock details to the driver via board platform
data so that driver code can manage the clock.
Signed-off-by: Roger Quadros rog...@ti.com
this patch is
On Thu, Nov 15, 2012 at 04:34:14PM +0200, Roger Quadros wrote:
From: Andy Green andy.gr...@linaro.org
This patch changes the management of the two GPIO for
hub reset (actually controls enable of ULPI PHY and hub reset) and
hub power (controls power to hub + eth).
looks like this should be
Hi,
On Wed, Nov 21, 2012 at 02:36:48PM +0200, Roger Quadros wrote:
break;
default:
- dev_err(dev, TLL version failed\n);
- ret = -ENODEV;
- goto err_ioremap;
+ tll-nch = DEFAULT_TLL_CHANNEL_COUNT;
+ dev_info(dev,
+
Hi,
On Wed, Nov 21, 2012 at 02:45:46PM +0200, Roger Quadros wrote:
spin_unlock_irqrestore(tll-lock, flags);
- return 0;
+ return i;
}
+EXPORT_SYMBOL_GPL(omap_tll_enable);
-static int usbtll_runtime_suspend(struct device *dev)
+int omap_tll_disable(void)
why ?? Why
Hi,
On Wed, Nov 21, 2012 at 02:49:41PM +0200, Roger Quadros wrote:
On 11/21/2012 02:12 PM, Felipe Balbi wrote:
On Thu, Nov 15, 2012 at 04:34:03PM +0200, Roger Quadros wrote:
The TLL module on OMAP5 has 3 channels.
HSIC mode requires the TLL channel to be in Transparent UTMI mode.
HI Tomi,
we need one rank of cma to allocate the memory for driver in kernel
space .And the default CMA is for allocating memory frome usespace.So
if we allocate the memory from the
default CMA zone ,there maybe introduce fragmention to the default CMA
zone.The kernel space memory donot touch the
Hi Aaro,
On Sun, Nov 18, 2012 at 06:36:20PM +0200, Aaro Koskinen wrote:
Retu is a multi-function device found on Nokia Internet Tablets
implementing at least watchdog, RTC, headset detection and power button
functionality.
This patch implements minimum functionality providing register
On 11/21/2012 03:43 PM, Felipe Balbi wrote:
On Thu, Nov 15, 2012 at 04:34:06PM +0200, Roger Quadros wrote:
prevents getting clocks that don't exist on the platform.
Signed-off-by: Roger Quadros rog...@ti.com
---
drivers/mfd/omap-usb-host.c | 47
On 11/21/2012 03:45 PM, Felipe Balbi wrote:
On Thu, Nov 15, 2012 at 04:34:07PM +0200, Roger Quadros wrote:
For some platforms e.g. OMAP5, we cannot rely on USBHOST revision
to determine the number of ports available. In such cases we have
you need to make it clear *why* we can't. Imagine
On Wed, 21 Nov 2012, Felipe Balbi wrote:
On Thu, Nov 15, 2012 at 04:34:14PM +0200, Roger Quadros wrote:
From: Andy Green andy.gr...@linaro.org
This patch changes the management of the two GPIO for
hub reset (actually controls enable of ULPI PHY and hub reset) and
hub power (controls
Hi Peter,
On Tue, Nov 13, 2012 at 09:28:41AM +0100, Peter Ujfalusi wrote:
Hello,
This series converts the twl-core to use regmap for IO towards the chip.
With the conversion to regmap IO we no longer need to allocate bigger buffer
for
writes.
I have appended patches to this series to
On 11/21/2012 04:52 PM, Alan Stern wrote:
On Wed, 21 Nov 2012, Felipe Balbi wrote:
On Thu, Nov 15, 2012 at 04:34:14PM +0200, Roger Quadros wrote:
From: Andy Green andy.gr...@linaro.org
This patch changes the management of the two GPIO for
hub reset (actually controls enable of ULPI PHY and
On Wed, 21 Nov 2012, Roger Quadros wrote:
On 11/21/2012 04:52 PM, Alan Stern wrote:
On Wed, 21 Nov 2012, Felipe Balbi wrote:
On Thu, Nov 15, 2012 at 04:34:14PM +0200, Roger Quadros wrote:
From: Andy Green andy.gr...@linaro.org
This patch changes the management of the two GPIO for
On 11/21/2012 04:03 PM, Felipe Balbi wrote:
Hi,
On Wed, Nov 21, 2012 at 02:36:48PM +0200, Roger Quadros wrote:
break;
default:
- dev_err(dev, TLL version failed\n);
- ret = -ENODEV;
- goto err_ioremap;
+ tll-nch =
On 11/21/2012 03:52 PM, Felipe Balbi wrote:
On Thu, Nov 15, 2012 at 04:34:08PM +0200, Roger Quadros wrote:
OMAPs till date can have upto 3 ports. We need to initialize
s/upto/up to/
the port mode in HOSTCONFIG register for all of them.
why *all* of them ? Isn't it enough to initialize
On 11/21/2012 03:54 PM, Felipe Balbi wrote:
Hi,
On Thu, Nov 15, 2012 at 04:34:09PM +0200, Roger Quadros wrote:
Enable the optional HSIC clocks (60MHz and 480MHz) for the ports
that are configured in HSIC mode.
Signed-off-by: Roger Quadros rog...@ti.com
---
drivers/mfd/omap-usb-host.c |
On 11/21/2012 03:57 PM, Felipe Balbi wrote:
Hi,
On Thu, Nov 15, 2012 at 04:34:11PM +0200, Roger Quadros wrote:
We don't really need a spinlock here, so get rid of it.
can you prove it ? what if an IRQ happens right after disabling clocks
on -runtime_suspend() but before it returns ? Will
On 11/21/2012 03:58 PM, Felipe Balbi wrote:
On Thu, Nov 15, 2012 at 04:34:12PM +0200, Roger Quadros wrote:
Boards like Panda require an auxiliary clock to clock the PHY
that is connected to one of the USB ports. This patch enables
board support code to provide the name and the rate of such
a
On 11/21/2012 05:32 PM, Alan Stern wrote:
On Wed, 21 Nov 2012, Roger Quadros wrote:
On 11/21/2012 04:52 PM, Alan Stern wrote:
On Wed, 21 Nov 2012, Felipe Balbi wrote:
On Thu, Nov 15, 2012 at 04:34:14PM +0200, Roger Quadros wrote:
From: Andy Green andy.gr...@linaro.org
This patch changes
Hi Kalle,
On Tue, Oct 16, 2012 at 05:59:35PM +0300, Kalle Jokiniemi wrote:
The irqs are enabled one-by-one in pm core resume_noirq phase.
This leads to situation where the twl4030 primary interrupt
handler (PIH) is enabled before the chained secondary handlers
(SIH). As the PIH cannot clear
Hi all,
Here are the remaining patches to be able to build omap2+
with multiplatform enabled. Booting requires disabling
ARM_ERRATA_751472 as discussed earlier. And then the
OMAP4_ERRATA_I688 can't be used currently.
These patches are based on a merge of the following branches
that are needed to
Recent changes to the omap_wdt.c removed the dependencies to
the core omap code, but forgot to remove mach/hardware.h.
We cannot include any plat headers with multiplatform
support enabled.
cc: Wim Van Sebroeck w...@iguana.be
cc: linux-watch...@vger.kernel.org
Signed-off-by: Tony Lindgren
We cannot include any plat or mach headers for the multiplatform
support.
Fix the issue by defining local mcbsp_omap1().
cc: Peter Ujfalusi peter.ujfal...@ti.com
cc: Jarkko Nikula jarkko.nik...@bitmer.com
cc: Liam Girdwood l...@ti.com
cc: Mark Brown broo...@opensource.wolfsonmicro.com
cc:
We need to move this file to allow ARM multiplatform configurations
to build for omap2+. This can now be done as this file now only
contains platform_data.
cc: Russell King li...@arm.linux.org.uk
cc: Alan Cox a...@linux.intel.com
cc: Greg Kroah-Hartman gre...@linuxfoundation.org
cc: Govindraj.R
Not intended for merging yet as few more drivers need
work. You may need to update your config to make sure
you have:
CONFIG_ARCH_MULTIPLATFORM=y
CONFIG_ARCH_MULTI_V7=y
CONFIG_ARCH_OMAP2PLUS=y
And may need CONFIG_ARCH_MULTI_V6=y too.
The omap2plus_defconfig has been updated in this patch.
---
On Wed, Nov 21, 2012 at 09:42:30AM -0800, Tony Lindgren wrote:
We need to move this file to allow ARM multiplatform configurations
to build for omap2+. This can now be done as this file now only
contains platform_data.
cc: Russell King li...@arm.linux.org.uk
cc: Alan Cox
* Felipe Balbi ba...@ti.com [121119 04:25]:
On Mon, Nov 19, 2012 at 01:09:42PM +0200, Tomi Valkeinen wrote:
On 2012-11-19 11:27, Felipe Balbi wrote:
fair enough... it looks like this is going nowhere, so best we come back
to this later. No reason to block your patch.
Well, the
* Jon Hunter jon-hun...@ti.com [121116 09:19]:
The following changes since commit 9dc57643738f9fbe45c10cc062903d5dfda5bdd9:
Merge branch 'fixes-timer' of github.com:jonhunter/linux into
omap-for-v3.8/timer (2012-11-13 13:52:38 -0800)
are available in the git repository at:
* Igor Grinberg grinb...@compulab.co.il [121119 23:19]:
CONFIG_OMAP_32K_TIMER is kind of standing on the single zImage way.
Make OMAP2+ timer code independant from the CONFIG_OMAP_32K_TIMER
setting.
To remove the dependancy, several conversions/additions had to be done:
1) Timer
* Jean Pihet jean.pi...@newoldbits.com [121114 08:43]:
On Wed, Nov 14, 2012 at 4:28 PM, Igor Mazanov i.maza...@gmail.com wrote:
Beaglebone boot process is broken with the current git kernel. I use
omap2plus_defconfig for tests.
It looks like the boot process stops due to the last
* Tony Lindgren t...@atomide.com [121121 09:44]:
We need to move this file to allow ARM multiplatform configurations
to build for omap2+. This can now be done as this file now only
contains platform_data.
Russell, this one depends on your commit fd9980c7 (SERIAL: omap:
remove
* Omar Ramirez Luna omar.l...@linaro.org [121119 17:08]:
Use runtime PM functionality interfaced with hwmod enable/idle
functions, to replace direct clock operations and sysconfig
handling.
Due to reset sequence, pm_runtime_[get|put]_sync must be used, to
avoid possible operations with the
* Omar Ramirez Luna omar.l...@linaro.org [121119 17:08]:
This prevents hwmod _enable_clocks...omap2_dflt_clk_enable path
from enabling modulemode inside CLKCTRL using its clk-enable_reg
field. Instead is left to _omap4_enable_module though soc_ops, as
the one in charge of this setting.
* Dmitry Torokhov dmitry.torok...@gmail.com [121120 00:23]:
On Mon, Nov 19, 2012 at 06:03:56PM +0200, Igor Grinberg wrote:
Commit 97ee9f01 (ARM: OMAP: fix the ads7846 init code) have enabled the
pendown GPIO debounce time setting by the below sequence:
gpio_request_one()
* Anton Vorontsov cbouatmai...@gmail.com [121119 10:25]:
On Mon, Nov 19, 2012 at 01:18:29PM +0100, Pali Rohár wrote:
[...]
Ok. Here is missing patch which register this driver in Nokia N900 board
code. Without it driver is not loaded.
Cc'ing OMAP folks.
Looks OK to me queue with the
Hi,
On Wed, Nov 21, 2012 at 05:39:57PM +0200, Roger Quadros wrote:
On 11/21/2012 04:03 PM, Felipe Balbi wrote:
Hi,
On Wed, Nov 21, 2012 at 02:36:48PM +0200, Roger Quadros wrote:
break;
default:
-dev_err(dev, TLL version failed\n);
-
Do not fail if dpll4_m4_ck is missing. The clock is not there on omap24xx,
so this should not be a hard error.
The patch retains the functionality before the commit 185bae10 (OMAPDSS:
DSS: Cleanup cpu_is_ checks).
Signed-off-by: Aaro Koskinen aaro.koski...@iki.fi
---
Register the DSS driver after SPI probe. This simplifies the
initialization. This is similar to what is being done e.g.
in panel-acx565akm.
Signed-off-by: Aaro Koskinen aaro.koski...@iki.fi
---
drivers/video/omap2/displays/panel-n8x0.c | 39 +++--
1 file changed, 9
Hi,
On Wed, Nov 21, 2012 at 04:45:27PM +0200, Roger Quadros wrote:
+ switch (omap-usbhs_rev) {
+ case OMAP_USBHS_REV1:
+ omap-nports = 3;
+ break;
+ case OMAP_USBHS_REV2:
+ omap-nports = 2;
+ break;
+ default:
+ omap-nports =
Hi,
On Wed, Nov 21, 2012 at 04:50:42PM +0200, Roger Quadros wrote:
On 11/21/2012 03:45 PM, Felipe Balbi wrote:
On Thu, Nov 15, 2012 at 04:34:07PM +0200, Roger Quadros wrote:
For some platforms e.g. OMAP5, we cannot rely on USBHOST revision
to determine the number of ports available. In
hi,
On Wed, Nov 21, 2012 at 05:47:06PM +0200, Roger Quadros wrote:
On 11/21/2012 03:52 PM, Felipe Balbi wrote:
On Thu, Nov 15, 2012 at 04:34:08PM +0200, Roger Quadros wrote:
OMAPs till date can have upto 3 ports. We need to initialize
s/upto/up to/
the port mode in HOSTCONFIG
Hi,
On Wed, Nov 21, 2012 at 05:55:19PM +0200, Roger Quadros wrote:
On 11/21/2012 03:57 PM, Felipe Balbi wrote:
Hi,
On Thu, Nov 15, 2012 at 04:34:11PM +0200, Roger Quadros wrote:
We don't really need a spinlock here, so get rid of it.
can you prove it ? what if an IRQ happens right
On Wed, Nov 21, 2012 at 9:38 PM, Tony Lindgren t...@atomide.com wrote:
* Jean Pihet jean.pi...@newoldbits.com [121114 08:43]:
On Wed, Nov 14, 2012 at 4:28 PM, Igor Mazanov i.maza...@gmail.com wrote:
Beaglebone boot process is broken with the current git kernel. I use
omap2plus_defconfig
Hi,
On Wed, Nov 21, 2012 at 06:07:57PM +0200, Roger Quadros wrote:
On 11/21/2012 05:32 PM, Alan Stern wrote:
On Wed, 21 Nov 2012, Roger Quadros wrote:
On 11/21/2012 04:52 PM, Alan Stern wrote:
On Wed, 21 Nov 2012, Felipe Balbi wrote:
On Thu, Nov 15, 2012 at 04:34:14PM +0200, Roger
On Wed, Nov 07, 2012 at 10:56:59AM +0100, Andreas Bießmann wrote:
On 16.10.2012 16:09, Felipe Balbi wrote:
This reverts commit 957ee7270d632245b43f6feb0e70d9a5e9ea6cf6
(serial: omap: fix software flow control).
As Russell has pointed out, that commit isn't fixing
Software Flow Control
On Wed, Nov 21, 2012 at 11:09:30AM -0800, Tony Lindgren wrote:
* Dmitry Torokhov dmitry.torok...@gmail.com [121120 00:23]:
On Mon, Nov 19, 2012 at 06:03:56PM +0200, Igor Grinberg wrote:
Commit 97ee9f01 (ARM: OMAP: fix the ads7846 init code) have enabled the
pendown GPIO debounce time
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