Hi Peter,
On Jan 28, 2013, at 11:14 PM, Peter Korsgaard wrote:
Pantelis == Pantelis Antoniou pa...@antoniou-consulting.com writes:
'among other things' is not a very descriptive commit message.
Pantelis Fix interrupt storm on bone A4 cause by non-by-the-book
Pantelis interrupt handling.
Hi Mugunthan,
On Jan 29, 2013, at 1:45 PM, Mugunthan V N wrote:
On 1/28/2013 6:41 PM, Pantelis Antoniou wrote:
Fix interrupt storm on bone A4 cause by non-by-the-book interrupt handling.
While at it, added a non-NAPI mode (which is easier to debug), plus
some general fixes.
Signed-off-by:
Hi Sourav,
On Wed, Jan 30, 2013 at 12:10:18, Poddar, Sourav wrote:
Hi Luciano,
On Wednesday 30 January 2013 11:55 AM, Luciano Coelho wrote:
Hi Sourav,
On Mon, 2013-01-28 at 16:47 +0530, Sourav Poddar wrote:
Booting 3.8-rc4 om omap 4430sdp results in the following error
omap_i2c
On Wednesday 30 January 2013 02:13 PM, Kumar, Anil wrote:
Hi Sourav,
On Wed, Jan 30, 2013 at 12:10:18, Poddar, Sourav wrote:
Hi Luciano,
On Wednesday 30 January 2013 11:55 AM, Luciano Coelho wrote:
Hi Sourav,
On Mon, 2013-01-28 at 16:47 +0530, Sourav Poddar wrote:
Booting 3.8-rc4 om omap
On 1/30/2013 2:06 PM, Pantelis Antoniou wrote:
Hi Mugunthan,
On Jan 29, 2013, at 1:45 PM, Mugunthan V N wrote:
On 1/28/2013 6:41 PM, Pantelis Antoniou wrote:
Fix interrupt storm on bone A4 cause by non-by-the-book interrupt handling.
While at it, added a non-NAPI mode (which is easier to
On Wed, 2013-01-30 at 14:18 +0530, Santosh Shilimkar wrote:
On Wednesday 30 January 2013 02:13 PM, Kumar, Anil wrote:
Hi Sourav,
On Wed, Jan 30, 2013 at 12:10:18, Poddar, Sourav wrote:
Hi Luciano,
On Wednesday 30 January 2013 11:55 AM, Luciano Coelho wrote:
Hi Sourav,
On Mon,
If the CD/WP-GPIOs are not provided by the SoC's GPIO controller,
we need to handle the case where omap_hsmmc is probed earlier than
the GPIO controller chosen in the device tree.
Fix this by checking the return value of of_get_named_gpio against
-EPROBE_DEFER and passing it through to the probe
On Tuesday 29 January 2013 10:54 PM, Tony Lindgren wrote:
* Santosh Shilimkar santosh.shilim...@ti.com [130129 05:59]:
OK so we do managed to clean up the address space, IRQ lines
and DMA request lines data from hwmod completely.
-OMAP5 hwmod data file, 2076 lines we could remove which
On Wednesday 30 January 2013, Matt Porter wrote:
+Optional properties:
+- dmas: List of DMA controller phandle and DMA request ordered
+ pairs. One tx and one rx pair is required for each chip
+ select.
The binding looks ok, but the wording is slightly incorrect here:
strictly
On Wednesday 30 January 2013, Matt Porter wrote:
Adds a dma_request_slave_channel_compat() wrapper which accepts
both the arguments from dma_request_channel() and
dma_request_slave_channel(). Based on whether the driver is
instantiated via DT, the appropriate channel request call will be
On Wednesday 30 January 2013, Matt Porter wrote:
+ dma_cap_set(DMA_SLAVE, edma_filter_info.dma_cap);
+ of_dma_controller_register(dev-of_node,
+ of_dma_simple_xlate,
+
Hi,
On Jan 30, 2013, at 11:03 AM, Mugunthan V N wrote:
On 1/30/2013 2:06 PM, Pantelis Antoniou wrote:
Hi Mugunthan,
On Jan 29, 2013, at 1:45 PM, Mugunthan V N wrote:
On 1/28/2013 6:41 PM, Pantelis Antoniou wrote:
Fix interrupt storm on bone A4 cause by non-by-the-book interrupt
On Wed, Jan 30, 2013 at 02:00:27AM -0500, Matt Porter wrote:
Convert dmaengine channel requests to use
dma_request_slave_channel_compat(). This supports the DT case of
platforms requiring channel selection from either the OMAP DMA or
the EDMA engine. AM33xx only boots from DT and is the only
Op 24 jan. 2013, om 04:45 heeft Patil, Rachna rac...@ti.com het volgende
geschreven:
From: Patil, Rachna rac...@ti.com
Make changes to add DT support in the MFD core driver.
Signed-off-by: Patil, Rachna rac...@ti.com
---
Changes in v4:
Non-standard properties prefixed with
On 1/30/2013 3:06 PM, Pantelis Antoniou wrote:
Hi,
On Jan 30, 2013, at 11:03 AM, Mugunthan V N wrote:
On 1/30/2013 2:06 PM, Pantelis Antoniou wrote:
Hi Mugunthan,
On Jan 29, 2013, at 1:45 PM, Mugunthan V N wrote:
On 1/28/2013 6:41 PM, Pantelis Antoniou wrote:
Fix interrupt storm on bone
Hi Mugunthan,
On Jan 30, 2013, at 12:55 PM, Mugunthan V N wrote:
On 1/30/2013 3:06 PM, Pantelis Antoniou wrote:
Hi,
On Jan 30, 2013, at 11:03 AM, Mugunthan V N wrote:
On 1/30/2013 2:06 PM, Pantelis Antoniou wrote:
Hi Mugunthan,
On Jan 29, 2013, at 1:45 PM, Mugunthan V N wrote:
On
the fields must be null-terminated:
the caller may use it as null-terminted string, next.
Signed-off-by: Chen Gang gang.c...@asianux.com
---
arch/arm/mach-omap2/twl-common.c |3 ++-
1 file changed, 2 insertions(+), 1 deletion(-)
diff --git a/arch/arm/mach-omap2/twl-common.c
On Wed, Jan 30, 2013 at 16:38:50, Pantelis Antoniou wrote:
[...]
TBH I haven't found a simple way to print out the silicon revision number.
Anyone on the list know a quick and dirty method?
You can dump the DEVICE_ID register @ 0x44e10600.
Bits 31:28 should be 0 for PG1.0 and 1 for PG2.0.
Hi Vaibhav,
On Jan 30, 2013, at 2:38 PM, Bedia, Vaibhav wrote:
On Wed, Jan 30, 2013 at 16:38:50, Pantelis Antoniou wrote:
[...]
TBH I haven't found a simple way to print out the silicon revision number.
Anyone on the list know a quick and dirty method?
You can dump the DEVICE_ID
On Wed, Jan 30, 2013 at 1:38 AM, Nishanth Menon n...@ti.com wrote:
On 01:08-20130130, Ruslan Bilovol wrote:
Hi,
On Tue, Jan 29, 2013 at 6:02 PM, Nishanth Menon n...@ti.com wrote:
On 17:54-20130129, Ruslan Bilovol wrote:
Hi,
The following patches update cpuinfo to print CPU
On Wed, Jan 30, 2013 at 18:14:30, Pantelis Antoniou wrote:
Hi Vaibhav,
On Jan 30, 2013, at 2:38 PM, Bedia, Vaibhav wrote:
On Wed, Jan 30, 2013 at 16:38:50, Pantelis Antoniou wrote:
[...]
TBH I haven't found a simple way to print out the silicon revision number.
Anyone on the list
Hi Vaibhav,
On Jan 30, 2013, at 3:29 PM, Bedia, Vaibhav wrote:
On Wed, Jan 30, 2013 at 18:14:30, Pantelis Antoniou wrote:
Hi Vaibhav,
On Jan 30, 2013, at 2:38 PM, Bedia, Vaibhav wrote:
On Wed, Jan 30, 2013 at 16:38:50, Pantelis Antoniou wrote:
[...]
TBH I haven't found a simple way
Patch series adds omap5 evm mcspi nodes and pinctrl
data in omap5.dtsi and omap5-evm.dts files.
Felipe Balbi (1):
arm: dts: omap5: add SPI devices to OMAP5 DeviceTree file
Sourav Poddar (1):
arm: dts: omap5-evm: Add mcspi data
arch/arm/boot/dts/omap5-evm.dts | 46
From: Felipe Balbi ba...@ti.com
Add all 4 mcspi instances to omap5.dtsi file.
Signed-off-by: Felipe Balbi ba...@ti.com
Signed-off-by: Sourav Poddar sourav.pod...@ti.com
---
arch/arm/boot/dts/omap5.dtsi | 40
1 files changed, 40 insertions(+), 0
Hi Antoniou,
On Wed, Jan 30, 2013 at 19:07:19, Pantelis Antoniou wrote:
Hi Vaibhav,
On Jan 30, 2013, at 3:29 PM, Bedia, Vaibhav wrote:
On Wed, Jan 30, 2013 at 18:14:30, Pantelis Antoniou wrote:
Hi Vaibhav,
On Jan 30, 2013, at 2:38 PM, Bedia, Vaibhav wrote:
On Wed, Jan 30, 2013
Add mcspi node and pinmux data for omap5 mcspi controller.
Tested on omap5430 evm with 3.8-rc4 custom kernel.
Signed-off-by: Sourav Poddar sourav.pod...@ti.com
---
Develops this on the patch[1] submitted in mainline
[1]: http://www.spinics.net/lists/kernel/msg1473163.html
Hi Vaibhav,
On Jan 30, 2013, at 3:47 PM, Bedia, Vaibhav wrote:
Hi Antoniou,
On Wed, Jan 30, 2013 at 19:07:19, Pantelis Antoniou wrote:
Hi Vaibhav,
On Jan 30, 2013, at 3:29 PM, Bedia, Vaibhav wrote:
On Wed, Jan 30, 2013 at 18:14:30, Pantelis Antoniou wrote:
Hi Vaibhav,
On Jan 30,
On 1/30/2013 7:21 PM, Pantelis Antoniou wrote:
Hi Vaibhav,
On Jan 30, 2013, at 3:47 PM, Bedia, Vaibhav wrote:
Hi Antoniou,
On Wed, Jan 30, 2013 at 19:07:19, Pantelis Antoniou wrote:
Hi Vaibhav,
On Jan 30, 2013, at 3:29 PM, Bedia, Vaibhav wrote:
On Wed, Jan 30, 2013 at 18:14:30, Pantelis
Hi Mugunthan,
On Jan 30, 2013, at 3:53 PM, Mugunthan V N wrote:
On 1/30/2013 7:21 PM, Pantelis Antoniou wrote:
Hi Vaibhav,
On Jan 30, 2013, at 3:47 PM, Bedia, Vaibhav wrote:
Hi Antoniou,
On Wed, Jan 30, 2013 at 19:07:19, Pantelis Antoniou wrote:
Hi Vaibhav,
On Jan 30, 2013, at
On 1/30/2013 7:25 PM, Pantelis Antoniou wrote:
Hi Mugunthan,
On Jan 30, 2013, at 3:53 PM, Mugunthan V N wrote:
On 1/30/2013 7:21 PM, Pantelis Antoniou wrote:
Hi Vaibhav,
On Jan 30, 2013, at 3:47 PM, Bedia, Vaibhav wrote:
Hi Antoniou,
On Wed, Jan 30, 2013 at 19:07:19, Pantelis Antoniou
On Thu, Dec 20, 2012 at 13:05:27, Paul Walmsley wrote:
On Thu, 20 Dec 2012, Hebbar, Gururaja wrote:
On Wed, Dec 19, 2012 at 07:43:50, Paul Walmsley wrote:
We've got a few hwmods on OMAP44xx that don't have clkctrl_offs registers
listed in the hwmod data, and which are not marked
The cpufreq-cpu0 driver changes to instantiate use platform_driver
mechanism. The patch is an am33xx platform level adaptation for it.
Signed-off-by: Shawn Guo shawn@linaro.org
---
arch/arm/mach-omap2/board-generic.c |1 +
arch/arm/mach-omap2/cclock33xx_data.c |2 +-
am33xx_cm_wait_module_ready() checks if register offset is NULL.
int am33xx_cm_wait_module_ready(u16 inst, s16 cdoffs, u16 clkctrl_offs)
{
int i = 0;
if (!clkctrl_offs)
return 0;
In case of AM33xx, CLKCTRL register offset for different clock domains
are not
The following patches update cpuinfo to print SoC
model name for ARM.
The first patch exactly makes needed changes for ARM
architecture and adds a common approach to show SoC name.
Second patch uses this approach for TI OMAP4 SoCs (as live
example).
Why we need it?
First - the /proc/cpuinfo
Currently, reading /proc/cpuinfo provides userspace with CPU ID of
the CPU carrying out the read from the file.
Userspace using this information may decide what module
to load or how to configure some specific (and processor-depended)
settings or so.
However, since really different SoCs can share
Set up the SoC model name during OMAP ID initialisation
so it will be displayed in /proc/cpuinfo:
/ # cat proc/cpuinfo
[...]
CPU variant : 0x2
CPU part: 0xc09
CPU revision: 10
SoC name: OMAP4470
Hardware: OMAP4 Blaze Tablet
Revision: 20edb4
[...]
On Wed, Jan 30, 2013 at 05:01:31PM +0200, Ruslan Bilovol wrote:
Set up the SoC model name during OMAP ID initialisation
so it will be displayed in /proc/cpuinfo:
/ # cat proc/cpuinfo
[...]
CPU variant : 0x2
CPU part: 0xc09
CPU revision: 10
SoC name: OMAP4470
On Wed, 30 Jan 2013, Hebbar, Gururaja wrote:
On Thu, Dec 20, 2012 at 13:05:27, Paul Walmsley wrote:
On Thu, 20 Dec 2012, Hebbar, Gururaja wrote:
On Wed, Dec 19, 2012 at 07:43:50, Paul Walmsley wrote:
We've got a few hwmods on OMAP44xx that don't have clkctrl_offs
registers
On Wed, 30 Jan 2013, Hebbar Gururaja wrote:
am33xx_cm_wait_module_ready() checks if register offset is NULL.
int am33xx_cm_wait_module_ready(u16 inst, s16 cdoffs, u16 clkctrl_offs)
{
int i = 0;
if (!clkctrl_offs)
return 0;
In case of AM33xx, CLKCTRL register
On Tuesday 29 January 2013 03:03 AM, Chris Ball wrote:
Hi,
On Wed, Jan 16 2013, Venkatraman S wrote:
The specified email id is no longer in service.
Update the OMAP HSMMC entry from the MAINTAINERS file as I will
no longer be able to maintain this driver.
Signed-off-by: Venkatraman S
Hi Balaji,
On Wed, Jan 30 2013, Balaji T K wrote:
I am interested in maintaining omap_hsmmc,
Please add me as Maintainer and Thanks Venkat for his support
From: Balaji T K balaj...@ti.com
Subject: [PATCH] mmc: omap_hsmmc: MAINTAINERS: update
Update Maintainer email for omap_hsmmc,
as
This series consists mainly of clean-ups for clockevents and
clocksource timers on OMAP2+ devices. The most significant change
in functionality comes from the 5th patch which is changing the
selection of the clocksource timer for OMAP3 and AM335x devices
when gptimers are used for clocksource.
Currently, when configuring the clock-events and clock-source timers
for OMAP2+ devices, we check whether the timer ID is 12 before
attempting to set the parent clock for the timer.
This test was added for OMAP3 general purpose devices (no security
features enabled) that a 12th timer available
Currently on boot, when displaying the name of the gptimer used for
clockevents and clocksource timers, the timer ID is shown. However,
when booting with device-tree, the timer ID is not used to select a
gptimer but a timer property. Hence, it is possible that the timer
selected when booting with
In commit c59b537 (ARM: OMAP2+: Simplify dmtimer clock aliases), new
clock aliases for dmtimers were added to simplify the code. These clock
aliases can also be used when configuring the system timers and allow us
to remove the current definitions, simplifying the code.
Signed-off-by: Jon Hunter
There is a lot of redundancy in the definitions for the various system
timers for OMAP2+ devices. For example, the omap3_am33xx_gptimer_timer_init()
function is the same as the omap3_gp_gptimer_timer_init() function and the
function omap2_sync32k_timer_init() can be re-used for OMAP4/5 devices.
When booting with device-tree for OMAP3 and AM335x devices and a gptimer
is used as the clocksource (which is always the case for AM335x), a
gptimer located in a power domain that is not always-on is selected.
Ideally we should use a gptimer located in a power domain that is always
on (such as the
Hi Tero et al.,
On Tue, 22 Jan 2013, Paul Walmsley wrote:
As we've discussed, there are known bootloader dependencies with the OMAP4
PM retention idle code, introduced in v3.8. Boards booted with u-boot
versions even as recent as 2011 won't enter retention idle correctly; for
example:
On 01/18/2013 09:27 AM, Santosh Shilimkar wrote:
From: Rajendra Nayak rna...@ti.com
Add the clock tree related data for OMAP54xx platforms.
[snip]
+ CLK(omap_timer.1, 32k_ck, sys_32k_ck,
CK_54XX),
+ CLK(omap_timer.2, 32k_ck, sys_32k_ck,
On 01/18/2013 09:32 AM, Santosh Shilimkar wrote:
OMAP5 clockdata has different sys clock clock node name. Fix the timer code
to take care of it.
Signed-off-by: Santosh Shilimkar santosh.shilim...@ti.com
---
arch/arm/mach-omap2/timer.c |5 +++--
1 file changed, 3 insertions(+), 2
On 01/21/2013 01:22 AM, Bedia, Vaibhav wrote:
On Fri, Jan 18, 2013 at 10:55:43, Shilimkar, Santosh wrote:
On Friday 18 January 2013 12:15 AM, Jon Hunter wrote:
On 01/10/2013 10:37 PM, Bedia, Vaibhav wrote:
On Tue, Jan 08, 2013 at 20:45:10, Shilimkar, Santosh wrote:
On Monday 31 December
On 01/24/2013 04:30 PM, Jon Hunter wrote:
Hi Vaibhav,
On 12/31/2012 07:07 AM, Vaibhav Bedia wrote:
AM33XX has two timers (DTIMER0/1) in the WKUP domain.
On GP devices the source of DMTIMER0 is fixed to an
inaccurate internal 32k RC oscillator and this makes
the DMTIMER0 practically either
On 01/30/2013 11:48 AM, Jon Hunter wrote:
On 01/24/2013 04:30 PM, Jon Hunter wrote:
Hi Vaibhav,
On 12/31/2012 07:07 AM, Vaibhav Bedia wrote:
AM33XX has two timers (DTIMER0/1) in the WKUP domain.
On GP devices the source of DMTIMER0 is fixed to an
inaccurate internal 32k RC oscillator and
On 01/30/2013 01:18 AM, Bedia, Vaibhav wrote:
On Wed, Jan 30, 2013 at 01:53:11, Hunter, Jon wrote:
Commit 9725f44 (ARM: OMAP: Add DT support for timer driver) added
device-tree support for selecting a clockevent timer by property.
However, the code is currently ignoring the property passed
CPSW is capable of filtering VLAN packets in hardware. This patch series
implements VLAN support to CPSW driver.
This patch series is tested on net-next with AM335x EVM with ping test.
Changes from initial version
* added vlan support to existing add/delete unicast/multicast apis
* Made driver as
Add helper functions for VLAN ALE implementations for Add, Delete
Dump VLAN related ALE entries
Signed-off-by: Mugunthan V N mugunthan...@ti.com
---
drivers/net/ethernet/ti/cpsw.c |8 +--
drivers/net/ethernet/ti/cpsw_ale.c | 106
adding support for VLAN interface for cpsw.
CPSW VLAN Capability
* Can filter VLAN packets in Hardware
Signed-off-by: Mugunthan V N mugunthan...@ti.com
---
Documentation/devicetree/bindings/net/cpsw.txt |2 +
drivers/net/ethernet/ti/cpsw.c | 92 +++-
Hi Antoniou
On 1/30/2013 7:25 PM, Pantelis Antoniou wrote:
Hi Mugunthan,
On Jan 30, 2013, at 3:53 PM, Mugunthan V N wrote:
On 1/30/2013 7:21 PM, Pantelis Antoniou wrote:
Hi Vaibhav,
On Jan 30, 2013, at 3:47 PM, Bedia, Vaibhav wrote:
Hi Antoniou,
On Wed, Jan 30, 2013 at 19:07:19,
CPDMA interrupts are not properly acknowledged which leads to interrupt
storm, only cpdma interrupt 0 is acknowledged in Davinci CPDMA driver.
Changed cpdma_ctlr_eoi api to acknowledge 1 and 2 interrupts which are
used for rx and tx respectively.
Reported-by: Pantelis Antoniou
Op 30 jan. 2013, om 20:56 heeft Mugunthan V N mugunthan...@ti.com het
volgende geschreven:
CPDMA interrupts are not properly acknowledged which leads to interrupt
storm, only cpdma interrupt 0 is acknowledged in Davinci CPDMA driver.
Changed cpdma_ctlr_eoi api to acknowledge 1 and 2
On Wed, 30 Jan 2013, Ruslan Bilovol wrote:
Currently, reading /proc/cpuinfo provides userspace with CPU ID of
the CPU carrying out the read from the file.
Userspace using this information may decide what module
to load or how to configure some specific (and processor-depended)
settings or
On Wed, Jan 30, 2013 at 1:07 PM, Nicolas Pitre n...@fluxnic.net wrote:
On Wed, 30 Jan 2013, Ruslan Bilovol wrote:
Currently, reading /proc/cpuinfo provides userspace with CPU ID of
the CPU carrying out the read from the file.
Userspace using this information may decide what module
to load or
On Wed, 30 Jan 2013, Matt Sealey wrote:
On Wed, Jan 30, 2013 at 1:07 PM, Nicolas Pitre n...@fluxnic.net wrote:
On Wed, 30 Jan 2013, Ruslan Bilovol wrote:
Currently, reading /proc/cpuinfo provides userspace with CPU ID of
the CPU carrying out the read from the file.
Userspace using this
* Peter Ujfalusi peter.ujfal...@ti.com [130129 00:34]:
Hi Tony,
On 01/22/2013 11:07 AM, Peter Ujfalusi wrote:
Hi Tony,
The content of this pull:
update for audio support via omap-twl4030 and pwm updates in board level:
http://www.spinics.net/lists/linux-omap/msg85085.html
* Paul Walmsley p...@pwsan.com [130129 14:40]:
Hi Tony,
The following changes since commit 949db153b6466c6f7cad5a427ecea94985927311:
Linux 3.8-rc5 (2013-01-25 11:57:28 -0800)
are available in the git repository at:
git://git.kernel.org/pub/scm/linux/kernel/git/pjw/omap-pending.git
Mugunthan V N mugunthan...@ti.com :
[...]
diff --git a/drivers/net/ethernet/ti/cpsw_ale.c
b/drivers/net/ethernet/ti/cpsw_ale.c
index 0e9ccc2..18b88ce 100644
--- a/drivers/net/ethernet/ti/cpsw_ale.c
+++ b/drivers/net/ethernet/ti/cpsw_ale.c
[...]
@@ -274,19 +292,26 @@ int
Mugunthan V N mugunthan...@ti.com :
[...]
diff --git a/Documentation/devicetree/bindings/net/cpsw.txt
b/Documentation/devicetree/bindings/net/cpsw.txt
index 6ddd028..99696bf 100644
--- a/Documentation/devicetree/bindings/net/cpsw.txt
+++ b/Documentation/devicetree/bindings/net/cpsw.txt
@@
On Wed, Jan 30, 2013 at 02:07:53PM -0500, Nicolas Pitre wrote:
On Wed, 30 Jan 2013, Ruslan Bilovol wrote:
Currently, reading /proc/cpuinfo provides userspace with CPU ID of
the CPU carrying out the read from the file.
Userspace using this information may decide what module
to load or
On Wed, 30 Jan 2013, Russell King - ARM Linux wrote:
On Wed, Jan 30, 2013 at 02:07:53PM -0500, Nicolas Pitre wrote:
On Wed, 30 Jan 2013, Ruslan Bilovol wrote:
Currently, reading /proc/cpuinfo provides userspace with CPU ID of
the CPU carrying out the read from the file.
Userspace
On 17:01 Wed 30 Jan , Ruslan Bilovol wrote:
Currently, reading /proc/cpuinfo provides userspace with CPU ID of
the CPU carrying out the read from the file.
Userspace using this information may decide what module
to load or how to configure some specific (and processor-depended)
settings
On Wed, Jan 30, 2013 at 09:40:52AM +0200, Andy Shevchenko wrote:
On Wed, Jan 30, 2013 at 8:41 AM, Matt Porter mpor...@ti.com wrote:
On Mon, Jan 28, 2013 at 09:27:24PM +0200, Andy Shevchenko wrote:
On Tue, Jan 15, 2013 at 10:32 PM, Matt Porter mpor...@ti.com wrote:
Adds support for parsing
On Wed, Jan 30, 2013 at 09:24:00AM +, Arnd Bergmann wrote:
On Wednesday 30 January 2013, Matt Porter wrote:
+Optional properties:
+- dmas: List of DMA controller phandle and DMA request ordered
+ pairs. One tx and one rx pair is required for each chip
+ select.
The
On Wed, Jan 30, 2013 at 09:27:18AM +, Arnd Bergmann wrote:
On Wednesday 30 January 2013, Matt Porter wrote:
Adds a dma_request_slave_channel_compat() wrapper which accepts
both the arguments from dma_request_channel() and
dma_request_slave_channel(). Based on whether the driver is
Having spent today sorting out the Realview EB boot, the last thing
I expected to find was that both my OMAP platforms are unbootable
to the point that absolutely nothing happens after the boot loader
transfers control.
I've not been running the boots for about a month, so I'm not sure
when this
On 01/29/2013 06:23 PM, Rob Clark wrote:
Driver for the NXP TDA998X i2c hdmi encoder slave.
Rob,
good to see a driver for TDA998x comming! I'd love to test
it on CuBox (mach-dove) but there is no gpu driver I can hook up,
yet. Anyway, I will make some comments how I think the driver
should be
On Wed, Jan 30, 2013 at 14:36:10, Coelho, Luciano wrote:
On Wed, 2013-01-30 at 14:18 +0530, Santosh Shilimkar wrote:
On Wednesday 30 January 2013 02:13 PM, Kumar, Anil wrote:
Hi Sourav,
On Wed, Jan 30, 2013 at 12:10:18, Poddar, Sourav wrote:
Hi Luciano,
On Wednesday 30 January
On Thu, Jan 31, 2013 at 01:49:12AM +, Russell King - ARM Linux wrote:
Having spent today sorting out the Realview EB boot, the last thing
I expected to find was that both my OMAP platforms are unbootable
to the point that absolutely nothing happens after the boot loader
transfers control.
On Wed, Jan 30, 2013 at 16:10:09, Koen Kooi wrote:
Op 24 jan. 2013, om 04:45 heeft Patil, Rachna rac...@ti.com het volgende
geschreven:
From: Patil, Rachna rac...@ti.com
Make changes to add DT support in the MFD core driver.
Signed-off-by: Patil, Rachna rac...@ti.com
---
On Wed, 30 Jan 2013, Olof Johansson wrote:
My Panda ES works with omap2plus_defconfig, but I just noticed that the
in-kernel uImage target will use a bad load/entry address so loading and
booting that uImage will hang u-boot:
Image Name: Linux-3.8.0-rc5-00389-g120d4a8
Created: Wed
On Thu, Jan 31, 2013 at 09:41:11, Patil, Rachna wrote:
On Wed, Jan 30, 2013 at 16:10:09, Koen Kooi wrote:
Op 24 jan. 2013, om 04:45 heeft Patil, Rachna rac...@ti.com het
volgende geschreven:
From: Patil, Rachna rac...@ti.com
Make changes to add DT support in the MFD core
On Wed, Jan 30, 2013 at 22:09:51, Paul Walmsley wrote:
On Wed, 30 Jan 2013, Hebbar, Gururaja wrote:
On Thu, Dec 20, 2012 at 13:05:27, Paul Walmsley wrote:
On Thu, 20 Dec 2012, Hebbar, Gururaja wrote:
On Wed, Dec 19, 2012 at 07:43:50, Paul Walmsley wrote:
We've got a few
Booting 3.8-rc4 on omap4 panda results in the following error
[0.27] omap_i2c 4807.i2c: did not get pins for i2c error: -19
[0.445770] omap_i2c 4807.i2c: bus 0 rev0.11 at 400 kHz
[0.473937] omap_i2c 48072000.i2c: did not get pins for i2c error: -19
[0.474670] omap_i2c
Op 30 jan. 2013, om 15:39 heeft Hebbar Gururaja gururaja.heb...@ti.com het
volgende geschreven:
am33xx_cm_wait_module_ready() checks if register offset is NULL.
int am33xx_cm_wait_module_ready(u16 inst, s16 cdoffs, u16 clkctrl_offs)
{
int i = 0;
if (!clkctrl_offs)
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