On 07/23/2013 02:20 AM, Tero Kristo wrote:
diff --git a/arch/arm/mach-omap2/cclock44xx_data.c
b/arch/arm/mach-omap2/cclock44xx_data.c
deleted file mode 100644
index 88e37a4..000
--- a/arch/arm/mach-omap2/cclock44xx_data.c
+++ /dev/null
[...]
-
-int __init omap4xxx_clk_init(void)
-{
On 07/23/2013 02:20 AM, Tero Kristo wrote:
AM33xx series SoCs do not have autoidle support, and for these the
autoidle register is marked as NULL. Check against a NULL pointer and
do not attempt to of_iomap in this case, as this just creates a bogus
pointer and causes a kernel crash during boot.
On 07/23/2013 02:20 AM, Tero Kristo wrote:
Adding set-rate-parent to clock node now allows a node to forward
clk_set_rate request to its parent clock.
Apologies about previous comment of set-parent missing, the sequence of
patches messed with me :(. had expected generic clk changes at the
On 07/23/2013 02:20 AM, Tero Kristo wrote:
clk-33xx.c now contains the clock init functionality for am33xx, including
DT clock registration and adding of static clkdev entries.
This patch also moves the omap2_clk_enable_init_clocks declaration to
the driver include, as this is needed by the
On 07/23/2013 02:20 AM, Tero Kristo wrote:
OMAP3 has slightly different DPLLs from those compared to OMAP4. Modified
code for the same.
Signed-off-by: Tero Kristo t-kri...@ti.com
---
drivers/clk/omap/dpll.c | 96 +--
1 file changed, 85
On 07/23/2013 02:20 AM, Tero Kristo wrote:
OMAP3 gate clocks are handled through the clk driver now. Basic gate
clock can't be used as the OMAP3 gate clocks have some special features,
namely the idle status linkage which is on separate register.
Signed-off-by: Tero Kristo t-kri...@ti.com
---
On 07/23/2013 02:20 AM, Tero Kristo wrote:
clk-3xxx.c now contains the clock init functionality for omap3, including
DT clock registration and adding of static clkdev entries.
This patch also splits the OMAP3 clock registration code under mach-omap2
to use OMAP3 subtype specific clk init
Add device tree bindings documentation for the TI WiLink modules.
Currently only the WLAN part of the WiLink6, WiLink7 and WiLink8
modules is supported.
Signed-off-by: Luciano Coelho coe...@ti.com
---
In v3, use IRQ_TYPE_LEVEL_HIGH in the example, as suggested by Laurent.
Hi Tom,
On Mon, 29 Jul 2013, Tom Rini wrote:
On 07/29/2013 04:29 AM, Paul Walmsley wrote:
On Wed, 26 Jun 2013, Tom Rini wrote:
Well, me? I'm all in favor of people using latest release of U-Boot for
their board and yelling and screaming (or just reporting bugs) when
things don't
On 07/23/2013 02:20 AM, Tero Kristo wrote:
OMAP3 has interface clocks in addition to functional clocks, which
is it just OMAP3?
require special handling for the autoidle and idle status register
offsets mainly.
Signed-off-by: Tero Kristo t-kri...@ti.com
---
drivers/clk/omap/Makefile
On 07/30/2013 03:23 PM, Paul Walmsley wrote:
Do you know if anyone ever got serial cold-booting working well for, say,
OMAP3 and OMAP4 chips?
I had done configuration header based OMAP3 boot[1] once upon a time,
but serial boot straight to kernel, we need a second that gives control
there..
Hi,
In v2: use IRQ_TYPE_LEVEL_HIGH when defining the interrupts, as
suggested by Laurent.
These patches add the necessary DT configuration to use the WLAN part
of WiLink on OMAP4 Pandaboard and on OMAP4-SDP (including Blaze).
I've tested these changes on Panda and it works fine. But I
Add regulator, pin muxing and MMC5 configuration to be used by the
on-board WiLink6 module.
Signed-off-by: Luciano Coelho coe...@ti.com
---
arch/arm/boot/dts/omap4-panda-common.dtsi | 31 ++-
1 file changed, 30 insertions(+), 1 deletion(-)
diff --git
Add appropriate device tree node for Blaze's WiLink7 module. It uses
a GPIO as interrupt, so configure the gpio2 node as interrupt parent
and assign the corresponding GPIO. Additionally, add the clock
frequencies used by the module.
Signed-off-by: Luciano Coelho coe...@ti.com
---
Add regulator, pin muxing and MMC5 configuration to be used by the
on-board WiLink6 module.
Signed-off-by: Luciano Coelho coe...@ti.com
---
arch/arm/boot/dts/omap4-sdp.dts | 29 +
1 file changed, 29 insertions(+)
diff --git a/arch/arm/boot/dts/omap4-sdp.dts
Add the WiLink device tree nodes. On omap4-panda, a WiLink6 module is
connected on MMC5 and a GPIO interrupt is used. The refclock
frequency is 38.4MHz.
Signed-off-by: Luciano Coelho coe...@ti.com
---
arch/arm/boot/dts/omap4-panda-common.dtsi | 15 +++
1 file changed, 15
Quoting Luciano Coelho (2013-07-30 06:04:34)
+static const struct of_device_id wlcore_sdio_of_clk_match_table[] = {
+ { .compatible = ti,wilink-clock },
+};
+
static struct wl12xx_platform_data *wlcore_get_pdata_from_of(struct device
*dev)
{
struct wl12xx_platform_data
From: Stephen Warren swar...@nvidia.com
DEBUG_UNCOMPRESS was previously disallowed for omap2plus due to
omap2plus.S's use of .data, which is not allowed in the decompressor.
Solve this by placing that data into .text when building the file into
the decompressor. This relies on .text actually
On Tue, Jul 30, 2013 at 04:49:18PM -0600, Stephen Warren wrote:
From: Stephen Warren swar...@nvidia.com
DEBUG_UNCOMPRESS was previously disallowed for omap2plus due to
omap2plus.S's use of .data, which is not allowed in the decompressor.
Solve this by placing that data into .text when
On 07/30/2013 04:52 PM, Russell King - ARM Linux wrote:
On Tue, Jul 30, 2013 at 04:49:18PM -0600, Stephen Warren wrote:
From: Stephen Warren swar...@nvidia.com
DEBUG_UNCOMPRESS was previously disallowed for omap2plus due to
omap2plus.S's use of .data, which is not allowed in the decompressor.
On Tue, 2013-07-30 at 15:35 -0700, Mike Turquette wrote:
Quoting Luciano Coelho (2013-07-30 06:04:34)
+static const struct of_device_id wlcore_sdio_of_clk_match_table[] = {
+ { .compatible = ti,wilink-clock },
+};
+
static struct wl12xx_platform_data
On Tue, Jul 30, 2013 at 6:30 AM, Grant Likely grant.lik...@linaro.org wrote:
On Mon, Jul 29, 2013 at 6:36 AM, Linus Walleij linus.wall...@linaro.org
wrote:
To solve this dilemma, perform an interrupt consistency check
when adding a GPIO chip: if the chip is both gpio-controller and
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On Tue, 23 Jul 2013, Jonathan Austin wrote:
I've just had a quick go at booting 3.11-rc2 on an integrator-cp (1136) in the
hope that we might be able to reproduce this on those boards, but I'm afraid
the integrator works...
I took your config, modified it as little as possible to switch to
On 07/30/2013 11:29 AM, Sekhar Nori wrote:
On 7/30/2013 9:17 AM, Joel Fernandes wrote:
diff --git a/arch/arm/common/edma.c b/arch/arm/common/edma.c
index a432e6c..765d578 100644
--- a/arch/arm/common/edma.c
+++ b/arch/arm/common/edma.c
+ } else {
+ for (; i
Hi Sekhar,
On 07/30/2013 02:05 AM, Sekhar Nori wrote:
On Monday 29 July 2013 06:59 PM, Joel Fernandes wrote:
In an effort to move to using Scatter gather lists of any size with
EDMA as discussed at [1] instead of placing limitations on the driver,
we work through the limitations of the EDMAC
On 07/30/2013 03:29 AM, Sekhar Nori wrote:
On Monday 29 July 2013 06:59 PM, Joel Fernandes wrote:
We certainly don't want error conditions to be cleared anywhere
'anywhere' is a really loaded term.
as this will make us 'forget' about missed events. We depend on
knowing which events were
On 07/30/2013 12:18 AM, Sekhar Nori wrote:
On Monday 29 July 2013 06:59 PM, Joel Fernandes wrote:
Manual trigger for events missed as a result of splitting a
scatter gather list and DMA'ing it in batches. Add a helper
function to trigger a channel incase any such events are missed.
On Wednesday 31 July 2013 10:00 AM, Joel Fernandes wrote:
On 07/30/2013 12:18 AM, Sekhar Nori wrote:
On Monday 29 July 2013 06:59 PM, Joel Fernandes wrote:
Manual trigger for events missed as a result of splitting a
scatter gather list and DMA'ing it in batches. Add a helper
function to
Hi,
On Tuesday 30 July 2013 12:41 PM, Felipe Balbi wrote:
On Sun, Jul 21, 2013 at 08:46:53AM -0700, Greg KH wrote:
On Sun, Jul 21, 2013 at 01:12:07PM +0200, Tomasz Figa wrote:
On Sunday 21 of July 2013 16:37:33 Kishon Vijay Abraham I wrote:
Hi,
On Sunday 21 July 2013 04:01 PM, Tomasz Figa
This patch series add support for ti qspi controller.
Adapted this series on top of Mark brown series[1]:
[1]: https://patchwork.kernel.org/patch/2834694/
And some other cleanups.
Sourav Poddar (2):
drivers: spi: Add qspi flash controller
driver: spi: Add quad spi read support
Since, qspi controller uses quad read.
Configuring the command register, if the transfer of data needs
dual or quad lines.
This patch has been done on top of the following patch[1], which is just the
basic idea of adding dual/quad support in spi framework.
$subject patch will undergo changes
The patch add basic support for the quad spi controller.
QSPI is a kind of spi module that allows single,
dual and quad read access to external spi devices. The module
has a memory mapped interface which provide direct interface
for accessing data form external spi devices.
The patch will
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