This patch adds support for the Nokia N900's sound
system.
Signed-off-by: Sebastian Reichel
---
arch/arm/boot/dts/omap3-n900.dts | 17 +
1 file changed, 17 insertions(+)
diff --git a/arch/arm/boot/dts/omap3-n900.dts b/arch/arm/boot/dts/omap3-n900.dts
index 6bc8100..5701f91 10064
Hi,
This patchset adds DT support in rx51-audio. I tested it on my
Nokia N900 and was able to play a wav file using aplay. I have
not tested the whole functionality, but output via speakers,
headphones and the related enable controls seem to work.
Changes since PATCHv1 [0]:
* drop "ASoC: tlv320a
Use phandles instead of unit adresses to reference usb and dma nodes.
This makes the DT more robust and readable.
Signed-off-by: Guido Martínez
---
arch/arm/boot/dts/am335x-evm.dts | 12 ++--
1 file changed, 6 insertions(+), 6 deletions(-)
diff --git a/arch/arm/boot/dts/am335x-evm.dts b
This clock gate description is missing in the older Reference manuals.
It is present on the SoC to provide 960MHz reference clock to the
internal USB PHYs.
Reference: DRA75x_DRA74x_ES1.1_NDA_TRM_vO.pdf, pg. 900,
Table 3-812. CM_COREAON_L3INIT_60M_GFCLK_CLKCTRL
Use l3init_960m_gfclk as parent of u
As clocks might be named differently on multiple platforms, use a generic
name in the driver and allow device tree node to specify the platform
specific clock name.
Signed-off-by: Roger Quadros
---
drivers/phy/phy-omap-usb2.c | 8
1 file changed, 4 insertions(+), 4 deletions(-)
diff --
Add USB pinmux information and USB modes
for the USB controllers.
Signed-off-by: Roger Quadros
---
arch/arm/boot/dts/dra7-evm.dts | 24
1 file changed, 24 insertions(+)
diff --git a/arch/arm/boot/dts/dra7-evm.dts b/arch/arm/boot/dts/dra7-evm.dts
index 5babba0..1d77815 1
Add the sysconfig class bits for the Super Speed USB
controllers
Signed-off-by: Roger Quadros
---
arch/arm/mach-omap2/omap_hwmod_7xx_data.c | 12
1 file changed, 12 insertions(+)
diff --git a/arch/arm/mach-omap2/omap_hwmod_7xx_data.c
b/arch/arm/mach-omap2/omap_hwmod_7xx_data.c
ind
Hi,
This series enables the 2 USB ports on the DRA7-evm.
NOTE: USB1 port is hard coded to work in peripheral mode and USB2 port
in host mode. This is due to missing ID pin interrupt in pre ver.E boards.
USB1 port doesn't in peripheral mode out of the box due to missing VBUS
detection
and mailbo
The USB2 PHY driver expects named clocks for wakeup clock
and reference clock. Provide this information for USB2 PHY
nodes in OMAP4 and OMAP5 SoC DTS.
Signed-off-by: Roger Quadros
---
arch/arm/boot/dts/omap4.dtsi | 2 ++
arch/arm/boot/dts/omap5.dtsi | 2 ++
2 files changed, 4 insertions(+)
diff
Use phandles instead of unit adresses to reference usb and dma nodes.
This makes the DT more robust and readable.
Signed-off-by: Guido Martínez
---
arch/arm/boot/dts/am335x-evmsk.dts | 12 ++--
1 file changed, 6 insertions(+), 6 deletions(-)
diff --git a/arch/arm/boot/dts/am335x-evmsk.d
Add nodes for the Super Speed USB controllers, omap-control-usb,
USB2 PHY and USB3 PHY devices.
Remove ocp2scp1 address space from hwmod data as it is
now provided via device tree.
Signed-off-by: Roger Quadros
---
arch/arm/boot/dts/dra7.dtsi | 149 ++
a
Add "wkupclk" and "refclk" information to DT binding information.
Signed-off-by: Roger Quadros
---
Documentation/devicetree/bindings/phy/ti-phy.txt | 7 +++
1 file changed, 7 insertions(+)
diff --git a/Documentation/devicetree/bindings/phy/ti-phy.txt
b/Documentation/devicetree/bindings/phy
Use phandles instead of unit adresses to reference usb and dma nodes.
This makes the DT more robust and readable.
Signed-off-by: Guido Martínez
---
arch/arm/boot/dts/am335x-igep0033.dtsi | 12 ++--
1 file changed, 6 insertions(+), 6 deletions(-)
diff --git a/arch/arm/boot/dts/am335x-ige
Use phandles instead of unit adresses to reference usb and dma nodes.
This makes the DT more robust and readable.
Signed-off-by: Guido Martínez
---
arch/arm/boot/dts/am335x-bone-common.dtsi | 12 ++--
1 file changed, 6 insertions(+), 6 deletions(-)
diff --git a/arch/arm/boot/dts/am335x-
This patch adds qspi nodes for am43xx SOC devices.
Signed-off-by: Sourav Poddar
---
Note,
checpatch gives 1 warning on flash compatible string
"mx66l51235l". This flash is supported in m25p80 driver and
the driver is used for other flash devices also. Hence, each
flash compatible is not described
On 4/28/2014 12:40 PM, Richard Cochran wrote:
On Mon, Apr 28, 2014 at 09:40:24AM +0530, George Cherian wrote:
cpsw_cpts_rft_clk has got the choice of 3 clocksources
-dpll_core_m4_ck
-dpll_core_m5_ck
-dpll_disp_m2_ck
By default dpll_core_m4_ck is selected, witn this as clock
source the CPT
On 4/28/2014 1:25 PM, Richard Cochran wrote:
On Mon, Apr 28, 2014 at 09:40:23AM +0530, George Cherian wrote:
Enable the Annex F Time Sync explicitly for DRA7x and AM4372.
With this enabled the L2 PTP is working.
L2 works fine without this bit. If this is needed for V3 hardware,
then it should h
:sdp3430: Boot PASS: http://slexy.org/raw/s2Mo7s3ttZ
15: OMAP5432uEVM: Boot PASS: http://slexy.org/raw/s2qXj7HFTJ
=
[ INFO: possible recursive locking detected ]
3.15.0-rc2-next-20140428-2-gd0ca5e6 #1 Not tainted
Signed-off-by: Stefan Roese
Cc: Thorsten Eisbein
---
.../devicetree/bindings/sound/omap3-ha.txt | 27 ++
1 file changed, 27 insertions(+)
create mode 100644 Documentation/devicetree/bindings/sound/omap3-ha.txt
diff --git a/Documentation/devicetree/bindings/sound/oma
Add "ha" for "HEAD acoustics" to the list of DT vendor prefixes.
Signed-off-by: Stefan Roese
Cc: Thorsten Eisbein
---
Documentation/devicetree/bindings/vendor-prefixes.txt | 1 +
1 file changed, 1 insertion(+)
diff --git a/Documentation/devicetree/bindings/vendor-prefixes.txt
b/Documentation/
From: Jarkko Nikula
HA DSP card which features a HA DSP audio codec is intended to be connected
to TAO-3530 (or BeagleBoard) using McBSP3 for digital audio and I2C bus for
codec control. A GPIO signal from CPU to codec is used to request clock
signals active.
This machine driver has a special fe
From: Jarkko Nikula
This codec driver template represents an I2C controlled multichannel audio
codec that has many typical ASoC codec driver features like volume controls,
mixer stages, mux selection, output power control, in-codec audio routings,
codec bias management and DAI link configuration.
From: Jarkko Nikula
Machine specific trigger callback allows to do final stream start/stop
related operations in a machine driver after setting up the codec, DMA and
DAI.
One example could be clock management for linked streams case where machine
driver can start/stop synchronously the linked st
> Some oscillators can be turned off during off-idle saving few
> a little bit power at the cost of the oscillator start up
> latency.
>
> If you board can do this, you can now enable it by using the
> ti,twl4030-power-idle-osc-off compatible flag.
>
> Cc: Peter De Schrijver
> Cc: Samuel Ortiz
> With the recommended twl4030 configuration added, we can now add
> board specific changes as modifications to the recommended
> configuration.
>
> Cc: Peter De Schrijver
> Cc: Samuel Ortiz
> Cc: Lee Jones
> Signed-off-by: Tony Lindgren
> ---
> drivers/mfd/twl4030-power.c | 21 ++
Add support for CM-T54 CoM and SBC-T54 board:
http://compulab.co.il/products/computer-on-modules/cm-t54/
http://compulab.co.il/products/sbcs/sbc-t54/
SBC-T54 is a single board computer based on OMAP5432 CPU.
It is implemented with a CM-T54 CoM providing most of the functions,
and SB-T54 carrier b
Add support of AW-NH387 (mwifiex) WiFi/BT chip connected to MMC3.
Signed-off-by: Dmitry Lifshitz
---
Changes from V1:
* Platform quirk for deasserting PDN and RST GPIOs of WiFi chip replaced by
appropriate regulators in DT.
arch/arm/boot/dts/omap5-cm-t54.dts | 53 +
Add support for CompuLab CM-T54 CoM and SBC-T54 board:
http://compulab.co.il/products/computer-on-modules/cm-t54/
http://compulab.co.il/products/sbcs/sbc-t54/
SBC-T54 is a single board computer based on OMAP5432 CPU.
It is implemented with a CM-T54 CoM providing most of the functi
> These settings are based on the "Recommended Sleep Sequences for
> the Zoom Platform" pdf at:
>
> http://omappedia.com/wiki/File:Recommended_Sleep_Sequences_Zoom.pdf
>
> These settings assume most of the regulators are under control of
> Linux, and cuts off VDD1 and VDD2 during off-idle as Linu
> The twl4030 PMIC needs to be configured properly for things like
> warm reset and deeper idle states so the PMIC manages the regulators
> properly based on the hardware triggers from the SoC.
>
> For example, when rebooting an OMAP3530 at 125 MHz, it hangs.
> With this patch, TWL4030 will be res
On Monday, April 28, 2014 7:54 PM, Masanari Iida wrote:
>
> Fix two format string mismatch in display-sysfs.c
>
> Signed-off-by: Masanari Iida
> ---
> drivers/video/fbdev/omap2/dss/display-sysfs.c | 4 ++--
> 1 file changed, 2 insertions(+), 2 deletions(-)
>
> diff --git a/drivers/video/fbdev/
Fix two format string mismatch in display-sysfs.c
Signed-off-by: Masanari Iida
---
drivers/video/fbdev/omap2/dss/display-sysfs.c | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/drivers/video/fbdev/omap2/dss/display-sysfs.c
b/drivers/video/fbdev/omap2/dss/display-sysfs.c
On 26/04/14 02:53, Tony Lindgren wrote:
> * Tomi Valkeinen [140424 02:53]:
>> On 18/04/14 18:51, Tony Lindgren wrote:
>>
+ gpio = of_get_gpio(node, 0);
+ if (gpio_is_valid(gpio) || gpio == -ENOENT) {
+ ddata->enable_gpio = gpio;
+ } else {
+ dev_err(&p
> If for some reason the boot loader enabled the audpwron GPIO we will have
> pending IRQs to be handled. This seams to break twl6040 for some reason
> leading to non working i2c communication (i2c timeouts). Clearing the INTID
> register after we requested the audpwron GPIO (and set it to low) wil
> Make sure that we patch the ACCCTL register as the first thing when the
> driver loads, thus configuring I2C fast mode and i2c access for dual access
> registers.
>
> Signed-off-by: Peter Ujfalusi
> ---
> drivers/mfd/twl6040.c | 7 +++
> 1 file changed, 3 insertions(+), 4 deletions(-)
App
> All boards using twl6040 configures the i2c bus to 400KHz. While twl6040's
> defaults to normal mode (100KHz). So far twl6040 has no problem with i2c
> communication in this configuration it is safer to select fast i2c mode.
>
> Signed-off-by: Peter Ujfalusi
> ---
> drivers/mfd/twl6040.c
On 04/24/2014 09:52 PM, Greg KH wrote:
> On Mon, Apr 14, 2014 at 01:46:11PM +0200, Robert Baldyga wrote:
>> This patchset adds many improvements to extcon class driver and extcon
>> provider drivers. It changes extcon API to faster and safer by replaceing
>> function taking extcon and cable names w
Commit 4df42de9d3e "gpio: omap: add a GPIO_OMAP option instead of using
ARCH_OMAP" made it possible to build OMAP kernels without the GPIO driver,
which at least on OMAP2 and OMAP3 causes build errors because of functions
used by the platform power management code:
arch/arm/mach-omap2/built-in.o:
On Monday 28 April 2014 02:20 PM, Arnd Bergmann wrote:
> On Monday 28 April 2014 11:39:22 Rajendra Nayak wrote:
>>
>> DRA742 EVM: Software Developement Board for DRA742
>> compatible = "ti,dra7-evm", "ti,dra742", "ti,dra74", "ti,dra7"
>> DRA722 EVM: Software Development Board for DRA722
>> compati
On Monday 28 April 2014 11:39:22 Rajendra Nayak wrote:
>
> DRA742 EVM: Software Developement Board for DRA742
> compatible = "ti,dra7-evm", "ti,dra742", "ti,dra74", "ti,dra7"
> DRA722 EVM: Software Development Board for DRA722
> compatible = "ti,dra72-evm", "ti,dra722", "ti,dra72", "ti,dra7"
>
>
From: Yegor Yefremov
This patch creates unique DMA channels for the second USB
interface, otherwise the second USB interface is not usable
at all.
Signed-off-by: Yegor Yefremov
---
arch/arm/boot/dts/am33xx.dtsi | 12 ++--
1 files changed, 6 insertions(+), 6 deletions(-)
diff --git a
On Mon, Apr 28, 2014 at 09:40:23AM +0530, George Cherian wrote:
> Enable the Annex F Time Sync explicitly for DRA7x and AM4372.
> With this enabled the L2 PTP is working.
L2 works fine without this bit. If this is needed for V3 hardware,
then it should have its own code variant.
> while at that
Hi Balaji, Tony, all
v10
- bug fix on multi-core, untested
- incorporated changes from Balaji
- use devres / RAII mechanism to configure wake_up /
sdio irq capabilities
- drop pinctrl state 'active'
rely on driver-model states 'default', 'idle'
- add specific 'gpio_dat1' state for am335x SWAKE
There have been various patches floating around for enabling
the SDIO IRQ for hsmmc, but none of them ever got merged.
Probably the reason for not merging the SDIO interrupt patches
has been the lack of wake-up path for SDIO on some omaps that
has also needed remuxing the SDIO DAT1 line to a GPIO
The am335x can't detect pending cirq in PM runtime suspend.
This patch reconfigures dat1 as a GPIO before going to suspend.
SDIO interrupts are detected with the GPIO, the GPIO will only wake
the module from suspend, SDIO irq detection will still happen through the
IP block.
Idea of remuxing the p
Add SDIO IRQ entries to debugfs entry. Note that PSTATE shows current
state of data lines, incl. SDIO IRQ pending
Signed-off-by: Andreas Fenkart
Signed-off-by: Tony Lindgren
diff --git a/drivers/mmc/host/omap_hsmmc.c b/drivers/mmc/host/omap_hsmmc.c
index e675042..76fe3bd 100644
--- a/drivers/mm
These are predefined states of the driver model. When not present,
as if not set in the device tree, they simple become no-ops.
So it is always safe to call them.
This is not the simplest implementation, on AM335x at least, we could
witch to idle at any point in the suspend hook, only the default s
on multicores, an sdio irq handler could be running in parallel to
runtime suspend. In the worst case it could be waiting for the spinlock
held by the runtime suspend. When runtime suspend is complete and the
functional clock (fclk) turned off, the irq handler will continue and
cause a SIGBUS on th
Hi Balaji, Tony, all
v10
- bug fix on multi-core, untested
- incorporated changes from Balaji
- use devres / RAII mechanism to configure wake_up /
sdio irq capabilities
- drop pinctrl state 'active'
rely on driver-model states 'default', 'idle'
- add specific 'gpio_dat1' state for am335x SWAK
On Mon, Apr 28, 2014 at 09:40:24AM +0530, George Cherian wrote:
> cpsw_cpts_rft_clk has got the choice of 3 clocksources
> -dpll_core_m4_ck
> -dpll_core_m5_ck
> -dpll_disp_m2_ck
>
> By default dpll_core_m4_ck is selected, witn this as clock
> source the CPTS doesnot work properly. It gives cloc
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