On Sat, Dec 27, 2014 at 11:16 PM, Felipe Balbi wrote:
> Hi,
>
> On Sat, Dec 27, 2014 at 01:24:03PM +0530, Amit Virdi wrote:
>> On Mon, Dec 22, 2014 at 9:36 PM, Felipe Balbi wrote:
>> > On Fri, Dec 19, 2014 at 12:40:16PM +0530, Amit Virdi wrote:
>> >> When SG is used, there are two loops iterating
On Sat, Dec 27, 2014 at 11:14 PM, Felipe Balbi wrote:
> Hi,
>
> On Sat, Dec 27, 2014 at 12:39:23PM +0530, Amit Virdi wrote:
>> On Mon, Dec 22, 2014 at 9:34 PM, Felipe Balbi wrote:
>> > On Fri, Dec 19, 2014 at 12:40:15PM +0530, Amit Virdi wrote:
>> >> When scatter gather is used, multiple TRBs are
Hi,
On Sat, Dec 27, 2014 at 03:25:53PM -0600, Felipe Balbi wrote:
> On Sat, Dec 27, 2014 at 07:52:55PM +0200, Aaro Koskinen wrote:
> > Add initial DT support.
> >
> > Signed-off-by: Aaro Koskinen
> > ---
> > Documentation/devicetree/bindings/mfd/menelaus.txt | 30 +
> > drivers/mfd/
On 12/28/14 16:30, Dmitry Lifshitz wrote:
> CM-T3517, CM-T3530 and CM-T3730 features NAND storage chip connected to
> GPMC bus.
>
> Add GPMC DT entry into the root DT file omap3-cm-t3x.dtsi, common for
> all three modules.
>
> NAND timings are calculated to be safe for CM-T3x devices as it works
CM-T3517, CM-T3530 and CM-T3730 features NAND storage chip connected to
GPMC bus.
Add GPMC DT entry into the root DT file omap3-cm-t3x.dtsi, common for
all three modules.
NAND timings are calculated to be safe for CM-T3x devices as it works
now in non DT boot (in this case the timings are updated
Hi Dima,
On 12/28/14 15:15, Dmitry Lifshitz wrote:
> Add NAND support
>
> Signed-off-by: Dmitry Lifshitz
> ---
> arch/arm/boot/dts/omap3-cm-t3x.dtsi | 58
> +
> arch/arm/boot/dts/omap3-sbc-t3517.dts |4 ++
> arch/arm/boot/dts/omap3-sbc-t3530.dts | 10 +
Add NAND support
Signed-off-by: Dmitry Lifshitz
---
arch/arm/boot/dts/omap3-cm-t3x.dtsi | 58 +
arch/arm/boot/dts/omap3-sbc-t3517.dts |4 ++
arch/arm/boot/dts/omap3-sbc-t3530.dts | 10 ++
arch/arm/boot/dts/omap3-sbc-t3730.dts |5 ++-
4 files chan
Nishanth, Tony,
On 24.12.2014 02:13, Nishanth Menon wrote:
On 12/23/2014 11:06 AM, Tony Lindgren wrote:
* Marek Szyprowski [141223 02:51]:
From: Tomasz Figa
Certain implementations of secure hypervisors (namely the one found on
Samsung Exynos-based boards) do not provide access to individua
On Sun, Dec 28, 2014 at 12:24:47AM -0800, Guenter Roeck wrote:
> On Sat, Dec 27, 2014 at 11:35:16PM +0100, Pavel Machek wrote:
> > On Sat 2014-12-27 20:58:25, Pavel Machek wrote:
> > > On Fri 2014-12-26 13:34:53, Sebastian Reichel wrote:
> > > > OMAP34xx and OMAP36xx processors contain a register i
On Sat, Dec 27, 2014 at 11:35:16PM +0100, Pavel Machek wrote:
> On Sat 2014-12-27 20:58:25, Pavel Machek wrote:
> > On Fri 2014-12-26 13:34:53, Sebastian Reichel wrote:
> > > OMAP34xx and OMAP36xx processors contain a register in the syscon area,
> > > which can be used to determine the SoCs temper
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