I have to say, I am a bit leery about applying the omap_device.c and
omap_hwmod.c changes, since the called functions -- omap_device_delete()
and clk_disable() -- don't explicitly document that NULLs are allowed
to be passed in.
How are the chances to improve documentation around such
Hello Brian,
On Mon, 15 Jun 2015, Brian Hutchinson wrote:
Clocks 4-7 are capable of PWM output on dm816x.
This adds the pwm capability to those timers.
Cc: Paul Walmsley p...@pwsan.com
Cc: Tero Kristo t-kri...@ti.com
Cc: Tony Lindgren t...@atomide.com
Signed-off-by: Brian Hutchinson
On 07/16/2015 04:51 AM, Paul Walmsley wrote:
On Tue, 14 Jul 2015, Tony Lindgren wrote:
* Tero Kristo t-kri...@ti.com [150714 03:34]:
On 07/14/2015 12:54 PM, Tony Lindgren wrote:
* Tero Kristo t-kri...@ti.com [150714 01:56]:
This pull request contains the TI clock driver set to move the
* Paul Walmsley p...@pwsan.com [150715 22:58]:
Hello Markus
On Tue, 30 Jun 2015, SF Markus Elfring wrote:
From: Markus Elfring elfr...@users.sourceforge.net
Date: Tue, 30 Jun 2015 14:00:16 +0200
The functions clk_disable(), of_node_put() and omap_device_delete() test
whether their
On Wed, Jul 15, 2015 at 02:13:26PM +0200, Sebastian Reichel wrote:
-static int tsc2005_write(struct tsc2005 *ts, u8 reg, u16 value)
-{
- u32 tx = ((reg | TSC2005_REG_PND0) 16) | value;
- struct spi_transfer xfer = {
- .tx_buf = tx,
- .len=
Hi,
* Russell King rmk+ker...@arm.linux.org.uk [150715 10:50]:
Restore the OMAP4 barrier behaviour using the new implementation which
allows multiplatform systems to hook into the mb() and wmb() ARM
implementations to perform any necessary additional barrier maintanence.
I'm getthing this
* Nishanth Menon n...@ti.com [150715 06:44]:
On 07/15/2015 01:26 AM, Tony Lindgren wrote:
* Nishanth Menon n...@ti.com [150622 08:14]:
DRA7 uses OMAP5 IO table at the moment. This is purely spurious since
the OMAP5 and DRA7 register maps are different in many aspects.
AM57xx/DRA7 TRM
On Thu, 16 Jul 2015, Tero Kristo wrote:
On 07/16/2015 03:15 AM, Paul Walmsley wrote:
On Tue, 14 Jul 2015, Tero Kristo wrote:
On 07/14/2015 01:09 PM, Lokesh Vutla wrote:
Hi,
On Wednesday 10 June 2015 02:56 PM, Lokesh Vutla wrote:
Some IP blocks like RTC, needs an additional
On 16/07/15 03:54, Peter Chen wrote:
On Wed, Jul 15, 2015 at 04:30:27PM +0300, Roger Quadros wrote:
On 14/07/15 03:34, Peter Chen wrote:
On Mon, Jul 13, 2015 at 01:13:54PM +0300, Roger Quadros wrote:
Peter,
On 13/07/15 04:58, Peter Chen wrote:
On Wed, Jul 08, 2015 at 01:19:30PM +0300, Roger
* Tony Lindgren t...@atomide.com [150604 15:30]:
* Stephen Boyd sb...@codeaurora.org [150604 11:44]:
On 06/03, Tony Lindgren wrote:
+#include linux/list.h
Is list.h used?
...
+static const char *enable_init_clks[] = {
+};
delete?
+
+int __init
Paul,
On 16/07/15 04:47, Paul Walmsley wrote:
Hi Roger
On Mon, 13 Jul 2015, Roger Quadros wrote:
There are quite a few hwmods that don't have sysconfig register and so
_find_mpu_rt_port(oh) will return NULL thus preventing ready state check
on those modules after the module is enabled.
On Wed, Jul 15, 2015 at 05:25:32PM -0700, Dmitry Torokhov wrote:
On Thu, Jul 16, 2015 at 12:09:41AM +0200, Sebastian Reichel wrote:
On Wed, Jul 15, 2015 at 02:34:04PM -0700, Dmitry Torokhov wrote:
[...]
if (np) {
- ts-reset_gpio = of_get_named_gpio(np,
* Tony Lindgren t...@atomide.com [150603 12:39]:
* Sergei Shtylyov sergei.shtyl...@cogentembedded.com [150603 12:10]:
Hello.
On 06/03/2015 07:23 PM, Tony Lindgren wrote:
Fix scrm compatible for dm814x.
So, scrm...
Cc: Matthijs van Duin matthijsvand...@gmail.com
* Sekhar Nori nsek...@ti.com [150708 08:30]:
Hi Tony,
Here are some defconfig updates for commonly
used drivers on platforms supported by
omap2plus_defconfig.
Applies to v4.2-rc1
Thanks,
Sekhar
Sekhar Nori (4):
ARM: omap2plus_defconfig: enable support for TI ADC
ARM:
Remove the OMAP3 core DPLL re-program code, and the associated SRAM
code that does the low-level programming of the DPLL divider, idling
of the SDRAM etc.
This code was never fully implemented in the kernel; things missing
were driver side handling of core clock changes (they need to account
for
On Wed, Jun 24, 2015 at 4:54 PM, Grygorii Strashko
grygorii.stras...@ti.com wrote:
From: Grygorii Strashko grygorii.stras...@linaro.org
Add missed spin_unlock_irqrestore in omap_gpio_irq_type when
omap_set_gpio_triggering() is failed.
It fixes static checker warning:
On 07/16/2015 03:15 AM, Paul Walmsley wrote:
On Tue, 14 Jul 2015, Tero Kristo wrote:
On 07/14/2015 01:09 PM, Lokesh Vutla wrote:
Hi,
On Wednesday 10 June 2015 02:56 PM, Lokesh Vutla wrote:
Some IP blocks like RTC, needs an additional unlocking mechanism for
writing to its registers. This
phyBOARD-WEGA-AM335x represents a direct soldered
combination of a phyCORE-AM335x SoM and carrier board.
Different kind of SoM options can be connected to
the wega carrier board. So we created a separate
wega dtsi file. The final dts contains the actual
SoM on the carrier board.
WEGA carrier
* Suman Anna s-a...@ti.com [150710 13:45]:
The OMAP IOMMU driver has been adapted to the IOMMU framework
for a while now, and it no longer supports being built as a
module. Cleanup all the module related references both from
the code and in the build.
While at it, also relocate a comment
From: Fugang Duan b38...@freescale.com
In tsc2046 touch driver, the values such as ti,x-min is defined as a u16
value. the driver use API of_property_read_u16() read the value. For these
u16 value, the dts entry should be like:
property = /bits/ 16 0x5000;
This describes the property as a
phyCORE-AM335x is a SoM (System on Module) containing
a AM335x SOC. The module can be connected to different
carrier boards.
Some hardware parts are configurable on the phyCORE-AM335x.
So they are disabled on default in this som dtsi file.
They will be enabled in the board dts files, when
Hi Paul,
On Thursday 16 July 2015 05:44 AM, Paul Walmsley wrote:
Hi
On Wed, 10 Jun 2015, Lokesh Vutla wrote:
RTC IP have kicker feature which prevents spurious writes to its registers.
In order to write into any of the RTC registers, KICK values has to be
written to KICK registers.
Hello,
Now that all users of the OMAP3 ISP have switched to DT, this patch series
removes support for legacy platform data support in the omap3isp driver. It
also drops the OMAP3 ISP device instantiation board code that is now unused.
Patch 2/2 depends on 1/2. From a conflict resolution point of
The OMAP3 ISP is now fully supported in DT, remove its instantiation
from C code.
Signed-off-by: Laurent Pinchart laurent.pinch...@ideasonboard.com
---
arch/arm/mach-omap2/devices.c | 53 ---
arch/arm/mach-omap2/devices.h | 19
2 files
Hi Tony,
Here non-critical compatible name fix
for DRA7x EVM for v4.3
Thanks,
Sekhar
Sekhar Nori (2):
ARM: dts: dra7-evm: fix compatible name for pcf8575
ARM: dts: dra72-evm: fix compatible name for pcf8575
arch/arm/boot/dts/dra7-evm.dts | 2 +-
arch/arm/boot/dts/dra72-evm.dts | 2 +-
2
We've been moving all omap2+ based systems to boot in device tree only
mode for a few years now. Only omap3 has legacy booting support
remaining. Most omap3 boards already have related arch/arm/boot/*.dts*
files for booting with device tree.
This board has support for device tree based booting,
We've been moving all omap2+ based systems to boot in device tree only
mode for a few years now. Only omap3 has legacy booting support
remaining. Most omap3 boards already have related arch/arm/boot/*.dts*
files for booting with device tree.
This board has support for device tree based booting,
Hi all,
I think we can drop these now. This just leaves n900 and ldp with
n900 pending patches for legacy proc support.
Regards,
Tony
Tony Lindgren (2):
ARM: OMAP2+: Remove legacy booting support for LogicPD Torpedo
ARM: OMAP2+: Remove legacy booting support for Pandora
Hi Paul,
On Thursday 16 July 2015 05:43 AM, Paul Walmsley wrote:
Hi,
some comments.
On Wed, 10 Jun 2015, Lokesh Vutla wrote:
RTC IP have kicker feature which prevents spurious writes to its registers.
In order to write into any of the RTC registers, KICK values has to be
written to KICK
Platforms using the OMAP3 ISP have all switched to DT, drop platform
data support.
Signed-off-by: Laurent Pinchart laurent.pinch...@ideasonboard.com
---
drivers/media/platform/Kconfig | 2 +-
drivers/media/platform/omap3isp/isp.c | 133 ---
On Tue, Jul 14, 2015 at 03:45:51PM +0100, Nariman Poushin wrote:
Please submit patches in the format covered in SubmittingPatches,
version information goes inside the [].
Add support for writing sequences of registers / patches with specified
delays (in microseconds). Logically separates the
Compatible name ti,pcf8575 used in dra72-evm.dts is not
documented in binding definitions nor is used by the
gpio-pcf857x driver.
The correct compatible to use is nxp,pcf8575. Fix it.
The existing .dtb still works because i2c_device_match()
falls back to id table based matching if compatible
Compatible name ti,pcf8575 used in dra7-evm.dts is not
documented in binding definitions nor is used by the
gpio-pcf857x driver.
The correct compatible to use is nxp,pcf8575. Fix it.
The existing .dtb works in spite of this issue because
i2c_device_match() falls back to id table based matching
On 07/16/2015 01:13 PM, Paul Walmsley wrote:
On Thu, 16 Jul 2015, Tero Kristo wrote:
On 07/16/2015 03:15 AM, Paul Walmsley wrote:
On Tue, 14 Jul 2015, Tero Kristo wrote:
On 07/14/2015 01:09 PM, Lokesh Vutla wrote:
Hi,
On Wednesday 10 June 2015 02:56 PM, Lokesh Vutla wrote:
Some IP blocks
* Laurent Pinchart laurent.pinch...@ideasonboard.com [150716 05:57]:
The OMAP3 ISP is now fully supported in DT, remove its instantiation
from C code.
Please feel to queue this along with the second patch in this series,
this should not cause any merge conflicts:
Acked-by: Tony Lindgren
On Tue, 14 Jul 2015 16:45:52 +0200,
Nariman Poushin wrote:
We treat a delay in a sequence the same way we treat a page change as
they are logically similar in that you can coalesce all write before
a delay (in the same way you can coalesce all writes before a page
change is needed)
For hwmods without sysc, _init_mpu_rt_base(oh) won't be called and so
_find_mpu_rt_port(oh) will return NULL thus preventing ready state check
on those modules after the module is enabled.
This can potentially cause a bus access error if the module is accessed
before the module is ready.
Fix
Hi Tero,
On Thursday 16 July 2015 05:33 PM, Tero Kristo wrote:
On 07/16/2015 01:13 PM, Paul Walmsley wrote:
On Thu, 16 Jul 2015, Tero Kristo wrote:
On 07/16/2015 03:15 AM, Paul Walmsley wrote:
On Tue, 14 Jul 2015, Tero Kristo wrote:
On 07/14/2015 01:09 PM, Lokesh Vutla wrote:
Hi,
On
On Mon, Jul 6, 2015 at 5:13 PM, Grygorii Strashko
grygorii.stras...@ti.com wrote:
The PSC IRQ is requested using request_irq() API and as result it can
be forced to be threaded IRQ in RT-Kernel if PCS_QUIRK_HAS_SHARED_IRQ
is enabled for pinctrl domain.
As result, following 'possible irq lock
Add PRCM IRQ entry. This is needed for IO wake up interrupts as the interrupt
generated is a prcm interrupt.
Signed-off-by: Keerthy j-keer...@ti.com
---
arch/arm/boot/dts/am4372.dtsi | 1 +
1 file changed, 1 insertion(+)
diff --git a/arch/arm/boot/dts/am4372.dtsi b/arch/arm/boot/dts/am4372.dtsi
The patch series adds IO wake up support for AM437x series
making use of the existing OMAP4 support. Adds the AM437x
specifics.
Note: Previous series patch 2 and 4 of the previous series are already
queued for v4.3 by Paul. Fixed the comments on the remaining patches
and posting them.
Changes in
The register offsets for some of the PRM Registers are different
hence populating the differing fields. This is needed to support
IO wake up feature for am437x family.
Signed-off-by: Keerthy j-keer...@ti.com
---
arch/arm/mach-omap2/prm44xx.c | 12 +++-
1 file changed, 11 insertions(+), 1
PRM_IO_PMCTRL_OFFSET need not be same for all SOCs hence
remove hardcoding and use the value provided by the omap_prcm_irq_setup
structure. This is done to support IO wakeup on am437x series.
Signed-off-by: Keerthy j-keer...@ti.com
---
arch/arm/mach-omap2/prcm-common.h | 2 ++
Enable IO wakeup feature. This enables am437x pads to generate daisy
chained wake ups(eventually generates aprcm Interrupt) especially
when in low power modes.
Signed-off-by: Keerthy j-keer...@ti.com
---
arch/arm/mach-omap2/prm_common.c | 1 +
1 file changed, 1 insertion(+)
diff --git
On Mon, Jul 6, 2015 at 5:11 PM, Grygorii Strashko
grygorii.stras...@ti.com wrote:
On DRA7 there is one pinctrl domain (dra7_pmx_core) and
PRCM wake-up IRQ is not shared, so remove quirk.
Cc: Nishanth Menon n...@ti.com
Cc: Tony Lindgren t...@atomide.com
Fixes: 31320beaa3d3 ('pinctrl: single:
On Wed, Jul 15, 2015 at 11:48:54PM -0700, Tony Lindgren wrote:
Hi,
* Russell King rmk+ker...@arm.linux.org.uk [150715 10:50]:
Restore the OMAP4 barrier behaviour using the new implementation which
allows multiplatform systems to hook into the mb() and wmb() ARM
implementations to perform
On Wed, 15 Jul 2015, Tony Lindgren wrote:
* Paul Walmsley p...@pwsan.com [150715 22:58]:
Hello Markus
On Tue, 30 Jun 2015, SF Markus Elfring wrote:
From: Markus Elfring elfr...@users.sourceforge.net
Date: Tue, 30 Jun 2015 14:00:16 +0200
The functions clk_disable(),
On 16/07/15 04:25, Paul Walmsley wrote:
Hi
On Tue, 23 Jun 2015, Roger Quadros wrote:
For some hwmods (e.g. DCAN on DRA7) we need the possibility to
disable HW_AUTO for the clockdomain while the module is active.
To achieve this there needs to be a refcounting mechanism to
indicate
Hi,
On Thu, Jul 16, 2015 at 2:59 PM, Tony Lindgren t...@atomide.com wrote:
We've been moving all omap2+ based systems to boot in device tree only
mode for a few years now. Only omap3 has legacy booting support
remaining. Most omap3 boards already have related arch/arm/boot/*.dts*
files for
Hi,
On 07/16/2015 01:57 AM, Paul Walmsley wrote:
On Wed, 15 Jul 2015, Paul Walmsley wrote:
On Wed, 3 Jun 2015, Vignesh R wrote:
Legacy IPs like PWMSS, present under l4per2_7xx_clkdm, cannot support
smart-idle when its clock domain is in HW_AUTO on DRA7 SoCs. Hence,
program clock domain to
Separate the functionality using sequences of register writes from the
functions that take register defaults. This change renames the arguments
in order to support the extension of reg_sequence to take an optional
delay to be applied after any given register in a sequence is written.
This avoids
Add an optional delay_us field in reg_sequence to allow the client to
specify a delay (in microseconds) to be applied after any given write
in a sequence of writes.
We treat a delay in a sequence the same way we treat a page change as
they are logically similar in that you can coalesce all write
Hi,
On 07/16/2015 03:24 AM, Paul Walmsley wrote:
Hi,
some comments.
On Wed, 3 Jun 2015, Vignesh R wrote:
Add hwmod entries for the PWMSS on DRA7.
Set l4_root_clk_div as the main_clk of PWMSS. It is fixed-factored clock
equal to L4PER2_L3_GICLK/2(l3_iclk_div/2).
As per AM57x TRM
Hi Laurent,
Laurent Pinchart wrote:
The OMAP3 ISP is now fully supported in DT, remove its instantiation
from C code.
Signed-off-by: Laurent Pinchart laurent.pinch...@ideasonboard.com
---
arch/arm/mach-omap2/devices.c | 53
---
Dave,
thanks for rebasing your branch
2015-07-15 23:28 GMT+02:00 Dave Gerlach d-gerl...@ti.com:
I tried to merge that branch into current v4.2-rc2, but I made quite a mess
out
of it. I'll try probably try cherry-picking next or will just wait for an
update
Yes, there are some additional
On Thu, Jul 16, 2015 at 01:52:54PM +0100, Mark Brown wrote:
On Tue, Jul 14, 2015 at 03:45:51PM +0100, Nariman Poushin wrote:
Please submit patches in the format covered in SubmittingPatches,
version information goes inside the [].
Add support for writing sequences of registers / patches
On Thu, Jun 25, 2015 at 5:13 PM, Grygorii Strashko
grygorii.stras...@ti.com wrote:
OMAP GPIO driver allowed to be built as loadable module, but it
doesn't set owner field in GPIO chip structure. As result,
module_get/put() API is not working and it's possible to unload
OMAP driver while in
* Grazvydas Ignotas nota...@gmail.com [150716 07:16]:
Hi,
On Thu, Jul 16, 2015 at 2:59 PM, Tony Lindgren t...@atomide.com wrote:
We've been moving all omap2+ based systems to boot in device tree only
mode for a few years now. Only omap3 has legacy booting support
remaining. Most omap3
* Paul Walmsley p...@pwsan.com [150716 07:09]:
On Wed, 15 Jul 2015, Tony Lindgren wrote:
* Paul Walmsley p...@pwsan.com [150715 22:58]:
Hello Markus
On Tue, 30 Jun 2015, SF Markus Elfring wrote:
From: Markus Elfring elfr...@users.sourceforge.net
Date: Tue, 30 Jun 2015
Laurent Pinchart wrote:
Hi Sakari,
On Thursday 16 July 2015 18:45:22 Sakari Ailus wrote:
Laurent Pinchart wrote:
The OMAP3 ISP is now fully supported in DT, remove its instantiation
from C code.
Signed-off-by: Laurent Pinchart laurent.pinch...@ideasonboard.com
---
Hi Sakari,
On Thursday 16 July 2015 18:45:22 Sakari Ailus wrote:
Laurent Pinchart wrote:
The OMAP3 ISP is now fully supported in DT, remove its instantiation
from C code.
Signed-off-by: Laurent Pinchart laurent.pinch...@ideasonboard.com
---
arch/arm/mach-omap2/devices.c | 53
here the full dmesg output, it contains a deadlock warning from lockdep
[0.00] Booting Linux on physical CPU 0x0
[0.00] Linux version 4.2.0-rc2-00284-gc11a8fb-dirty
(afenkart@sandwurm) (gcc version 4.9.2 (Buildroot
2014.11-00099-g8d0fd78-dirty) ) #1175 PREEMPT Thu Jul 16 17:06:34
Laurent Pinchart wrote:
Hello,
Now that all users of the OMAP3 ISP have switched to DT, this patch series
removes support for legacy platform data support in the omap3isp driver. It
also drops the OMAP3 ISP device instantiation board code that is now unused.
Patch 2/2 depends on 1/2. From
Hi Roger,
On Wed, Jul 15, 2015 at 6:26 AM, Roger Quadros rog...@ti.com wrote:
Hi Andrew,
On 13/07/15 22:14, Andrew Bresticker wrote:
Hi Roger,
On Wed, Jul 8, 2015 at 3:19 AM, Roger Quadros rog...@ti.com wrote:
Usage model:
---
- The OTG controller device is assumed to be the
On Thu, Jul 16, 2015 at 04:45:25PM +0100, Nariman Poushin wrote:
I will resend with a cover letter explaining the change from the previous
patch set if that is the right thing to do.
No, that's fine. If you want to fix something like that just reply to
the cover letter with the extra
On 07/16/2015 02:37 AM, Tony Lindgren wrote:
Here's this patch updated with the above removed.
Ok. I fixed up Mike's email in case he wants to look at it. Looks fine
to me though.
8 -
From: Tony Lindgren t...@atomide.com
Date: Thu, 16 Jul 2015 01:55:57 -0700
Subject: [PATCH]
On Thu, Jul 16, 2015 at 04:36:22PM +0100, Nariman Poushin wrote:
+
+ if (regs[i].delay_us)
+ udelay(regs[i].delay_us);
This is a bit funky. While Takashi is correct that we could be running
in a spinlock equally this will mean that we could end
Migrate omap2 driver to the new 'set-state' interface provided by
clockevents core, the earlier 'set-mode' interface is marked obsolete
now.
This also enables us to implement callbacks for new states of clockevent
devices, for example: ONESHOT_STOPPED.
Acked-by: Santosh Shilimkar
On Wed, Jul 08, 2015 at 01:19:32PM +0300, Roger Quadros wrote:
The OTG core will use struct otg_gadget_ops to
start/stop the gadget controller.
The main purpose of this interface is to avoid directly
calling usb_gadget_start/stop() from the OTG core as they
wouldn't be defined in the
On Wed, Jul 08, 2015 at 01:19:31PM +0300, Roger Quadros wrote:
The OTG core will use struct otg_hcd_ops to
add/remove the HCD controller.
The main purpose of this interface is to avoid directly
calling usb_add/remove_hcd() from the OTG core as they
wouldn't be defined in the built-in symbol
Migrate omap driver to the new 'set-state' interface provided by
clockevents core, the earlier 'set-mode' interface is marked obsolete
now.
This also enables us to implement callbacks for new states of clockevent
devices, for example: ONESHOT_STOPPED.
Acked-by: Santosh Shilimkar
Migrate omap timer32 driver to the new 'set-state' interface provided by
clockevents core, the earlier 'set-mode' interface is marked obsolete
now.
This also enables us to implement callbacks for new states of clockevent
devices, for example: ONESHOT_STOPPED.
Acked-by: Santosh Shilimkar
On Wed, Jul 08, 2015 at 01:19:30PM +0300, Roger Quadros wrote:
This is to prevent missing symbol build error if OTG is
enabled (built-in) and HCD core (CONFIG_USB) is module.
Signed-off-by: Roger Quadros rog...@ti.com
---
drivers/usb/common/usb-otg-fsm.c | 6 --
* Stephen Boyd sb...@codeaurora.org [150716 11:27]:
On 07/16/2015 02:37 AM, Tony Lindgren wrote:
Here's this patch updated with the above removed.
Ok. I fixed up Mike's email in case he wants to look at it. Looks fine to me
though.
OK thanks for updating Mike's email.
Regards,
Tony
* Russell King - ARM Linux li...@arm.linux.org.uk [150716 06:56]:
On Wed, Jul 15, 2015 at 11:48:54PM -0700, Tony Lindgren wrote:
Hi,
* Russell King rmk+ker...@arm.linux.org.uk [150715 10:50]:
Restore the OMAP4 barrier behaviour using the new implementation which
allows multiplatform
* Tony Lindgren t...@atomide.com [150716 09:28]:
* Grazvydas Ignotas nota...@gmail.com [150716 07:16]:
Hi,
On Thu, Jul 16, 2015 at 2:59 PM, Tony Lindgren t...@atomide.com wrote:
We've been moving all omap2+ based systems to boot in device tree only
mode for a few years now. Only
TPS65950(TWL4030) paired with OMAP3 is used in devices such as Beagleboard and
Gumstix Overo COMs. Its ADCs from 3 to 6 seem to be broken [1][2][3].
The ADC readings for these pins are stuck at near 0v for these two reasons:
- 3v1 bias regulator (vusb3v1) is off unless USB-otg is being
MADC[3:6] reads incorrect values without these two following changes:
- enable the 3v1 bias regulator for ADC[3:6]
- configure ADC[3:6] lines as input, not as USB
Signed-off-by: Adam YH Lee adam.yh@gmail.com
---
drivers/iio/adc/twl4030-madc.c | 14 ++
78 matches
Mail list logo
