[PATCH 0/3] ARM: OMAP2+: Optimize soc_is calls

The series implements optimizing soc_is calls for DRA7 and AM43XX family of SoCs. Originally the soc_is calls for DRA7 involved parsing device tree nodes and some repetitive string comparisons. Optimizing to store the result and use the result in the subsequent calls. The series is boot tested on

[PATCH 3/3] ARM: OMAP2: AM43XX: Modify optimize string comparisons in soc_is calls

Currently everytime soc_is calls are made, firstly device tree nodes are parsed and then string comparisons are made to determine the soc version. Optimizing it to be done one time and store the result. Use the stored value in all the subsequent checks for soc_is calls. Signed-off-by: Keerthy

[PATCH 2/3] ARM: dts: AM43x-epos-evm: Add AM438x compatible string for epos

Add AM438x compatible property to identify the SoCs on epos evms. Signed-off-by: Keerthy --- Documentation/devicetree/bindings/arm/omap/omap.txt | 5 - arch/arm/boot/dts/am43x-epos-evm.dts| 2 +- 2 files changed, 5 insertions(+), 2 deletions(-) diff --git

[PATCH 1/3] ARM: OMAP2: DRA7: Modify optimize string comparisons in soc_is calls

Currently everytime soc_is calls are made, firstly device tree nodes are parsed and then string comparisons are made to determine the soc version. Optimizing it to be done one time and store the result. Use the stored value in all the subsequent checks for soc_is calls. Signed-off-by: Keerthy

Re: [PATCH v4 07/13] usb: otg: add OTG core

On Mon, Aug 24, 2015 at 04:21:18PM +0300, Roger Quadros wrote: > The OTG core instantiates the OTG Finite State Machine > per OTG controller and manages starting/stopping the > host and gadget controllers based on the bus state. > > It provides APIs for the following tasks > > - Registering an

Re: [PATCH v4 13/13] usb: otg: Add dual-role device (DRD) support

On Mon, Aug 24, 2015 at 04:21:24PM +0300, Roger Quadros wrote: > DRD mode is a reduced functionality OTG mode. In this mode > we don't support SRP, HNP and dynamic role-swap. > > In DRD operation, the controller mode (Host or Peripheral) > is decided based on the ID pin status. Once a cable plug

Re: [PATCH v4 1/9] usb: dwc3: add dual-role support

Peter, On 06/09/15 05:02, Peter Chen wrote: > On Wed, Sep 02, 2015 at 05:24:16PM +0300, Roger Quadros wrote: >> Register with the USB OTG core. Since we don't support >> OTG yet we just work as a dual-role device even >> if device tree says "otg". >> >> + >> +static int dwc3_drd_init(struct dwc3

Re: [PATCH v4 07/13] usb: otg: add OTG core

On 07/09/15 04:23, Peter Chen wrote: > On Mon, Aug 24, 2015 at 04:21:18PM +0300, Roger Quadros wrote: >> + * This is used by the USB Host stack to register the Host controller >> + * to the OTG core. Host controller must not be started by the >> + * caller as it is left upto the OTG state machine

Re: [PATCH v4 07/13] usb: otg: add OTG core

On 07/09/15 10:40, Li Jun wrote: > On Mon, Aug 24, 2015 at 04:21:18PM +0300, Roger Quadros wrote: >> The OTG core instantiates the OTG Finite State Machine >> per OTG controller and manages starting/stopping the >> host and gadget controllers based on the bus state. >> >> It provides APIs for the

Re: [PATCH 0/7] gpio: omap: fixes and improvements

+Cc: Austin, Philipp On 08/26/2015 10:53 AM, Linus Walleij wrote: On Tue, Aug 18, 2015 at 1:10 PM, Grygorii Strashko wrote: This patch series contains set of trivial fixes and improvements, and also patches which fixes wrong APIs usage in atomic context as for -RT

Re: [PATCH v4 1/9] usb: dwc3: add dual-role support

-BEGIN PGP SIGNED MESSAGE- Hash: SHA256 On 04/09/15 12:06, Roger Quadros wrote: > Felipe, > > On 03/09/15 18:44, Felipe Balbi wrote: >> Hi, > >> On Thu, Sep 03, 2015 at 03:21:48PM +0300, Roger Quadros wrote: > + dwc->fsm->id = id; > + dwc->fsm->b_sess_vld = vbus; > +

Re: [PATCH v4 13/13] usb: otg: Add dual-role device (DRD) support

On 07/09/15 10:53, Li Jun wrote: > On Mon, Aug 24, 2015 at 04:21:24PM +0300, Roger Quadros wrote: >> DRD mode is a reduced functionality OTG mode. In this mode >> we don't support SRP, HNP and dynamic role-swap. >> >> In DRD operation, the controller mode (Host or Peripheral) >> is decided based

Re: Linux 4.2.0-rc5: am335x: musb warnings

On Mon, Aug 31, 2015 at 7:41 PM, Felipe Balbi wrote: > Hi, > > On Mon, Aug 31, 2015 at 11:41:59AM -0500, Felipe Balbi wrote: >> On Mon, Aug 31, 2015 at 03:11:58PM +0200, Yegor Yefremov wrote: >> > Hi Felipe, >> > >> > On Fri, Aug 7, 2015 at 12:57 PM, Yegor Yefremov >> >

Re: [PATCH v4 00/13] USB: OTG/DRD Core functionality

On 06/09/15 10:06, Peter Chen wrote: > On Mon, Aug 24, 2015 at 04:21:11PM +0300, Roger Quadros wrote: >> Hi, >> >> This series centralizes OTG/Dual-role functionality in the kernel. >> As of now I've got Dual-role functionality working pretty reliably on >> dra7-evm and am437x-gp-evm. >> >> DWC3

[net-next PATCH v3] drivers: net: cpsw: Add support to drive gpios for ethernet to be functional

In DRA72x EVM, by default slave 1 is connected to the onboard phy, but slave 2 pins are also muxed with video input module which is controlled by pcf857x gpio and currently to select slave 0 to connect to phy gpio hogging is used, but with omap2plus_defconfig the pcf857x gpio is built as module.

Re: [PATCH v4 04/13] otg-fsm: move usb_bus_start_enum into otg-fsm->ops

On 07/09/15 04:24, Peter Chen wrote: > On Mon, Aug 24, 2015 at 04:21:15PM +0300, Roger Quadros wrote: >> This is to prevent missing symbol build error if OTG is >> enabled (built-in) and HCD core (CONFIG_USB) is module. >> >> Signed-off-by: Roger Quadros >> Acked-by: Peter Chen

[PATCH] ARM: dts: omap3-igep: Move eth IRQ pinmux to IGEPv2 common dtsi

Only the IGEPv2 boards have a LAN9221i chip connected to the GPMC so the pinmux configuration for the GPIO connected to the IRQ line of the LAN chip should not be defined in the IGEP common dtsi but in the one common to the IGEPv2 boards. While there, use the OMAP3_CORE1_IOPAD() macro for the

Re: [PATCH] ARM: dts: omap3-igep: Move eth IRQ pinmux to IGEPv2 common dtsi

2015-09-07 18:24 GMT+02:00 Javier Martinez Canillas : > Only the IGEPv2 boards have a LAN9221i chip connected to the GPMC > so the pinmux configuration for the GPIO connected to the IRQ line > of the LAN chip should not be defined in the IGEP common dtsi but > in the one