On Thu, Jul 04, 2013 at 21:30:14, Mark Jackson wrote:
On 04/07/13 16:14, Mark Jackson wrote:
On 04/07/13 14:25, Mark Jackson wrote:
Our custom AM335x board has been booting just fine under 3.10.0-rc4.
I've just done a git pull to update to 3.10 (now that it's released)
and the board now
Hi Tony,
On Fri, Jul 05, 2013 at 17:29:59, Tony Lindgren wrote:
* Bedia, Vaibhav vaibhav.be...@ti.com [130705 01:17]:
I just checked the behavior on my AM335x-EVM. Current mainline boots fine
provided I don't use earlyprintk. The offending patch [1] in this case is
the one
On Fri, Jul 05, 2013 at 18:50:10, Bedia, Vaibhav wrote:
Hi Tony,
On Fri, Jul 05, 2013 at 17:29:59, Tony Lindgren wrote:
* Bedia, Vaibhav vaibhav.be...@ti.com [130705 01:17]:
I just checked the behavior on my AM335x-EVM. Current mainline boots fine
provided I don't use earlyprintk
(removing Anil's email-id since it's no longer valid)
On Sat, Apr 20, 2013 at 05:54:10, Kondratiuk, Taras wrote:
On 04/19/2013 07:21 PM, Nishanth Menon wrote:
On 14:55-20130419, Taras Kondratiuk wrote:
Using a voltage tolerance for doing DVFS is not a proper way.
It leads to a few issues:
Hi Kevin,
On Thu, Apr 11, 2013 at 19:45:33, Kevin Hilman wrote:
Kevin Hilman khil...@linaro.org writes:
Bedia, Vaibhav vaibhav.be...@ti.com writes:
Hi Sourav,
On Wed, Apr 10, 2013 at 15:13:44, Poddar, Sourav wrote:
[...]
Yes, had a look at that and found your situation similar
Hi Sourav, Kevin,
On Wed, Apr 10, 2013 at 11:37:28, Poddar, Sourav wrote:
Hi,
On Wednesday 10 April 2013 12:37 AM, Kevin Hilman wrote:
Sourav Poddarsourav.pod...@ti.com writes:
Hi Kevin,
On Friday 05 April 2013 11:10 PM, Kevin Hilman wrote:
Sourav Poddarsourav.pod...@ti.com writes:
Hi Sourav,
On Wed, Apr 10, 2013 at 15:13:44, Poddar, Sourav wrote:
[...]
Yes, had a look at that and found your situation similar to UART.
But how exactly this gets used, I mean I don't see any drivers/ in mainline
making use of this compatible string ti,am3352-ocmcram. ?
OCMC clock is
Hi Daniel,
On Wed, Apr 03, 2013 at 17:22:41, Daniel Mack wrote:
Hi Vaibhav,
On Mon, Dec 31, 2012 at 2:07 PM, Vaibhav Bedia vaibhav.be...@ti.com wrote:
AM335x supports various low power modes as documented
in section 8.1.4.3 of the AM335x TRM which is available
@
On Thu, Mar 07, 2013 at 18:43:27, Andreas Fenkart wrote:
This fixes JTAG support on am33xx.
Please refer to http://www.spinics.net/lists/linux-omap/msg87476.html
Regards,
Vaibhav
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On Mon, Feb 18, 2013 at 21:41:49, Kevin Hilman wrote:
[...]
By default these IPs don't have MSTANDBY asserted.
When you say by default, I guess you mean after reset (and/or context
loss), right?
Yes
When a low power transition happens, the peripheral power domain loses
context and
+Avinash
On Wed, Feb 20, 2013 at 18:06:24, Balbi, Felipe wrote:
Hi Paul, Tony,
how do you guys want to handle PWM's Time Base clocks which are enabled
via control module ?
They're controlled via offset 0x664 (pwmss_ctrl). Page 793 of AM33xx's
TRM has more information:
Avinash has
On Sat, Feb 16, 2013 at 11:18:36, Shilimkar, Santosh wrote:
[...]
For the duplicate ioremapping, I don't think there's any need to
do it if we get things right.
Note that if the ioremap matches a static map area there is no cost to
ioremap it multiple times.
Thats true though now
Hi,
On Fri, Feb 15, 2013 at 19:13:42, Shilimkar, Santosh wrote:
On Friday 15 February 2013 07:04 PM, Felipe Balbi wrote:
Hi,
On Fri, Feb 15, 2013 at 06:49:20PM +0530, Santosh Shilimkar wrote:
@@ -279,8 +259,6 @@ static void serial_omap_stop_tx(struct uart_port
*port)
On Fri, Feb 15, 2013 at 12:23:08, Balbi, Felipe wrote:
On Thu, Feb 14, 2013 at 02:22:47PM -0800, Tony Lindgren wrote:
* Paul Walmsley p...@pwsan.com [130214 12:51]:
Hi,
On Thu, 14 Feb 2013, Tony Lindgren wrote:
I don't think so as hwmod should only touch the sysconfig space
Hi,
On Fri, Feb 15, 2013 at 12:14:29, Balbi, Felipe wrote:
Hi,
On Thu, Feb 14, 2013 at 08:47:53PM +, Paul Walmsley wrote:
Hi,
On Thu, 14 Feb 2013, Tony Lindgren wrote:
I don't think so as hwmod should only touch the sysconfig space
when no driver has claimed it.
hwmod
Hi Kevin,
On Tue, Feb 12, 2013 at 05:03:23, Kevin Hilman wrote:
Vaibhav Bedia vaibhav.be...@ti.com writes:
TPTC0 needs to be idled and put to standby under SW control.
Please elaborate about why (e.g. HW support not available, HW support
broken/buggy, etc.) since these blocks are not
Hi Kevin,
On Tue, Feb 12, 2013 at 06:57:50, Kevin Hilman wrote:
[...]
+
+void (*am33xx_do_wfi_sram)(void);
static?
Will fix.
[...]
+
+ /*
+* By default the following IPs do not have MSTANDBY asserted
+* which is necessary for PER domain transition. If the drivers
+
Hi Paul,
On Fri, Feb 08, 2013 at 19:47:04, Paul Walmsley wrote:
Hi Vaibhav,
a comment on this one:
On Tue, 29 Jan 2013, Vaibhav Bedia wrote:
Add minimal APIs for writing to the IPC and the M3_TXEV registers
in the Control module. These will be used in a subsequent patch which
adds
On Thu, Feb 07, 2013 at 03:30:56, Paul Walmsley wrote:
Hi Vaibhav,
On Thu, 24 Jan 2013, Bedia, Vaibhav wrote:
I could not track down U-Boot that you were using
It's posted now at:
http://www.pwsan.com/omap/bootloaders/beaglebone/u-boot/2011.09-9-gcf6e04d__20120803171543/
Care
Hi Jon,
On Wed, Jan 30, 2013 at 22:34:27, Hunter, Jon wrote:
Currently on boot, when displaying the name of the gptimer used for
clockevents and clocksource timers, the timer ID is shown. However,
when booting with device-tree, the timer ID is not used to select a
gptimer but a timer
Hi Jon,
On Wed, Jan 30, 2013 at 22:34:26, Hunter, Jon wrote:
This series consists mainly of clean-ups for clockevents and
clocksource timers on OMAP2+ devices. The most significant change
in functionality comes from the 5th patch which is changing the
selection of the clocksource timer for
Hi Jon,
On Wed, Jan 30, 2013 at 22:34:31, Hunter, Jon wrote:
When booting with device-tree for OMAP3 and AM335x devices and a gptimer
is used as the clocksource (which is always the case for AM335x), a
gptimer located in a power domain that is not always-on is selected.
Ideally we should use
On Fri, Feb 01, 2013 at 14:23:43, Hunter, Jon wrote:
[...]
+/* Timer name needs to be big enough to store a string of timerXX */
+static char timer_name[10];
+
Why not move this inside omap_dm_timer_init_one()?
In the non-DT case, the name member of the clocksource/event struct
On Fri, Feb 01, 2013 at 14:55:31, Hunter, Jon wrote:
[...]
I don't see this as being DT specific. It is more of a policy change to
ensure a wake-up domain timer is used for clocksource when we are using
gptimers for both clocksource and clockevents. It was your patch for
AM335x that
On Wed, Jan 30, 2013 at 23:16:34, Hunter, Jon wrote:
Ok fair enough. By the way, I posted a patch today [1] that will use the
hwmod name as the clockevent timer name. Care to try on top of that
patch and then we can eliminate the sprintf.
Thanks. Will try it out later today.
Regards,
On Wed, Jan 30, 2013 at 23:19:34, Hunter, Jon wrote:
By the way, this need to be applied on top of the fix I sent yesterday
to pass the property.
Ok. Thanks for pointing this out.
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On Wed, Jan 30, 2013 at 16:38:50, Pantelis Antoniou wrote:
[...]
TBH I haven't found a simple way to print out the silicon revision number.
Anyone on the list know a quick and dirty method?
You can dump the DEVICE_ID register @ 0x44e10600.
Bits 31:28 should be 0 for PG1.0 and 1 for PG2.0.
On Wed, Jan 30, 2013 at 18:14:30, Pantelis Antoniou wrote:
Hi Vaibhav,
On Jan 30, 2013, at 2:38 PM, Bedia, Vaibhav wrote:
On Wed, Jan 30, 2013 at 16:38:50, Pantelis Antoniou wrote:
[...]
TBH I haven't found a simple way to print out the silicon revision number.
Anyone on the list
Hi Antoniou,
On Wed, Jan 30, 2013 at 19:07:19, Pantelis Antoniou wrote:
Hi Vaibhav,
On Jan 30, 2013, at 3:29 PM, Bedia, Vaibhav wrote:
On Wed, Jan 30, 2013 at 18:14:30, Pantelis Antoniou wrote:
Hi Vaibhav,
On Jan 30, 2013, at 2:38 PM, Bedia, Vaibhav wrote:
On Wed, Jan 30, 2013
On Tue, Jan 29, 2013 at 13:50:44, Peter Korsgaard wrote:
Vaibhav == Vaibhav Bedia vaibhav.be...@ti.com writes:
Vaibhav Since AM33XX supports only DT-boot, this is needed
Vaibhav for the appropriate device nodes to be created.
Vaibhav Note: OCMC RAM is part of the PER power domain and
On Tue, Jan 29, 2013 at 16:57:04, Shilimkar, Santosh wrote:
Vaibhav,
On Tuesday 29 January 2013 04:44 PM, Vaibhav Bedia wrote:
Hi,
The following patches were earlier posted as part the AM33XX
suspend-resume support series [1]. Based on the suggestion
from Santosh Shilimkar
On Wed, Jan 30, 2013 at 01:53:11, Hunter, Jon wrote:
Commit 9725f44 (ARM: OMAP: Add DT support for timer driver) added
device-tree support for selecting a clockevent timer by property.
However, the code is currently ignoring the property passed and
selecting the first available timer found.
On Fri, Jan 25, 2013 at 22:29:43, Tony Lindgren wrote:
* Bedia, Vaibhav vaibhav.be...@ti.com [130123 06:35]:
Hi Tony,
On Tue, Jan 22, 2013 at 23:53:32, Tony Lindgren wrote:
[...]
But I should get *something* from the kernel before it starts trying to
access the rootfs
Hi Paul,
On Tue, Jan 22, 2013 at 07:54:44, Paul Walmsley wrote:
Hi guys,
Regarding the AM33xx test failures with appended DTBs, it would be very
helpful if especially the TI people could try reproducing the problem.
Otherwise it's going to cause problems with merging any new AM33xx
Hi Tony,
On Tue, Jan 22, 2013 at 23:53:32, Tony Lindgren wrote:
[...]
But I should get *something* from the kernel before it starts trying to
access the rootfs ?
Here's something Kevin fixed but did not send it out before going to
a vacation. Can you give it a try with earlyprintk
Hi,
On Tue, Jan 22, 2013 at 14:25:13, Peter Korsgaard wrote:
Paul == Paul Walmsley p...@pwsan.com writes:
Paul Hi guys,
Paul Regarding the AM33xx test failures with appended DTBs, it would
Paul be very helpful if especially the TI people could try reproducing
Paul the problem.
On Tue, Jan 22, 2013 at 15:45:08, Mark Jackson wrote:
On 22/01/13 02:24, Paul Walmsley wrote:
Hi guys,
Regarding the AM33xx test failures with appended DTBs, it would be very
helpful if especially the TI people could try reproducing the problem.
My non-working setup (I'm using a
Hi Peter,
On Mon, Jan 21, 2013 at 14:33:20, Peter Korsgaard wrote:
V == Bedia, Vaibhav vaibhav.be...@ti.com writes:
Hi,
Vaibhav Bedia (9):
ARM: OMAP2+: AM33XX: CM: Get rid of unncessary header inclusions
ARM: OMAP2+: AM33XX: CM/PRM: Use __ASSEMBLER__ macros in header files
ARM
Hi Peter,
On Thu, Jan 17, 2013 at 19:57:20, Peter Korsgaard wrote:
V == Vaibhav Bedia vaibhav.be...@ti.com writes:
Hi,
V +static void am33xx_pm_firmware_cb(const struct firmware *fw, void
*context)
V +{
V + struct wkup_m3_context *wkup_m3_context = context;
V + struct
Hi Paul, Benoit,
On Fri, Jan 18, 2013 at 12:49:20, Bedia, Vaibhav wrote:
Hi,
The following patches were earlier posted as part the AM33XX
suspend-resume support series [1]. Based on the suggestion
from Santosh Shilimkar santosh.shilim...@ti.com i have split
out the changes which update
On Fri, Jan 18, 2013 at 17:58:49, Sergei Shtylyov wrote:
Hello.
On 18-01-2013 11:19, Vaibhav Bedia wrote:
Third Party Transfer Controller (TPTC0) needs to be idled and
put to standby under SW control. Add the appropriate flags in
the TPTC0 hwmod entry.
Signed-off-by: Vaibhav Bedia
On Fri, Jan 18, 2013 at 18:01:01, Sergei Shtylyov wrote:
On 18-01-2013 11:19, Vaibhav Bedia wrote:
Some of the included header files are not needed so
remove them.
Signed-off-by: Vaibhav Bedia vaibhav.be...@ti.com
Acked-by: Santosh Shilimkar santosh.shilim...@ti.com
---
Change
Hi Jon,
On Fri, Jan 18, 2013 at 00:10:40, Hunter, Jon wrote:
On 12/31/2012 07:07 AM, Vaibhav Bedia wrote:
The current OMAP timer code registers two timers -
one as clocksource and one as clockevent.
AM33XX has only one usable timer in the WKUP domain
so one of the timers needs
On Fri, Jan 18, 2013 at 10:55:43, Shilimkar, Santosh wrote:
On Friday 18 January 2013 12:15 AM, Jon Hunter wrote:
On 01/10/2013 10:37 PM, Bedia, Vaibhav wrote:
On Tue, Jan 08, 2013 at 20:45:10, Shilimkar, Santosh wrote:
On Monday 31 December 2012 06:37 PM, Vaibhav Bedia wrote
On Tue, Jan 08, 2013 at 20:45:10, Shilimkar, Santosh wrote:
On Monday 31 December 2012 06:37 PM, Vaibhav Bedia wrote:
The current OMAP timer code registers two timers -
one as clocksource and one as clockevent.
AM33XX has only one usable timer in the WKUP domain
so one of the timers needs
On Wed, Jan 09, 2013 at 13:01:03, Shilimkar, Santosh wrote:
On Wednesday 09 January 2013 11:08 AM, Bedia, Vaibhav wrote:
On Tue, Jan 08, 2013 at 20:51:08, Shilimkar, Santosh wrote:
On Monday 31 December 2012 06:37 PM, Vaibhav Bedia wrote:
Add minimal APIs for writing to the IPC
Hi Loic,
On Fri, Dec 21, 2012 at 16:23:24, Loic PALLARDY wrote:
On 12/21/2012 11:49 AM, Bedia, Vaibhav wrote:
On Fri, Dec 21, 2012 at 14:24:26, Loic PALLARDY wrote:
I have a few patches which are dependent on this patch series.
Could you please keep me in cc for the future versions
On Wed, Jan 09, 2013 at 17:59:39, Loic PALLARDY wrote:
Hi Vaibhav,
On 01/09/2013 01:11 PM, Bedia, Vaibhav wrote:
Hi Loic,
On Fri, Dec 21, 2012 at 16:23:24, Loic PALLARDY wrote:
On 12/21/2012 11:49 AM, Bedia, Vaibhav wrote:
On Fri, Dec 21, 2012 at 14:24:26, Loic PALLARDY wrote
On Tue, Jan 08, 2013 at 19:23:44, Shilimkar, Santosh wrote:
On Monday 31 December 2012 06:36 PM, Vaibhav Bedia wrote:
Mailbox IP on AM33XX is the same as that present in OMAP4.
The single instance of Mailbox IP on AM33XX contains
8 sub-modules and facilitates communication between MPU,
On Tue, Jan 08, 2013 at 19:26:51, Shilimkar, Santosh wrote:
On Monday 31 December 2012 06:36 PM, Vaibhav Bedia wrote:
On AM33XX, the mailbox module between the MPU and the
WKUP-M3 co-processor facilitates a one-way communication.
MPU uses the assigned mailbox sub-module to issue the
On Tue, Jan 08, 2013 at 19:34:41, Shilimkar, Santosh wrote:
[...]
drivers/memory/emif.c |2 +-
drivers/memory/emif.h | 589
---
include/linux/ti_emif.h | 589
+++
You are just moving
On Tue, Jan 08, 2013 at 20:31:44, Shilimkar, Santosh wrote:
[...]
+#endif /* ASSEMBLER */
+
Drop that extra line.
Ok.
#endif
diff --git a/arch/arm/mach-omap2/prm33xx.h b/arch/arm/mach-omap2/prm33xx.h
index 3f25c56..2f2eaa0 100644
--- a/arch/arm/mach-omap2/prm33xx.h
+++
On Tue, Jan 08, 2013 at 20:47:28, Shilimkar, Santosh wrote:
On Monday 31 December 2012 06:37 PM, Vaibhav Bedia wrote:
AM33XX has two timers (DTIMER0/1) in the WKUP domain.
On GP devices the source of DMTIMER0 is fixed to an
inaccurate internal 32k RC oscillator and this makes
the DMTIMER0
Hi Santosh,
On Tue, Jan 08, 2013 at 21:01:51, Shilimkar, Santosh wrote:
Vaibhav,
On Monday 31 December 2012 06:36 PM, Vaibhav Bedia wrote:
Hi,
This is the second version of the patch series for adding suspend-resume
support for AM33XX. Based on the feedback received on the previous
On Tue, Jan 08, 2013 at 20:52:37, Shilimkar, Santosh wrote:
On Monday 31 December 2012 06:37 PM, Vaibhav Bedia wrote:
PM services on AM33XX depend on mailbox for communication
with WKUP-M3 core so ensure that the right config options
are selected. Thanks to Kevin Hilman
On Tue, Jan 08, 2013 at 20:51:08, Shilimkar, Santosh wrote:
On Monday 31 December 2012 06:37 PM, Vaibhav Bedia wrote:
Add minimal APIs for writing to the IPC and the M3_TXEV registers
in the Control module. These will be used in a subsequent patch which
adds suspend-resume support for
On Tue, Jan 08, 2013 at 20:35:39, Shilimkar, Santosh wrote:
On Monday 31 December 2012 06:37 PM, Vaibhav Bedia wrote:
TPTC0 needs to be idled and put to standby under SW control.
Add the appropriate flags in the TPTC0 hwmod entry.
Can you please expand TPTC0 in chane log.
Third Party
Hi Tony,
On Tue, Jan 01, 2013 at 23:55:06, Tony Lindgren wrote:
[...]
mbox_write_reg(bit, p-irqdisable);
The cpu_is/soc_is macros are no longer available to drivers
with 8d91a42e (Merge tag 'omap-late-cleanups'...). So you'll
have to pass whatever flags the driver needs in
Hi Paul,
A minor comment below.
On Sun, Dec 09, 2012 at 23:23:01, Paul Walmsley wrote:
[...]
+
+ pr_debug(powerdomain: convert pwrst (%0x,%0x) to fpwrst %0x\n,
+ pwrst, logic, *fpwrst);
+
This function alone does not print the powerdomain name. Can you add that
in the final
Hi Paul,
On Mon, Dec 10, 2012 at 01:33:28, Paul Walmsley wrote:
There's no need to determine the current power state for powerdomains
that must be on while the kernel is running. We mark these
powerdomains with a new flag, PWRDM_ACTIVE_WITH_KERNEL. Any
powerdomain marked with that flag is
On Wed, Dec 26, 2012 at 11:51:46, Bedia, Vaibhav wrote:
Hi Paul,
On Mon, Dec 10, 2012 at 01:33:28, Paul Walmsley wrote:
There's no need to determine the current power state for powerdomains
that must be on while the kernel is running. We mark these
powerdomains with a new flag
Hi Paul,
On Sun, Dec 09, 2012 at 06:53:43, Paul Walmsley wrote:
The atomic usecounts seem to be confusing, and are no longer needed
since the operations that they are attached to really should take
place under lock. Replace the atomic counters with simple integers,
protected by the enclosing
On Tue, Dec 18, 2012 at 18:40:08, Loic Pallardy wrote:
TX: replace spin by mutex
RX: replace spin_lock_irq by spin_lock_irqsave
Can you please add a short note on why this is being done?
Regards,
Vaibhav
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On Tue, Dec 18, 2012 at 18:40:07, Loic Pallardy wrote:
Current message type is a u32 to fit HW fifo format.
This should be extended to support any message exchanges
and type of mailbox.
Propose structure owns the original u32 and an optional
pointer on additional data.
Signed-off-by: Loic
On Fri, Dec 21, 2012 at 14:24:26, Loic PALLARDY wrote:
On 12/18/2012 05:59 PM, Tony Lindgren wrote:
* Loic Pallardyloic.pallardy-...@stericsson.com [121218 05:15]:
Signed-off-by: Omar Ramirez Lunaomar.l...@linaro.org
AFAIK the first two patches should have:
From: Omar Ramirez
Hi Peter, Tony
On Wed, Dec 19, 2012 at 15:20:09, Ujfalusi, Peter wrote:
prom_add_property() has been renamed to of_add_property()
This patch fixes the following comilation error:
arch/arm/mach-omap2/timer.c: In function ‘omap_get_timer_dt’:
arch/arm/mach-omap2/timer.c:178:3: error: implicit
Hi,
Current mainline on Beaglebone using the omap2plus_defconfig + 3 build fixes
is triggering a BUG()
[0.00] Booting Linux on physical CPU 0x0
[0.00] Linux version 3.7.0-01415-g55bc169 (a0393953@psplinux063) (gcc
version 4.5.3 20110311 (prerelease) (GCC) ) #1 SMP Wed Dec 19
On Thu, Dec 20, 2012 at 01:53:42, Stephen Boyd wrote:
On 12/19/12 08:53, Paul Walmsley wrote:
On Wed, 19 Dec 2012, Bedia, Vaibhav wrote:
Current mainline on Beaglebone using the omap2plus_defconfig + 3 build
fixes
is triggering a BUG()
...
[0.109688] Security Framework
On Thu, Dec 20, 2012 at 11:55:24, Stephen Boyd wrote:
On 12/19/2012 8:48 PM, Bedia, Vaibhav wrote:
I tried out 3 variants of AM335x boards - 2 of these (BeagleBone and EVM)
have DDR2
and 1 has DDR3 (EVM-SK). The BUG is triggered on all of these at the same
point.
With Stephen's
On Wed, Dec 19, 2012 at 12:14:58, Bedia, Vaibhav wrote:
Merge commit 752451f (Merge branch 'i2c-embedded/for-next' of
git://git.pengutronix.de/git/wsa/linux)
resulted in a build breakage for OMAP
...
arch/arm/mach-omap2/i2c.c: In function
'omap_pm_set_max_mpu_wakeup_lat_compat':
arch
Hi Benoit,
On Mon, Nov 26, 2012 at 14:32:59, Cousson, Benoit wrote:
Hi Vaibhav,
On 11/26/2012 06:19 AM, Bedia, Vaibhav wrote:
On Fri, Nov 23, 2012 at 16:36:06, Philip, Avinash wrote:
On Tue, Nov 20, 2012 at 10:33:44, Philip, Avinash wrote:
As part of PWM subsystem integration, PWM
On Fri, Nov 23, 2012 at 16:36:06, Philip, Avinash wrote:
On Tue, Nov 20, 2012 at 10:33:44, Philip, Avinash wrote:
As part of PWM subsystem integration, PWM subsystem are sharing
resources like clock across submodules (ECAP, EQEP EHRPWM).
To handle resource sharing IP integration
1.
On Thu, Nov 22, 2012 at 11:17:02, AnilKumar, Chimata wrote:
+Andrew Morton
On Tue, Nov 20, 2012 at 15:18:43, AnilKumar, Chimata wrote:
From: Colin Foe-Parker colin.foepar...@logicpd.com
Add system power off control to rtc driver which is the in-charge
of controlling the BeagleBone
On Wed, Nov 07, 2012 at 22:45:20, Kevin Hilman wrote:
[...]
We could perhaps add a couple of APIs to check the SYSC values when coming
out of suspend and take appropriate action if the sysc cache does not match?
Yes, for IPs with only SW support and no drivers, we may need something
Hi Santosh,
On Tue, Nov 06, 2012 at 20:05:40, Bedia, Vaibhav wrote:
Hi Santosh,
On Tue, Nov 06, 2012 at 03:29:22, Shilimkar, Santosh wrote:
[...]
IMO, assuming that idle will not be useful from the begining is leading
down the path to poor design choices that will be much more
Hi Kevin,
On Wed, Nov 07, 2012 at 06:36:06, Kevin Hilman wrote:
Bedia, Vaibhav vaibhav.be...@ti.com writes:
On Mon, Nov 05, 2012 at 23:10:27, Kevin Hilman wrote:
[...]
Also, if there are drivers for these devices, won't this interfere?
Hmm, I can think of the following
Hi Jon,
On Tue, Nov 06, 2012 at 02:50:50, Hunter, Jon wrote:
[...]
Why is this? How is the dmtimer TIOCP_CFG register configured on AM33xx?
Is it using smart-idle?
Yes, it is set to smart-idle with wakeup capable mode. (this needs a fixup
since this timer is not wakeup capable) but
On Tue, Nov 06, 2012 at 13:42:21, N, Mugunthan V wrote:
[...]
+struct omap_hwmod_addr_space am33xx_mdio_addr_space[] = {
+ {
+ .pa_start = 0x4A101000,
+ .pa_end = 0x4A101000 + SZ_256 - 1,
+ .flags = ADDR_MAP_ON_INIT,
Based on the
On Mon, Nov 05, 2012 at 14:42:24, Philip, Avinash wrote:
[...]
+
+static struct omap_hwmod_ocp_if am33xx_epwmss0__ecap0 = {
+ .master = am33xx_epwmss0_hwmod,
+ .slave = am33xx_ecap0_hwmod,
+ .clk= l4ls_gclk,
+ .addr =
On Tue, Nov 06, 2012 at 14:59:45, Hiremath, Vaibhav wrote:
[...]
Ok I checked this one. The change I made was indirectly fixing another
issue with the AM33xx hwmod data. am33xx_cpgmac0_addr_space[] has two
entries and the SYSC register is part of the second entry. The function
Hi Kevin,
On Mon, Nov 05, 2012 at 23:10:27, Kevin Hilman wrote:
[...]
First, some general comments. This is a big patch and probably should
be broken up a bit. I suspect it could be broken up a bit, maybe into
at least:
- EMIF interface
- SCM interface, new APIs
- assembly/OCM code
-
Hi Santosh, Kevin
On Tue, Nov 06, 2012 at 03:22:16, Shilimkar, Santosh wrote:
[...]
+
+/*
+ * This a subset of registers defined in drivers/memory/emif.h
+ * Move that to include/linux/?
+ */
I'd probably suggest just moving the register definitions you
need into plat/emif_plat.h
On Tue, Nov 06, 2012 at 18:08:36, Shilimkar, Santosh wrote:
On Tuesday 06 November 2012 06:29 AM, Bedia, Vaibhav wrote:
Hi Santosh, Kevin
On Tue, Nov 06, 2012 at 03:22:16, Shilimkar, Santosh wrote:
[...]
+
+/*
+ * This a subset of registers defined in drivers/memory/emif.h
On Tue, Nov 06, 2012 at 18:38:08, Hiremath, Vaibhav wrote:
On Tue, Nov 06, 2012 at 15:39:14, Bedia, Vaibhav wrote:
On Tue, Nov 06, 2012 at 14:59:45, Hiremath, Vaibhav wrote:
[...]
Ok I checked this one. The change I made was indirectly fixing another
issue with the AM33xx hwmod
Hi Benoit,
On Tue, Nov 06, 2012 at 19:20:46, Cousson, Benoit wrote:
Hi Vaibhav Vaibhav,
On 11/06/2012 02:46 PM, Bedia, Vaibhav wrote:
On Tue, Nov 06, 2012 at 18:38:08, Hiremath, Vaibhav wrote:
On Tue, Nov 06, 2012 at 15:39:14, Bedia, Vaibhav wrote:
On Tue, Nov 06, 2012 at 14:59:45
Hi Kevin,
On Mon, Nov 05, 2012 at 23:33:07, Kevin Hilman wrote:
Bedia, Vaibhav vaibhav.be...@ti.com writes:
On Sat, Nov 03, 2012 at 18:34:30, Kevin Hilman wrote:
[...]
Doesn't this also mean that you won't get timer wakeups
in idle? Or are you keeping the domain where
Hi Santosh,
On Tue, Nov 06, 2012 at 03:29:22, Shilimkar, Santosh wrote:
[...]
IMO, assuming that idle will not be useful from the begining is leading
down the path to poor design choices that will be much more difficult to
fixup down the road in order to add idle support later. We need
On Sun, Nov 04, 2012 at 20:54:17, Bedia, Vaibhav wrote:
On Sat, Nov 03, 2012 at 21:48:48, Shilimkar, Santosh wrote:
On Friday 02 November 2012 06:02 PM, Vaibhav Bedia wrote:
The first entry for CPGMAC0 should be ADDR_MAP_ON_INIT
instead of ADDR_TYPE_RT to ensure the omap hwmod code
On Mon, Nov 05, 2012 at 12:53:59, Hiremath, Vaibhav wrote:
Can you cut-n-paste the ocmcram hwmod entry outside of #if and resubmit
it again?
Ok. Will do that in the next version.
Regards,
Vaibhav
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On Mon, Nov 05, 2012 at 20:23:11, Shilimkar, Santosh wrote:
[...]
On OMAP the OCMC RAM is always clocked and doesn't need any special
clock enable. CM_L3_2_OCMC_RAM_CLKCTRL module mode field is read only.
Isn't it same on AMXX ?
On AM33xx, OCMC RAM is in PER domain and the corresponding
On Mon, Nov 05, 2012 at 12:28:36, Hiremath, Vaibhav wrote:
[...]
- u32 mask = 1 shift;
-
- /* Check the current status to avoid de-asserting the line twice */
- if (am33xx_prm_is_hardreset_asserted(shift, inst, rstctrl_offs) == 0)
- return -EEXIST;
Any specific
On Tue, Nov 06, 2012 at 03:15:10, Shilimkar, Santosh wrote:
On Tuesday 06 November 2012 02:49 AM, Santosh Shilimkar wrote:
On Tuesday 06 November 2012 12:59 AM, Kevin Hilman wrote:
Bedia, Vaibhav vaibhav.be...@ti.com writes:
On Mon, Nov 05, 2012 at 20:23:11, Shilimkar, Santosh wrote
On Mon, Nov 05, 2012 at 15:12:27, AnilKumar, Chimata wrote:
[...]
+#define SHUTDOWN_TIME_SEC2
+#define SECS_IN_MIN 60
+#define WAIT_AFTER (SECS_IN_MIN - SHUTDOWN_TIME_SEC)
+#define WAIT_TIME_MS (SHUTDOWN_TIME_SEC * 1000)
+
On Mon, Nov 05, 2012 at 14:42:22, Philip, Avinash wrote:
[...]
+pwmss0: pwmss@4830 {
+ compatible = ti,am33xx-pwmss;
+ reg = 0x4830 0x10
+ 0x48300100 0x80
+ 0x48300180 0x80
+ 0x48300200 0x80;
Do you really need the 4 address ranges here?
On Mon, Nov 05, 2012 at 14:42:29, Philip, Avinash wrote:
[...]
+ am33xx_pinmux: pinmux@44e10800 {
+ ecap0_pins: backlight_pins {
+ pinctrl-single,pins =
+ 0x164 0x0 /*
eCAP0_in_PWM0_out.eCAP0_in_PWM0_out MODE0 */
+
On Mon, Nov 05, 2012 at 14:42:27, Philip, Avinash wrote:
[...]
+ /* Some platforms require explicit tbclk gating */
+ if (of_property_read_bool(pdev-dev.of_node, tbclkgating)) {
+ pc-tbclk = clk_get(pdev-dev, tbclk);
+ if (IS_ERR(pc-tbclk)) {
+
On Mon, Nov 05, 2012 at 14:42:26, Philip, Avinash wrote:
[...]
+#include linux/of_device.h
+#include linux/pinctrl/consumer.h
Pinctrl changes should be separate patch. Morevoer, you don't mention
that you making this change.
+
+#include tipwmss.h
/* EHRPWM registers and bits
On Tue, Nov 06, 2012 at 11:36:20, Hiremath, Vaibhav wrote:
[...]
The code is checking whether the line is already de-asserted (== 0), so I am
not sure how this will change if hardreset line is asserted during bootup.
You are right. I just checked the behavior since I recall seeing something
Hi Jon,
On Tue, Nov 06, 2012 at 02:34:05, Hunter, Jon wrote:
[...]
static struct clock_event_device clockevent_gpt = {
.name = gp_timer,
.features = CLOCK_EVT_FEAT_PERIODIC | CLOCK_EVT_FEAT_ONESHOT,
@@ -142,6 +171,8 @@ static struct clock_event_device
Hi Santosh,
On Sat, Nov 03, 2012 at 21:22:04, Shilimkar, Santosh wrote:
On Friday 02 November 2012 06:02 PM, Vaibhav Bedia wrote:
From: Vaibhav Hiremath hvaib...@ti.com
The current OMAP timer code registers two timers -
one as clocksource and one as clockevent.
Actually OMAP also uses
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