4831.gpio: Unbalanced pm_runtime_enable!
I have no objection to the patch itself.
But I curious, How have you got this error output? Was it simulated?
Let's fix the issue by adding the missing pm_runtime_put() on error.
Cc: Grygorii Strashko <grygorii.stras...@ti.com>
Cc: Javier Ma
On 08/30/2015 12:33 AM, Sergei Shtylyov wrote:
> Hello.
>
> On 8/28/2015 9:50 PM, Tony Lindgren wrote:
>
>> The interrupt handler may not be available when smsc911x probes if the
>> interrupt handler is a GPIO controller for example. Let's fix that
>> by adding handling for -EPROBE_DEFER.
>
>>
On 08/31/2015 05:11 PM, Tony Lindgren wrote:
> * Grygorii Strashko <grygorii.stras...@ti.com> [150831 02:07]:
>> Hi Tony,
>>
>> On 08/28/2015 09:44 PM, Tony Lindgren wrote:
>>> Currently we gpio-omap breaks if gpiochip_add() returns -EPROBE_DEFER:
>>>
On 08/28/2015 12:24 PM, Keerthy wrote:
On Thursday 27 August 2015 10:36 PM, Grygorii Strashko wrote:
On 08/27/2015 07:38 PM, Tony Lindgren wrote:
* Grygorii Strashko grygorii.stras...@ti.com [150827 06:42]:
Hi Tony,
On 08/26/2015 09:10 PM, Tony Lindgren wrote:
* Grygorii Strashko
-by: Keerthy j-keer...@ti.com
Signed-off-by: Grygorii Strashko grygorii.stras...@ti.com
---
Changes in v2:
- implementation changed: added additional check for BUS_NOTIFY_BIND_DRIVER
instead of removing omap_device_late_init.
Link on v1:
http://www.spinics.net/lists/arm-kernel/msg441594.html
arch
Hi Tony,
On 08/26/2015 09:10 PM, Tony Lindgren wrote:
* Grygorii Strashko grygorii.stras...@ti.com [150826 11:01]:
Now Kernel fails to boot 50% of times (form build to build) with
RT-patchset applied due to the following race - on late boot
stages deferred_probe_work_func races
controller
functionality and its INT line is connected to dra7 GPIO6.11 pin.
Cc: Tomi Valkeinen tomi.valkei...@ti.com
Signed-off-by: Grygorii Strashko grygorii.stras...@ti.com
---
arch/arm/boot/dts/dra7-evm.dts | 11 +++
1 file changed, 11 insertions(+)
diff --git a/arch/arm/boot/dts/dra7
This series enables support for leds and gpio-keys which
is available on dra7-evm. It also adds pcf8575 gpio expander (i2c1 addr 20)
Grygorii Strashko (3):
ARM: dts: dra7-evm: add pcf8575 gpio expander (i2c1 addr 20)
ARM: dts: dra7-evm: add gpio leds support
ARM: dts: dra7-evm: add gpio key
dra7-evm has 2 gpio keys wired through TS_LCD_GPIO3, TS_LCD_GPIO4
which in turn connected to PCF8575 GPIO pcf_lcd: gpio@20 expander
pins 2 and 3.
Signed-off-by: Grygorii Strashko grygorii.stras...@ti.com
---
arch/arm/boot/dts/dra7-evm.dts | 20
1 file changed, 20 insertions
dra7-evm has 4 user gpio leds connected to PCF8575 GPIO pcf_lcd:
gpio@20 expander pins [4,5,6,7], so add corresponding DT nodes.
Do not enable any triggers by default as not all of them are proved
to work on -RT.
Signed-off-by: Grygorii Strashko grygorii.stras...@ti.com
---
arch/arm/boot/dts
On 08/27/2015 07:38 PM, Tony Lindgren wrote:
* Grygorii Strashko grygorii.stras...@ti.com [150827 06:42]:
Hi Tony,
On 08/26/2015 09:10 PM, Tony Lindgren wrote:
* Grygorii Strashko grygorii.stras...@ti.com [150826 11:01]:
Now Kernel fails to boot 50% of times (form build to build) with
RT
there should be no need to explicitly
disable the devices.
Cc: Tero Kristo t-kri...@ti.com
Cc: Keerthy j-keer...@ti.com
Signed-off-by: Grygorii Strashko grygorii.stras...@ti.com
---
Hi Tony,
Keerthy has reported that he can observe the same issue on -next.
Most probably it's related to new feature
Hi Mark,
On 08/19/2015 09:11 PM, Mark Brown wrote:
On Tue, Aug 18, 2015 at 11:23:54AM +0530, Kishon Vijay Abraham I wrote:
On Friday 14 August 2015 11:30 PM, Mark Brown wrote:
On Mon, Jul 27, 2015 at 04:54:09PM +0530, Kishon Vijay Abraham I wrote:
is moved as a child node of syscon, vsel_reg
On 08/21/2015 11:13 AM, Tony Lindgren wrote:
* Tony Lindgren t...@atomide.com [150818 23:42]:
Hi,
* Grygorii Strashko grygorii.stras...@ti.com [150818 04:14]:
Hi,
This patch series contains set of trivial fixes and improvements, and also
patches which fixes wrong APIs usage in atomic
/unprepare in OMAP GPIO
omap_gpio_probe/omap_gpio_remove. Also, while here, ensure that
debounce functionality is disabled if clk_get() failed,
because otherwise kernel will carsh in omap2_set_gpio_debounce().
Reported-by: Sebastian Andrzej Siewior bige...@linutronix.de
Signed-off-by: Grygorii
and
require accessing ext. devices (I2C).
Idea of such kind reworking was also discussed in [2].
[1] http://www.spinics.net/lists/linux-omap/msg120665.html
[2] http://www.spinics.net/lists/linux-omap/msg119516.html
Cc: linux-rt-us...@vger.kernel.org
Signed-off-by: Grygorii Strashko grygorii.stras...@ti.com
callbacks which are executed in
non-atomic contex - irq_bus_lock/irq_bus_sync_unlock, so lets move
PM runtime calls there.
Cc: linux-rt-us...@vger.kernel.org
Signed-off-by: Grygorii Strashko grygorii.stras...@ti.com
---
drivers/gpio/gpio-omap.c | 25 +++--
1 file changed, 15 insertions
or disabled. Disable debounce
if requested debounce time is 0.
2) use below formula for debounce time calculation:
debounce = (DIV_ROUND_UP(debounce, 31) - 1) 0xFF;
Signed-off-by: Grygorii Strashko grygorii.stras...@ti.com
---
drivers/gpio/gpio-omap.c | 19 ++-
1 file changed, 10
Switch OMAP GPIO driver to use platform_get_irq(), because
it is not recommened to use platform_get_resource(pdev, IORESOURCE_IRQ, ..)
for requesting IRQ resources any more, as they can be not ready yet
in case of DT-boot.
Signed-off-by: Grygorii Strashko grygorii.stras...@ti.com
---
drivers
The access to HW registers has to be be protected in
omap_gpio_irq_handler(), as it may race with code executed on
another CPUs.
Signed-off-by: Grygorii Strashko grygorii.stras...@ti.com
---
drivers/gpio/gpio-omap.c | 8
1 file changed, 8 insertions(+)
diff --git a/drivers/gpio/gpio
The bank-chip.irqdomain is uninitialized at the moment when
irq_domain_remove() is called, so remove this call.
Signed-off-by: Grygorii Strashko grygorii.stras...@ti.com
---
drivers/gpio/gpio-omap.c | 1 -
1 file changed, 1 deletion(-)
diff --git a/drivers/gpio/gpio-omap.c b/drivers/gpio/gpio
commit: 929550b gpio: mxc: fix section mismatch warning
Boot, basic gpio functionality tested on:
dra7-evm, BeagleBone(white), am43xx-gpevm, am437x-sk
Manually tested on dra7-evm including suspend/resume and wakeup.
Grygorii Strashko (7):
gpio: omap: remove wrong irq_domain_remove usage in probe
On 08/14/2015 03:34 PM, Linus Walleij wrote:
On Thu, Aug 13, 2015 at 4:58 PM, Grygorii Strashko
grygorii.stras...@ti.com wrote:
Since IRQ chip helpers were introduced drivers lose ability to
register separate lockdep classes for each registered GPIO IRQ
chip and the gpiolib now is using
...@ti.com
Signed-off-by: Grygorii Strashko grygorii.stras...@ti.com
---
Changes in v2:
- removed accidental change in gpio chip structure description.
drivers/gpio/gpiolib.c | 27 ++-
include/linux/gpio/driver.h | 26 +-
2 files changed, 35
Add missed description for GPIO irqchip fields in struct gpio_chip.
Signed-off-by: Grygorii Strashko grygorii.stras...@ti.com
---
Changes in v2:
- New patch.
include/linux/gpio/driver.h | 11 +++
1 file changed, 11 insertions(+)
diff --git a/include/linux/gpio/driver.h b/include/linux
It's expected to use this helper when the current
domain doesn't implement .irq_set_type(), but expect
the parent to do so.
Cc: Sudeep Holla sudeep.ho...@arm.com
Signed-off-by: Grygorii Strashko grygorii.stras...@ti.com
---
include/linux/irq.h | 1 +
kernel/irq/chip.c | 17
: Convert dra7 crossbar...')
Signed-off-by: Grygorii Strashko grygorii.stras...@ti.com
---
drivers/irqchip/irq-crossbar.c | 1 +
1 file changed, 1 insertion(+)
diff --git a/drivers/irqchip/irq-crossbar.c b/drivers/irqchip/irq-crossbar.c
index 692fe2b..3ba58e7 100644
--- a/drivers/irqchip/irq-crossbar.c
/759
v1: https://lkml.org/lkml/2015/8/11/179
Cc: Sudeep Holla sudeep.ho...@arm.com
Cc: Jiang Liu jiang@linux.intel.com
Grygorii Strashko (6):
genirq: fix irq_chip_retrigger_hierarchy
genirq: introduce irq_chip_set_type_parent() helper
irqchip: crossbar: fix arm gic irq type configuration
wakeupgen to stacked domains')
Acked-by: Tony Lindgren t...@atomide.com
Signed-off-by: Grygorii Strashko grygorii.stras...@ti.com
---
arch/arm/mach-omap2/omap-wakeupgen.c | 1 +
1 file changed, 1 insertion(+)
diff --git a/arch/arm/mach-omap2/omap-wakeupgen.c
b/arch/arm/mach-omap2/omap
sudeep.ho...@arm.com
Cc: Jiang Liu jiang@linux.intel.com
Fixes: 85f08c17de26 ('genirq: Introduce helper functions...')
Reviewed-by: Marc Zyngier marc.zyng...@arm.com
Signed-off-by: Grygorii Strashko grygorii.stras...@ti.com
---
kernel/irq/chip.c | 2 +-
1 file changed, 1 insertion(+), 1
time.
Cc: Sudeep Holla sudeep.ho...@arm.com
Signed-off-by: Grygorii Strashko grygorii.stras...@ti.com
---
drivers/irqchip/irq-crossbar.c | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/drivers/irqchip/irq-crossbar.c b/drivers/irqchip/irq-crossbar.c
index f5a72cc..c12bb93
- IRQCHIP_MASK_ON_SUSPEND=n
Hence, fix by adding IRQCHIP_MASK_ON_SUSPEND for TI Crossbar IRQ chip.
Cc: Sudeep Holla sudeep.ho...@arm.com
Signed-off-by: Grygorii Strashko grygorii.stras...@ti.com
---
drivers/irqchip/irq-crossbar.c | 1 +
1 file changed, 1 insertion(+)
diff --git a/drivers/irqchip/irq-crossbar.c b
On 08/13/2015 03:58 PM, Grygorii Strashko wrote:
On 08/13/2015 01:31 PM, Grygorii Strashko wrote:
On 08/13/2015 01:01 PM, Marc Zyngier wrote:
On 12/08/15 18:45, Grygorii Strashko wrote:
The irqchip_set_wake_parent should not fail if IRQ chip
specifies IRQCHIP_SKIP_SET_WAKE. Otherwise, IRQ
On 08/14/2015 03:40 PM, Lars-Peter Clausen wrote:
On 08/14/2015 02:34 PM, Linus Walleij wrote:
[...]
Every chip will get their own lock class on the heap.
But I think it is a bit kludgy.
Is it not possible to have the lock key in struct gpio_chip
be a real member instead of a pointer and
On 08/13/2015 11:54 AM, Sudeep Holla wrote:
On 12/08/15 18:45, Grygorii Strashko wrote:
The irqchip_set_wake_parent should not fail if IRQ chip
specifies IRQCHIP_SKIP_SET_WAKE. Otherwise, IRQ wakeup
configuration can't be propagated properly through IRQ
domains hierarchy.
In case of TI OMAP
On 08/13/2015 11:58 AM, Sudeep Holla wrote:
On 12/08/15 18:45, Grygorii Strashko wrote:
It's expected to use this helper when the current
domain doesn't implement .irq_set_type(), but expect
the parent to do so.
Signed-off-by: Grygorii Strashko grygorii.stras...@ti.com
---
include/linux
On 08/13/2015 01:01 PM, Marc Zyngier wrote:
On 12/08/15 18:45, Grygorii Strashko wrote:
The irqchip_set_wake_parent should not fail if IRQ chip
specifies IRQCHIP_SKIP_SET_WAKE. Otherwise, IRQ wakeup
configuration can't be propagated properly through IRQ
domains hierarchy.
In case of TI OMAP
On 08/13/2015 12:30 PM, Sudeep Holla wrote:
On 12/08/15 18:46, Grygorii Strashko wrote:
All ARM GIC IRQs have to masked during suspend if they are not
wakeup source. Now this is not happen, since switching to
use IRQ domain hierarchy, because suspend_device_irq() only checks flags
On 08/13/2015 01:31 PM, Grygorii Strashko wrote:
On 08/13/2015 01:01 PM, Marc Zyngier wrote:
On 12/08/15 18:45, Grygorii Strashko wrote:
The irqchip_set_wake_parent should not fail if IRQ chip
specifies IRQCHIP_SKIP_SET_WAKE. Otherwise, IRQ wakeup
configuration can't be propagated properly
://www.spinics.net/lists/linux-gpio/msg05844.html
[2] http://www.spinics.net/lists/linux-gpio/msg06021.html
[3] http://www.spinics.net/lists/arm-kernel/msg429834.html
Cc: Geert Uytterhoeven ge...@linux-m68k.org
Cc: Roger Quadros rog...@ti.com
Reported-by: Roger Quadros rog...@ti.com
Signed-off-by: Grygorii
no .irq_set_wake()
and -ENOSYS will be returned
resume:
- gpio_keys_resume
+ disable_irq_wake
+ irq_set_irq_wake
+ WARN(1, Unbalanced IRQ %d wake disable\n, irq);
Fixes: 08b55e2a9208 ('genirq: Add irqchip_set_wake_parent')
Signed-off-by: Grygorii Strashko grygorii.stras...@ti.com
4.1+.
Tested on:
TI OMAP DRA7, dra7-evm
Series based on:
Linux 4.2-rc6
Changes in v2:
- initial patch has been split on three;
- added three more patechs.
Link on v1:
https://lkml.org/lkml/2015/8/11/179
Grygorii Strashko (6):
genirq: fix irq_chip_retrigger_hierarchy
genirq: fix
Hi Marc,
On 08/11/2015 05:33 PM, Marc Zyngier wrote:
On Tue, 11 Aug 2015 13:16:13 +0100
Grygorii Strashko grygorii.stras...@ti.com wrote:
On 08/11/2015 02:24 PM, Marc Zyngier wrote:
On Tue, 11 Aug 2015 10:25:47 +0100
Grygorii Strashko grygorii.stras...@ti.com wrote:
It's observed that ARM
It's expected to use this helper when the current
domain doesn't implement .irq_set_type(), but expect
the parent to do so.
Signed-off-by: Grygorii Strashko grygorii.stras...@ti.com
---
include/linux/irq.h | 1 +
kernel/irq/chip.c | 20
2 files changed, 21 insertions
-off-by: Grygorii Strashko grygorii.stras...@ti.com
---
arch/arm/mach-omap2/omap-wakeupgen.c | 1 +
1 file changed, 1 insertion(+)
diff --git a/arch/arm/mach-omap2/omap-wakeupgen.c
b/arch/arm/mach-omap2/omap-wakeupgen.c
index 8e52621..e1d2e99 100644
--- a/arch/arm/mach-omap2/omap-wakeupgen.c
by adding IRQCHIP_MASK_ON_SUSPEND for
TI Crossbar IRQ chip.
Signed-off-by: Grygorii Strashko grygorii.stras...@ti.com
---
drivers/irqchip/irq-crossbar.c | 1 +
1 file changed, 1 insertion(+)
diff --git a/drivers/irqchip/irq-crossbar.c b/drivers/irqchip/irq-crossbar.c
index 3ba58e7..f5a72cc 100644
-by: Grygorii Strashko grygorii.stras...@ti.com
---
drivers/irqchip/irq-crossbar.c | 1 +
1 file changed, 1 insertion(+)
diff --git a/drivers/irqchip/irq-crossbar.c b/drivers/irqchip/irq-crossbar.c
index 692fe2b..3ba58e7 100644
--- a/drivers/irqchip/irq-crossbar.c
+++ b/drivers/irqchip/irq-crossbar.c
: 85f08c17de26 ('genirq: Introduce helper functions...')
Signed-off-by: Grygorii Strashko grygorii.stras...@ti.com
---
kernel/irq/chip.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/kernel/irq/chip.c b/kernel/irq/chip.c
index 27f4332..6de638b 100644
--- a/kernel/irq/chip.c
+++ b/kernel
btnUser2
445: 0 0 pinctrl 992 Edge-0001 4806a000.serial
Fixes: 783d31863fb8 ('irqchip: crossbar: Convert dra7 crossbar to stacked
domains')
Signed-off-by: Grygorii Strashko grygorii.stras...@ti.com
---
Hi All,
I can split patch if required and overall solution
On 08/11/2015 02:24 PM, Marc Zyngier wrote:
On Tue, 11 Aug 2015 10:25:47 +0100
Grygorii Strashko grygorii.stras...@ti.com wrote:
Hi Grygorii,
It's observed that ARM GIC IRQ triggering type is not configured
properly when IRQ is routed through IRQ domains hierarchy and
system started using DT
Hi Tony,
On 08/07/2015 06:36 AM, Tony Lindgren wrote:
* Linus Walleij linus.wall...@linaro.org [150716 01:38]:
On Wed, Jun 24, 2015 at 4:54 PM, Grygorii Strashko
grygorii.stras...@ti.com wrote:
From: Grygorii Strashko grygorii.stras...@linaro.org
Add missed spin_unlock_irqrestore
Hi Alexandre,
On 08/05/2015 02:43 PM, Alexandre Belloni wrote:
On 05/08/2015 at 13:41:19 +0200, Alexandre Belloni wrote :
Hi,
On 05/08/2015 at 04:13:17 -0700, Tony Lindgren wrote :
* Keerthy j-keer...@ti.com [150805 03:53]:
Based on the board property switch the source from internal
to
On 08/06/2015 09:26 AM, Tony Lindgren wrote:
* Kishon Vijay Abraham I kis...@ti.com [150805 07:59]:
Hi Tony,
On Wednesday 05 August 2015 03:17 PM, Tony Lindgren wrote:
* Kishon Vijay Abraham I kis...@ti.com [150727 04:27]:
vsel_reg and enable_reg of the pbias regulator descriptor should
...@ti.com
Signed-off-by: Kishon Vijay Abraham I kis...@ti.com
For dra7-evm:
Tested-by: Grygorii Strashko grygorii.stras...@ti.com
--
regards,
-grygorii
--
To unsubscribe from this list: send the line unsubscribe linux-omap in
the body of a message to majord...@vger.kernel.org
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/arm/boot/dts/omap2430.dtsi |3 ++-
arch/arm/boot/dts/omap4.dtsi|3 ++-
arch/arm/boot/dts/omap5.dtsi|3 ++-
4 files changed, 7 insertions(+), 4 deletions(-)
For dra7-evm:
Tested-by: Grygorii Strashko grygorii.stras...@ti.com
--
regards,
-grygorii
--
To unsubscribe from
On 07/29/2015 02:09 PM, Kishon Vijay Abraham I wrote:
Since vmmc can be optional for some platforms, use
devm_regulator_get_optional() for vmmc. Now return error only
in the case of -EPROBE_DEFER and for all other cases set
host-vcc to NULL.
Signed-off-by: Kishon Vijay Abraham I
Hi Tony, Tero, All,
It seems MMC PBIAS regulator functionality is broken now (on DRA7 at least).
1) On DRA7 I can see that pbias_regulator: pbias_regulator device is not
registered. It happens because pbias_mmc_reg is defined in DT as child
of scm_conf: scm_conf@0 which is syscon and, as result,
+Cc: Kishon Vijay Abraham I kis...@ti.com
On 07/22/2015 07:48 PM, Grygorii Strashko wrote:
Hi Tony, Tero, All,
It seems MMC PBIAS regulator functionality is broken now (on DRA7 at least).
1) On DRA7 I can see that pbias_regulator: pbias_regulator device is not
registered. It happens because
low level), we need to set them to 1 (which means high-impedance) to
avoid unwanted changes on the pins.
As a precaution, reset all these bits to their default values after
recovery is complete.
Reviewed-by: Grygorii Strashko grygorii.stras...@ti.com
Signed-off-by: Jan Luebbe j
Hi Wolfram,
On 07/10/2015 12:09 PM, Wolfram Sang wrote:
60 s sounds way too much and actually I simply don't believe this is
the root cause. If I take a look into the driver, then I see, that
I agree, this is just a workaround.
the design is not really the best. The whole IRQ handling
On 07/10/2015 04:26 PM, Alexander Sverdlin wrote:
Hi!
On 10/07/15 15:17, ext Vignesh R wrote:
I would propose you to throw away spinlocks. Convert threaded IRQ to
Agree. Looks like spinlock is not needed.
just one hardirq handler. And continue debugging. You will reduce the
load of the
On 07/08/2015 02:38 PM, Roger Quadros wrote:
From: J.D. Schroeder jay.schroe...@garmin.com
The previous change 3973c526ae9c (net: can: c_can: Disable pins when CAN
interface
is down) causes a slight glitch on the pinctrl settings when used. Since
commit ab78029 (drivers/pinctrl: grab default
On 07/09/2015 01:59 PM, Marc Kleine-Budde wrote:
On 07/09/2015 12:58 PM, Grygorii Strashko wrote:
On 07/08/2015 02:38 PM, Roger Quadros wrote:
From: J.D. Schroeder jay.schroe...@garmin.com
The previous change 3973c526ae9c (net: can: c_can: Disable pins when CAN
interface
is down) causes
On 07/08/2015 11:13 AM, Roger Quadros wrote:
On 07/07/15 18:49, Grygorii Strashko wrote:
On 07/07/2015 05:37 PM, Roger Quadros wrote:
On 07/07/15 17:35, Roger Quadros wrote:
On 07/07/15 17:33, Marc Kleine-Budde wrote:
On 07/07/2015 04:27 PM, Roger Quadros wrote:
From: J.D. Schroeder
On 07/07/2015 05:37 PM, Roger Quadros wrote:
On 07/07/15 17:35, Roger Quadros wrote:
On 07/07/15 17:33, Marc Kleine-Budde wrote:
On 07/07/2015 04:27 PM, Roger Quadros wrote:
From: J.D. Schroeder jay.schroe...@garmin.com
The previous change 3973c526ae9c (net: can: c_can: Disable pins when
CAN
Hi Tony, Sebastian,
On 07/01/2015 02:29 PM, Tony Lindgren wrote:
* Tony Lindgren t...@atomide.com [150701 00:34]:
This should be OK for most cases as the GPIO interrupt devices are
typically on some external bus like I2C or GPMC. The hurting case
would be bitbanging GPIO devices, like the
On DRA7 there is one pinctrl domain (dra7_pmx_core) and
PRCM wake-up IRQ is not shared, so remove quirk.
Cc: Nishanth Menon n...@ti.com
Cc: Tony Lindgren t...@atomide.com
Fixes: 31320beaa3d3 ('pinctrl: single: Add DRA7 pinctrl compatibility')
Signed-off-by: Grygorii Strashko grygorii.stras
On 06/30/2015 04:52 PM, Alexandre Courbot wrote:
On Fri, Jun 26, 2015 at 12:13 AM, Grygorii Strashko
grygorii.stras...@ti.com wrote:
OMAP GPIO driver allowed to be built as loadable module, but it
doesn't set owner field in GPIO chip structure. As result,
module_get/put() API is not working
...@linutronix.de
Signed-off-by: Grygorii Strashko grygorii.stras...@ti.com
---
drivers/pinctrl/pinctrl-single.c | 3 ++-
1 file changed, 2 insertions(+), 1 deletion(-)
diff --git a/drivers/pinctrl/pinctrl-single.c b/drivers/pinctrl/pinctrl-single.c
index b2de09d..0b8d480 100644
--- a/drivers/pinctrl/pinctrl
Hi Kishon,
On 07/03/2015 02:03 PM, Kishon Vijay Abraham I wrote:
Add PM support to pci-dra7xx so that PCI clocks can be disabled
during suspend and enabled back during resume without affecting
PCI functionality.
Signed-off-by: Kishon Vijay Abraham I kis...@ti.com
---
Hi Sebastian, All,
On 06/22/2015 10:08 AM, Tony Lindgren wrote:
* Javier Martinez Canillas jav...@dowhile0.org [150619 14:57]:
On Fri, Jun 19, 2015 at 7:42 PM, santosh shilimkar
santosh.shilim...@oracle.com wrote:
On 6/19/2015 10:06 AM, Sebastian Andrzej Siewior wrote:
This patch converts
missing configuration.
Cc: Tony Lindgren t...@atomide.com
Fixes: cac089f9026e ('gpio: omap: Allow building as a loadable module')
Signed-off-by: Grygorii Strashko grygorii.stras...@ti.com
---
Hi Linus,
Seems this one is for 4.2-rc.
drivers/gpio/gpio-omap.c | 1 +
1 file changed, 1 insertion
On 06/24/2015 07:26 PM, Nishanth Menon wrote:
On 11:07-20150624, Nishanth Menon wrote:
On 06/24/2015 10:36 AM, Grygorii Strashko wrote:
On 06/23/2015 07:15 PM, Nishanth Menon wrote:
[...]
+ ds1307-wakeirq = of_irq_get(node, 1);
+ if (ds1307-wakeirq = 0
From: Grygorii Strashko grygorii.stras...@linaro.org
Add missed spin_unlock_irqrestore in omap_gpio_irq_type when
omap_set_gpio_triggering() is failed.
It fixes static checker warning:
drivers/gpio/gpio-omap.c:523 omap_gpio_irq_type()
warn: inconsistent returns 'spin_lock:bank
On 06/23/2015 07:15 PM, Nishanth Menon wrote:
With the recent pinctrl-single changes, SoCs such as Texas
Instrument's OMAP processors can treat wake-up events from deeper idle
states as interrupts.
Let's add support for the optional second interrupt for wake-up using
the generic wakeirq support
/rtc-ds1307.c: Sort the headers
drivers/rtc/rtc-ds1307.c: Support optional wakeup interrupt source
for the series, except the patch which I wrote :
Acked-by: Felipe Balbi ba...@ti.com
With minor comment to patch 4:
Reviewed-by: Grygorii Strashko grygorii.stras...@ti.com
--
regards,
-grygorii
On 06/24/2015 07:07 PM, Nishanth Menon wrote:
On 06/24/2015 10:36 AM, Grygorii Strashko wrote:
On 06/23/2015 07:15 PM, Nishanth Menon wrote:
[...]
+ ds1307-wakeirq = of_irq_get(node, 1);
+ if (ds1307-wakeirq = 0) {
+ if (ds1307-wakeirq == -EPROBE_DEFER
On 06/05/2015 05:35 AM, Roger Quadros wrote:
Hi,
On Wed, 3 Jun 2015 22:52:47 +0300
Grygorii Strashko grygorii.stras...@ti.com wrote:
Hi Geert,
On 05/19/2015 12:38 PM, Geert Uytterhoeven wrote:
On Mon, May 18, 2015 at 4:52 PM, grygorii.stras...@linaro.org
grygorii.stras...@linaro.org
Hi Geert,
On 05/19/2015 12:38 PM, Geert Uytterhoeven wrote:
On Mon, May 18, 2015 at 4:52 PM, grygorii.stras...@linaro.org
grygorii.stras...@linaro.org wrote:
On 05/18/2015 05:31 PM, Thomas Gleixner wrote:
On Sun, 17 May 2015, Geert Uytterhoeven wrote:
At least the recursive locking message
is
not used any more.
Signed-off-by: Grygorii Strashko grygorii.stras...@linaro.org
---
drivers/gpio/gpio-omap.c | 15 ---
1 file changed, 15 deletions(-)
diff --git a/drivers/gpio/gpio-omap.c b/drivers/gpio/gpio-omap.c
index 1c226f1..f02b3fa 100644
--- a/drivers/gpio/gpio-omap.c
+++ b
if corresponding GPIO is not used as IRQ too.
GPIO IRQ will be properly cleaned up by GPIO irqchip code.
Signed-off-by: Grygorii Strashko grygorii.stras...@linaro.org
---
drivers/gpio/gpio-omap.c | 5 -
1 file changed, 4 insertions(+), 1 deletion(-)
diff --git a/drivers/gpio/gpio-omap.c b/drivers
for that;
- call directly omap_enable_gpio_module as all needed checks are already
present inside it.
Signed-off-by: Grygorii Strashko grygorii.stras...@linaro.org
---
drivers/gpio/gpio-omap.c | 9 +
1 file changed, 1 insertion(+), 8 deletions(-)
diff --git a/drivers/gpio/gpio-omap.c b
of this change update omap2_gpio__idle() functions
to use pm_runtime_force_suspend()/pm_runtime_force_resume().
Signed-off-by: Grygorii Strashko grygorii.stras...@linaro.org
---
Changes in v2:
- omap2_gpio__idle() functions switched to use
pm_runtime_force_suspend()/pm_runtime_force_resume
as input.
In addition, call omap_enable_gpio_module directly as all needed
checks are already present inside it.
Signed-off-by: Grygorii Strashko grygorii.stras...@linaro.org
---
drivers/gpio/gpio-omap.c | 14 +-
1 file changed, 13 insertions(+), 1 deletion(-)
diff --git a/drivers/gpio
/msg05308.html
[2] [RFC/RFT PATCH 2/2] gpio: omap: ensure that runtime pm will disable unused
gpio banks
http://marc.info/?l=linux-gpiom=142567003515626w=2
Grygorii Strashko (7):
gpio: omap: fix omap_gpio_free to not clean up irq configuration
gpio: omap: fix error handling in omap_gpio_irq_type
more.
Signed-off-by: Grygorii Strashko grygorii.stras...@linaro.org
---
drivers/gpio/gpio-omap.c | 15 +--
1 file changed, 5 insertions(+), 10 deletions(-)
diff --git a/drivers/gpio/gpio-omap.c b/drivers/gpio/gpio-omap.c
index f6cc638..d933b99 100644
--- a/drivers/gpio/gpio-omap.c
+++ b
The GPIO bank will be kept powered in case if input parameters
are invalid or error occurred in omap_gpio_irq_type.
Hence, fix it by ensuring that GPIO bank will be unpowered
in case of errors and add additional check of value returned
from omap_set_gpio_triggering().
Signed-off-by: Grygorii
Hi Tony,
As I can see Patch 1 from this series was merged in 4.0-rc4,
but this patch wasn't. As result, I can see below warning all the time during
boot now:
[0.594591] platform 4a094000.pciephy: Cannot lookup hwmod 'pcie1-phy'
On 02/20/2015 10:51 AM, Kishon Vijay Abraham I wrote:
Now
Hi Dave,
On 03/06/2015 07:45 PM, Tony Lindgren wrote:
* Dave Gerlach d-gerl...@ti.com [150306 09:28]:
On 03/05/2015 06:41 PM, Tony Lindgren wrote:
* Tony Lindgren t...@atomide.com [150305 12:24]:
* Dave Gerlach d-gerl...@ti.com [150305 11:53]:
On 03/05/2015 12:49 PM, Tony Lindgren wrote:
*
Hi Dave,
On 03/10/2015 07:59 PM, Dave Gerlach wrote:
On 03/10/2015 12:36 PM, Grygorii Strashko wrote:
On 03/06/2015 07:45 PM, Tony Lindgren wrote:
* Dave Gerlach d-gerl...@ti.com [150306 09:28]:
On 03/05/2015 06:41 PM, Tony Lindgren wrote:
* Tony Lindgren t...@atomide.com [150305 12:24
Hi Felipe,
On 03/11/2015 03:50 AM, Felipe Balbi wrote:
On Mon, Mar 09, 2015 at 11:39:17AM -0500, Felipe Balbi wrote:
On Thu, Feb 19, 2015 at 12:06:49PM -0600, Felipe Balbi wrote:
If either SCL or SDA are stuck low, we need to
recover the bus using the procedure described
on section 3.1.16 of
On 03/02/2015 01:03 PM, Tomi Valkeinen wrote:
On 26/02/15 15:57, grygorii.stras...@linaro.org wrote:
Could I ask you to update this patch as below, pls?
Your changes look ok to me, but they are not related to my patch so I
don't see any reason to merge them. I'll pick your patch to my
On 02/25/2015 05:44 PM, Tony Lindgren wrote:
* grygorii.stras...@linaro.org grygorii.stras...@linaro.org [150225 06:17]:
From: Grygorii Strashko grygorii.stras...@linaro.org
Add missed callback needed for supporting suspend-to-disk (hibernation) mode.
Is this needed as a fix for the -rc
On 24 February 2015 at 20:03, Eduardo Valentin edubez...@gmail.com wrote:
On Tue, Feb 24, 2015 at 06:01:23PM +0200, grygorii.stras...@linaro.org wrote:
On 02/09/2015 05:01 PM, Nishanth Menon wrote:
On 16:55-20150206, grygorii.stras...@linaro.org wrote:
From: Grygorii Strashko grygorii.stras
On 11/15/2014 03:12 AM, Alexander Kochetkov wrote:
commit 1d7afc95946487945cc7f5019b41255b72224b70 (i2c: omap: ack IRQ in parts)
changed the interrupt handler to complete transfers without clearing
XRDY (AL case) and ARDY (NACK case) flags. XRDY or ARDY interrupt will be
fired again (in parallel
Hi Laurent,
On 07/30/2014 03:06 AM, Laurent Pinchart wrote:
Hi Grygorii and Grant,
On Monday 28 July 2014 23:52:34 Grant Likely wrote:
On Mon, Jul 28, 2014 at 11:47 AM, Grygorii Strashko wrote:
On 07/28/2014 05:05 PM, Grant Likely wrote:
On Thu, 12 Jun 2014 19:53:43 +0300, Grygorii
Hi Grant.
On 07/28/2014 05:05 PM, Grant Likely wrote:
On Thu, 12 Jun 2014 19:53:43 +0300, Grygorii Strashko
grygorii.stras...@ti.com wrote:
Use clkops-clocks property to specify clocks handled by
clock_ops domain PM domain. Only clocks defined in clkops-clocks
set of clocks will be handled
Use clkops-clocks property to specify clocks handled by
clock_ops domain PM domain. Only clocks defined in clkops-clocks
set of clocks will be handled by Runtime PM through clock_ops
Pm domain.
Signed-off-by: Grygorii Strashko grygorii.stras...@ti.com
---
drivers/of/of_clk.c |7 ++-
1
by Greg and Rafael.
Another option 2, continue to use Bus notifiers, but then error path need to be
handled somehow. Now BUS_NOTIFY_BIND_DRIVER even is sent before probing, but
it seems that nothing is sent in case if probe was failed.
Grygorii Strashko (2):
clk: of: introduce of_clk_get_from_set
@268 {
compatible = ti,keystone-dwc3;
[...]
clkops-clocks = clkusb;
Code:
clk = of_clk_get_from_set(np, clkops, 0);
This changes will not affect on already existed code.
Signed-off-by: Grygorii Strashko grygorii.stras...@ti.com
---
drivers
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