using
Paul's 32k timer patch [1]).
[1] http://marc.info/?l=linux-omap&m=13453229888&w=2
Signed-off-by: Jon Hunter
---
arch/arm/mach-omap2/powerdomain.c |3 +++
1 file changed, 3 insertions(+)
diff --git a/arch/arm/mach-omap2/powerdomain.c
b/arch/arm/mach-omap2/powerdoma
n
Cc: Tarun Kanti DebBarma
Cc: Franky Lin
Reported-by: Franky Lin
Signed-off-by: Jon Hunter
---
drivers/gpio/gpio-omap.c |4 +++-
1 file changed, 3 insertions(+), 1 deletion(-)
diff --git a/drivers/gpio/gpio-omap.c b/drivers/gpio/gpio-omap.c
index c4ed172..f13fc9c 100644
--- a/drivers/gpio
On 06/28/2012 11:07 PM, DebBarma, Tarun Kanti wrote:
> On Fri, Jun 29, 2012 at 6:29 AM, Franky Lin wrote:
>> On 06/28/2012 04:54 PM, Jon Hunter wrote:
>>>
>>> I am wondering if this could be the bug ... on start-up I see that we do
>>> a context restore on ba
Hi Afzal,
On 06/29/2012 01:15 AM, Mohammed, Afzal wrote:
> Hi Tony, Jon,
>
> On Thu, Jun 28, 2012 at 22:13:37, Hunter, Jon wrote:
>> On 06/28/2012 07:32 AM, Tony Lindgren wrote:
>>> * Mohammed, Afzal [120628 02:36]:
On Wed, Jun 27, 2012 at 20:28:45, Tony Lindgren wrote:
>
> The last pa
/2012 06:50 PM, Jon Hunter wrote:
>
> On 06/21/2012 02:15 PM, Jon Hunter wrote:
>> Hi all,
>>
>> I am in the process of adding a device-tree binding for OMAP timers and
>> I have encountered a scenario where ideally it would be useful to remove
>> a device-tree no
On 06/28/2012 06:10 PM, Franky Lin wrote:
> On 06/28/2012 03:59 PM, Jon Hunter wrote:
>>
>> On 06/28/2012 05:53 PM, Franky Lin wrote:
>>> I found one interesting thing. When I added the print info to see when
>>> runtime_suspend/resume get called, it seems like th
On 06/28/2012 06:10 PM, Franky Lin wrote:
> On 06/28/2012 03:59 PM, Jon Hunter wrote:
>>
>> On 06/28/2012 05:53 PM, Franky Lin wrote:
>>> I found one interesting thing. When I added the print info to see when
>>> runtime_suspend/resume get called, it seems like th
On 06/28/2012 06:10 PM, Franky Lin wrote:
> On 06/28/2012 03:59 PM, Jon Hunter wrote:
>>
>> On 06/28/2012 05:53 PM, Franky Lin wrote:
>>> I found one interesting thing. When I added the print info to see when
>>> runtime_suspend/resume get called, it seems like th
On 06/28/2012 05:53 PM, Franky Lin wrote:
> On 06/28/2012 02:55 PM, Jon Hunter wrote:
>> Ok. Any way to manually reset the wlan module to deactivate the gpio
>> when it is hung? I am wondering if the gpio is deactivated if the board
>> comes back to life, indicating it is s
On 06/28/2012 04:24 PM, Franky Lin wrote:
> On 06/28/2012 08:42 AM, Jon Hunter wrote:
>>
>> On 06/27/2012 07:41 PM, Franky Lin wrote:
>>> On 06/26/2012 08:37 PM, Kevin Hilman wrote:
>>>> "Franky Lin" writes:
>>>>> I notice
Hi Tony, Afzal,
On 06/28/2012 11:43 AM, Jon Hunter wrote:
> Hi Tony, Afzal,
>
> On 06/28/2012 07:32 AM, Tony Lindgren wrote:
>> * Mohammed, Afzal [120628 02:36]:
>>> Hi Tony,
>>>
>>> On Wed, Jun 27, 2012 at 20:28:45, Tony Lindgren wrote:
>>>
&g
changed to support different OneNAND devices using different async timings.
Signed-off-by: Jon Hunter
---
arch/arm/mach-omap2/gpmc-onenand.c | 16 +---
1 file changed, 5 insertions(+), 11 deletions(-)
diff --git a/arch/arm/mach-omap2/gpmc-onenand.c
b/arch/arm/mach-omap2/gpmc
, neither is the
clk_dep variable and so all references to it can also be removed.
Signed-off-by: Jon Hunter
---
arch/arm/mach-omap2/gpmc-onenand.c| 39 -
arch/arm/plat-omap/include/plat/onenand.h |8 --
2 files changed, 5 insertions(+), 42 deletions
corrects this and cleans up the code that is determining the OneNAND
frequency. This series is based upon Afzal's prep-gpmc branch [1] and has been
tested on an OMAP3430 SDP.
[1] http://gitorious.org/x0148406-public/linux-kernel/trees/gpmc-prep
Jon Hunter (2):
ARM: OMAP2+: GPMC: Remove u
Hi Tony, Afzal,
On 06/28/2012 07:32 AM, Tony Lindgren wrote:
> * Mohammed, Afzal [120628 02:36]:
>> Hi Tony,
>>
>> On Wed, Jun 27, 2012 at 20:28:45, Tony Lindgren wrote:
>>
>>> The last patch in this series causes onenand not to show
>>> up on my n900. I believe the problem has been there earlier
On 06/27/2012 07:41 PM, Franky Lin wrote:
> On 06/26/2012 08:37 PM, Kevin Hilman wrote:
>> "Franky Lin" writes:
>>> I noticed Kevin raised some similar cases on other platforms and also
>>> provided two patches in the patch mail thread. But unfortunately those
>>> two patches doesn't help in our
Hi Franky,
On 06/27/2012 08:03 PM, Franky Lin wrote:
> On 06/27/2012 04:43 PM, Jon Hunter wrote:
>> Hi Franky,
>>
>> On 06/25/2012 03:52 PM, Franky Lin wrote:
>>> Hi Kevin, Tarun,
>>>
>>> We are using the expansion connector A on Panda board to m
Hi Franky,
On 06/25/2012 03:52 PM, Franky Lin wrote:
> Hi Kevin, Tarun,
>
> We are using the expansion connector A on Panda board to mount a SDIO
> WiFi dongle on MMC2 with a level triggered interrupt signal connected to
> GPIO 138. It's been working fine until 3.5 rc1. The board hang randomly
>
Hi Afzal,
On 06/26/2012 09:39 AM, Jon Hunter wrote:
> Hi Afzal,
>
> On 06/26/2012 03:29 AM, Mohammed, Afzal wrote:
>> Hi Jon,
>>
>> On Mon, Jun 25, 2012 at 21:42:14, Hunter, Jon wrote:
>>> On 06/22/2012 04:01 AM, Afzal Mohammed wrote:
>>
>>>&g
Hi Afzal,
On 06/26/2012 03:29 AM, Mohammed, Afzal wrote:
> Hi Jon,
>
> On Mon, Jun 25, 2012 at 21:42:14, Hunter, Jon wrote:
>> On 06/22/2012 04:01 AM, Afzal Mohammed wrote:
>
>>> +static int hf, vhf, sync_read, sync_write, latency;
>>
>> I am wondering if we can remove hf, vhf, sync_read/write v
Adding linux-arm ML.
Jon
On 06/25/2012 12:38 PM, Jon Hunter wrote:
> OMAP4470 currently fails to boot, printing various messages such as ...
>
> omap_hwmod: mpu: cannot clk_get main_clk dpll_mpu_m2_ck
> omap_hwmod: mpu: cannot _init_clocks
> [ cut here ]---
omplete for new
modules such as the 2D graphics block that has been added to the 4470.
Therefore add a warning to indicate that the clock data is incomplete.
Cc: Paul Walmsley
Cc: Benoit Cousson
Signed-off-by: Jon Hunter
---
arch/arm/mach-omap2/clock44xx_data.c |5 -
1 file changed, 4
el() API. I apologise for
adding you late into the discussion. If you have any questions/comments
let me know.
Jon
> On Fri, Jun 22, 2012 at 05:52:08PM -0500, Jon Hunter wrote:
>> Hi Arnd,
>>
>> On 06/14/2012 06:48 AM, Arnd Bergmann wrote:
>>
>> [snip]
>>
>&g
Hi Afzal,
Looks much better!
On 06/22/2012 04:01 AM, Afzal Mohammed wrote:
> Reorganize gpmc-onenand initialization so that changes
> required for gpmc driver migration can be made smooth.
>
> Ensuring sync read/write are disabled in onenand cannot
> be expected to work properly unless GPMC is s
s Weber reported
> that value of devkit8000 to be CS0. Overo board was found
> to be using CS0 based on u-boot, while google grep says
> omap3touchbook too has CS0.
>
> Signed-off-by: Afzal Mohammed
Looks good.
Reviewed-by: Jon Hunter
Cheers
Jon
--
To unsubscribe from this list: send th
Hi Arnd,
On 06/14/2012 06:48 AM, Arnd Bergmann wrote:
[snip]
> This would let us handle the following cases very easily:
>
> 1. one read-write channel
>
> dmas = <&dmac 0x3 match>;
>
> 2. a choice of two read-write channels:
>
> dmas = <&dmacA 0x3 matchA>, <&dmacB 0x3 matchB>;
>
On 06/21/2012 02:15 PM, Jon Hunter wrote:
> Hi all,
>
> I am in the process of adding a device-tree binding for OMAP timers and
> I have encountered a scenario where ideally it would be useful to remove
> a device-tree node at runtime.
>
> The scenario is this ...
>
&
Hi all,
I am in the process of adding a device-tree binding for OMAP timers and
I have encountered a scenario where ideally it would be useful to remove
a device-tree node at runtime.
The scenario is this ...
1. OMAP3 devices may or may not have security features enabled. Security
enabled dev
On 06/20/2012 10:12 AM, Tony Lindgren wrote:
> * Mohammed, Afzal [120620 07:57]:
>> Hi Tony,
>>
>> On Wed, Jun 20, 2012 at 18:58:49, Tony Lindgren wrote:
>>> * Mohammed, Afzal [120616 02:19]:
On Fri, Jun 15, 2012 at 18:15:20, Tony Lindgren wrote:
>>
By gpmc registration, if you meant r
Hi Afzal,
On 06/19/2012 12:57 AM, Mohammed, Afzal wrote:
> Hi Jon,
>
> On Mon, Jun 18, 2012 at 21:31:46, Hunter, Jon wrote:
>
>>> @@ -95,10 +89,6 @@ static int omap2_onenand_set_async_mode(int cs, void
>>> __iomem *onenand_base)
>>> if (err)
>>> return err;
>>>
>>> - /* Ensu
On 06/20/2012 04:14 AM, Zumeng Chen wrote:
> Since it's no more sense to set parent for dummy clock,
> so we can just ignore it to mute failed message.
>
> Signed-off-by: Jon Hunter
> Signed-off-by: Zumeng Chen
> ---
> arch/arm/plat-omap/clock.c |4
>
Hi Afzal,
Thanks for sending the update.
On 06/16/2012 03:03 AM, Afzal Mohammed wrote:
> Reorganize gpmc-onenand initialization so that changes
> required for gpmc driver migration can be made smooth.
>
> Ensuring sync read/write are disabled in onenand cannot
> be expected to work properly unle
Hi Paul,
On 06/14/2012 07:20 PM, Paul Walmsley wrote:
> On Thu, 14 Jun 2012, Jon Hunter wrote:
>
>> What does make this a bit more difficult is the function
>> gpmc_round_ns_to_ticks(). It appears to convert nanoseconds to ticks and
>> back to nanoseconds. I am gues
Hi Paul,
On 06/14/2012 03:31 PM, Paul Walmsley wrote:
> Hi Jon
>
> On Tue, 5 Jun 2012, Jon Hunter wrote:
>
>> The OMAP dmtimer driver allows you to dynamically configure the functional
>> clock that drives the timer logic. The dmtimer driver uses the device name
>&g
aengine related discussions. Let's see how
> we can use this model for these SoCs.
>
> On Sat, 9 Jun 2012, Arnd Bergmann wrote:
>
>> On Friday 08 June 2012, Jon Hunter wrote:
>
> [snip]
>
>>> It seems to me we were pretty close on alignment. In fact, I
Hi Afzal,
On 06/14/2012 03:48 AM, Mohammed, Afzal wrote:
> Hi Jon,
>
> On Wed, Jun 13, 2012 at 21:14:30, Hunter, Jon wrote:
>> On 06/13/2012 02:37 AM, Mohammed, Afzal wrote:
>
>>> In that case we would be directly depending on user flag whose value may
>>> or may not change and I don't think it
Hi Afzal,
On 06/14/2012 01:17 AM, Mohammed, Afzal wrote:
> Hi Jon,
>
> On Wed, Jun 13, 2012 at 20:21:50, Hunter, Jon wrote:
>
>>> I do not think it is practically possible. Please see timing calculations
>>> in arch/arm/mach-omap2/gpmc-*, the way it is done for different
>>> peripherals are diff
On 06/14/2012 08:32 AM, Mohammed, Afzal wrote:
> Hi Jon,
>
> On Thu, Jun 14, 2012 at 18:52:55, Hunter, Jon wrote:
>> On 06/14/2012 02:03 AM, Mohammed, Afzal wrote:
>>> On Wed, Jun 13, 2012 at 20:21:50, Hunter, Jon wrote:
>
If the clk handle for the gpmc is passed to the gpmc driver, then th
Hi Afzal,
On 06/14/2012 12:40 AM, Mohammed, Afzal wrote:
> Hi Jon,
>
> On Wed, Jun 13, 2012 at 22:08:47, Hunter, Jon wrote:
>> On 06/13/2012 12:03 AM, Mohammed, Afzal wrote:
>
>>> As gpmc_onenand_setup is a callback by onenand driver, we would have
>>> lost the opportunity to configure onenand b
On 06/14/2012 06:48 AM, Arnd Bergmann wrote:
> On Wednesday 13 June 2012, Jon Hunter wrote:
>
>>> As I said previously, I think just encoding the direction but not
>>> the client specific ID (meaning we would have to disambiguate
>>> the more complex cases t
On 06/14/2012 02:03 AM, Mohammed, Afzal wrote:
> Hi Jon,
>
> On Wed, Jun 13, 2012 at 20:21:50, Hunter, Jon wrote:
>
>> If the clk handle for the gpmc is passed to the gpmc driver, then there
>> is no reason why the driver cannot do this.
>
> I believe passing clk details through platform data
Hi Arnd,
On 06/08/2012 07:04 PM, Arnd Bergmann wrote:
> On Friday 08 June 2012, Jon Hunter wrote:
>> On 05/21/2012 03:32 PM, Stephen Warren wrote:
>>> On 05/21/2012 12:18 PM, Arnd Bergmann wrote:
>>>> On Monday 21 May 2012, Stephen Warren wrote:
>>>>&
On 06/13/2012 08:40 AM, Tony Lindgren wrote:
> * Mohammed, Afzal [120613 06:16]:
>> Hi Tony,
>>
>> On Wed, Jun 13, 2012 at 17:37:17, Tony Lindgren wrote:
>>> * Jon Hunter [120612 11:01]:
>>>>
>>>> On 06/12/2012 02:16 AM, Mohammed, Afzal wr
Hi Tony, Afzal,
On 06/13/2012 07:40 AM, Mohammed, Afzal wrote:
> Hi Tony,
>
> On Wed, Jun 13, 2012 at 17:03:59, Tony Lindgren wrote:
>
>> NAND for untested boards if timings change. Are Jon's comments all handled?
>
> I have explained the justification, why those changes were done so,
> waiting
Hi Afzal,
On 06/13/2012 12:03 AM, Mohammed, Afzal wrote:
> Hi Jon,
>
> On Tue, Jun 12, 2012 at 23:00:48, Hunter, Jon wrote:
>
>> On 06/12/2012 01:16 AM, Mohammed, Afzal wrote:
>>> With the existing code, set_async was done as part of set_sync, hence
>>> requiring GPMC to be configured twice afte
Hi Afzal,
On 06/13/2012 01:10 AM, Mohammed, Afzal wrote:
> Hi Jon,
>
> On Wed, Jun 13, 2012 at 00:12:27, Hunter, Jon wrote:
>
>> I am still wondering if we should warn against multiple devices using
>> the wait pin. I see that if could be valid to have multiple memory
>> devices of the same type
Hi Afzal,
On 06/13/2012 02:37 AM, Mohammed, Afzal wrote:
> Hi Jon,
>
> On Tue, Jun 12, 2012 at 23:45:36, Hunter, Jon wrote:
>
>> GPMC_WAITPIN_IDX0 = 0
>> GPMC_WAITPIN_0 = 1
>>
>> So, GPMC_WAITPIN_IDX0 = GPMC_WAITPIN_0 - 1, assuming that you want idx =
>> 0 and not 1. Or you could change you shif
Hi Afzal,
On 06/13/2012 12:50 AM, Mohammed, Afzal wrote:
> Hi Jon,
>
> On Tue, Jun 12, 2012 at 23:39:32, Hunter, Jon wrote:
>> On 06/12/2012 07:58 AM, Mohammed, Afzal wrote:
>
>>> Thinking again over it, I am feeling above is sufficient, reason same as
>>> said earlier, to keep code simple & cur
Hi Afzal,
On 06/13/2012 12:29 AM, Mohammed, Afzal wrote:
> Hi Jon,
>
> On Tue, Jun 12, 2012 at 23:32:05, Hunter, Jon wrote:
>
>> Well looking at the function it seems that you either return an error
>> code or 1. So if you are never going to return anything other than 1 on
>> success it may as w
Hi Afzal,
On 06/11/2012 09:27 AM, Afzal Mohammed wrote:
> Platform will provide driver with configuration details for
> each CS like configuration, timing, interrupts. Setup GPMC
> based on it. Platform data also provides platform data &
> resources used for connected peripheral (eg. gpio irq).
>
Hi Afzal,
On 06/13/2012 08:05 AM, Mohammed, Afzal wrote:
> Hi Tony,
>
> On Wed, Jun 13, 2012 at 17:32:09, Tony Lindgren wrote:
>> * Mohammed, Afzal [120612 22:24]:
>>> Hi Jon,
>>>
>>> On Tue, Jun 12, 2012 at 23:10:01, Hunter, Jon wrote:
>
Right but potentially, this could be done by the dr
Hi Afzal,
On 06/13/2012 12:20 AM, Mohammed, Afzal wrote:
> Hi Jon,
>
> On Tue, Jun 12, 2012 at 23:10:01, Hunter, Jon wrote:
>> On 06/12/2012 01:53 AM, Mohammed, Afzal wrote:
>>> On Tue, Jun 12, 2012 at 01:26:29, Hunter, Jon wrote:
>
My preference would be to store gpmc_l3_clk in the pdata a
Simple DTS file for OMAP2420H4 board adding memory information to allow
device-tree testing on an OMAP2420. OMAP2420H4 board has 64MB of RAM.
Verified that kernel boots with DT using a simple RAMDISK file-system on
OMAP2420H4.
Signed-off-by: Jon Hunter
---
arch/arm/boot/dts/omap2420-h4.dts
roblem.
This is based upon latest linux-omap master (3.5-rc1) git tree.
Signed-off-by: Jon Hunter
---
arch/arm/boot/dts/omap2.dtsi |2 ++
1 file changed, 2 insertions(+)
diff --git a/arch/arm/boot/dts/omap2.dtsi b/arch/arm/boot/dts/omap2.dtsi
index f2ab4ea..581cb08 100644
--- a/arch/arm/bo
copyright date
Jon Hunter (2):
arm/dts: OMAP2: Add support for OMAP2420H4 Board
arm/dts: OMAP2: Fix interrupt controller binding
arch/arm/boot/dts/omap2.dtsi |2 ++
arch/arm/boot/dts/omap2420-h4.dts | 20
2 files changed, 22 insertions(+)
create mode 100644
On 06/12/2012 07:13 PM, Jon Hunter wrote:
>
> On 06/12/2012 07:10 PM, Jon Hunter wrote:
>> This series fixes the OMAP2 interrupt controller binding and adds support for
>> the OMAP2420H4 board. I have verified that the kernel boots with device-tree
>> on this board.
>
On 06/12/2012 07:10 PM, Jon Hunter wrote:
> This series fixes the OMAP2 interrupt controller binding and adds support for
> the OMAP2420H4 board. I have verified that the kernel boots with device-tree
> on this board.
Oops! Forgot to change SDP to H4 in the $SUBJECT. However, should b
Simple DTS file for OMAP2420H4 board adding memory information to allow
device-tree testing on an OMAP2420. OMAP2420H4 board has 64MB of RAM.
Verified that kernel boots with DT using a simple RAMDISK file-system on
OMAP2420H4.
Signed-off-by: Jon Hunter
---
arch/arm/boot/dts/omap2420-sdp.dts
roblem.
This is based upon latest linux-omap master (3.5-rc1) git tree.
Signed-off-by: Jon Hunter
---
arch/arm/boot/dts/omap2.dtsi |2 ++
1 file changed, 2 insertions(+)
diff --git a/arch/arm/boot/dts/omap2.dtsi b/arch/arm/boot/dts/omap2.dtsi
index f2ab4ea..581cb08 100644
--- a/arch/arm/bo
copyright date
Jon Hunter (2):
arm/dts: OMAP2: Add support for OMAP2420H4 Board
arm/dts: OMAP2: Fix interrupt controller binding
arch/arm/boot/dts/omap2.dtsi |2 ++
arch/arm/boot/dts/omap2420-sdp.dts | 20
2 files changed, 22 insertions(+)
create mode 100644
On 06/12/2012 04:31 PM, Will Deacon wrote:
> On Tue, Jun 12, 2012 at 10:17:16PM +0100, Jon Hunter wrote:
>> Hi Will,
>
> Hi Jon,
>
>> On 06/12/2012 04:28 AM, Will Deacon wrote:
>>>
>>> Well, I tried that and the results are pretty whacky: the event
Hi Will,
On 06/12/2012 04:28 AM, Will Deacon wrote:
> On Mon, Jun 11, 2012 at 08:01:23PM +0100, Jon Hunter wrote:
>> Hi Will,
>
> Hello,
>
>> On 06/11/2012 12:39 PM, Will Deacon wrote:
>>> This looks better to me, so I took it for a spin on my 4460 (thanks
&
On 06/11/2012 09:26 AM, Afzal Mohammed wrote:
> Create a minimal driver out of gpmc code.
> Responsibilities handled by earlier gpmc
> initialization is now achieved in probe.
>
> Signed-off-by: Afzal Mohammed
> ---
> arch/arm/mach-omap2/gpmc.c | 170
>
On 06/11/2012 09:26 AM, Afzal Mohammed wrote:
> gpmc driver platform definitions
>
> Signed-off-by: Afzal Mohammed
> ---
> arch/arm/plat-omap/include/plat/gpmc.h | 49
>
> 1 file changed, 49 insertions(+)
>
> diff --git a/arch/arm/plat-omap/include/plat/gpmc
On 06/11/2012 09:27 AM, Afzal Mohammed wrote:
> Helper for setting GPMC timing by taking input as register values.
When are the timings calculated? Why not just use the existing
gpmc_cs_set_timings()?
I guess I am not convinced that we need to have multiple formats to pass
timings such as clock,
On 06/11/2012 09:27 AM, Afzal Mohammed wrote:
> GPMC has a writeprotect pin that can be connected to
> peripherals. If any CS wants to enable writeprotect,
> writeprotect will be enabled, once CS configurations
> are finished.
I am still wondering if we should warn against multiple devices using
On 06/11/2012 09:27 AM, Afzal Mohammed wrote:
> Helper for configuring waitpin. There are two parts to it;
> configuring at CS level and the other at device level.
> A device embedding multiple CS has been provided the
> capability to use same waitpin (different waitpins has not
> been supported a
On 06/12/2012 04:00 AM, Mohammed, Afzal wrote:
> Hi Jon,
>
> On Tue, Jun 12, 2012 at 04:29:09, Hunter, Jon wrote:
>
>>> +enum {
>>> + GPMC_WAITPIN_IDX0,
>>> + GPMC_WAITPIN_IDX1,
>>> + GPMC_WAITPIN_IDX2,
>>> + GPMC_WAITPIN_IDX3,
>>> + GPMC_NR_WAITPIN
>>> +};
>>
>> Max number of wait pi
On 06/12/2012 03:44 AM, Mohammed, Afzal wrote:
> Hi Jon,
>
> On Tue, Jun 12, 2012 at 04:00:20, Hunter, Jon wrote:
>
>> Nit, "holler" is slang. Just say WARN.
>
> It was a deliberate attempt to add human (or read humorous) touch
I like that, but I wonder if it could confuse some :-)
Jon
--
To
On 06/12/2012 07:58 AM, Mohammed, Afzal wrote:
> Hi Jon,
>
> On Tue, Jun 12, 2012 at 14:10:08, Mohammed, Afzal wrote:
>
+ l |= conf & GPMC_CONFIG1_DEVICETYPE_NAND;
+ l |= conf & GPMC_CONFIG1_DEVICESIZE_16;
>>>
>>> I can see that it works to use the above definitions as masks because
On 06/12/2012 03:40 AM, Mohammed, Afzal wrote:
> Hi Jon,
>
> On Tue, Jun 12, 2012 at 03:13:02, Hunter, Jon wrote:
>
>>> +static void gpmc_setup_cs_config(unsigned cs, unsigned conf)
>>> +{
>>> + u32 l = gpmc_cs_read_reg(cs, GPMC_CS_CONFIG1);
>>
>> Why is it necessary to read the register first
On 06/12/2012 03:30 AM, Mohammed, Afzal wrote:
> Hi Jon,
>
> On Tue, Jun 12, 2012 at 02:27:09, Hunter, Jon wrote:
>
>>> +static __devinit int gpmc_setup_cs_mem(struct gpmc_cs_data *cs,
>>> + struct resource *res)
>
>>> + return 1;
>>> +}
>>
>> Nit-pic
On 06/12/2012 02:16 AM, Mohammed, Afzal wrote:
> Hi Jon,
>
> On Tue, Jun 12, 2012 at 02:13:22, Hunter, Jon wrote:
>
>>> + gpmc_revision = (l >> 4) & 0xf;
>>
>> Why are you only storing the major part of the rev? Why not keep both parts?
>
> Does having minor revision add any value ?, at least
On 06/12/2012 02:09 AM, Mohammed, Afzal wrote:
> Hi Jon,
>
> This change is required only till driver migration of all platforms
> are done, after it, this hackish patch has to be reverted. This has
> been done so that existing interface will work for each patch of
> this series as well as till a
On 06/12/2012 01:53 AM, Mohammed, Afzal wrote:
> Hi Jon,
>
> On Tue, Jun 12, 2012 at 01:26:29, Hunter, Jon wrote:
>
>>> + pdev = omap_device_build(name, -1, oh, pdata,
>>> + sizeof(*pdata), NULL, 0, 0);
>>> + if (IS_ERR(pdev)) {
>>> + WARN(1, "Can'
On 06/12/2012 01:37 AM, Mohammed, Afzal wrote:
> Hi Jon,
>
> On Tue, Jun 12, 2012 at 00:19:35, Hunter, Jon wrote:
>
>> What boards have been tested with this change?
>
> Beagle board, after applying all 5 series of patches, without all
> patch series it can't be tested for beagle board as it d
On 06/12/2012 01:16 AM, Mohammed, Afzal wrote:
> Hi Jon,
>
> On Tue, Jun 12, 2012 at 00:06:30, Hunter, Jon wrote:
>
>> I agree with getting rid of the first instance at the beginning of
>> _set_async_mode, but why get rid of the above one? Are you assuming that
>> by default it is in async mode
On 06/12/2012 02:20 AM, Tony Lindgren wrote:
> * Jon Hunter [120607 15:15]:
>> Simple DTS file for OMAP2420 SDP adding memory information to allow
>> device-tree
>> testing on an OMAP2420 SDP.
>>
>> Verified that kernel boots with DT using a simple RAMDISK file-
On 06/11/2012 09:30 PM, Zumeng Chen wrote:
>
>
> 2012/6/11 Jon Hunter mailto:jon-hun...@ti.com>>
>
>
> On 06/11/2012 09:00 AM, Zumeng Chen wrote:
> > A typo fix for this cosmetic change and mute a failed message from
> > a unnecessary setting
On 06/11/2012 09:27 AM, Afzal Mohammed wrote:
> Helper for reconfiguring CS, peripheral that necessitated
> it was OneNAND.
Why? I think you need to add more about why this was needed.
Jon
> Signed-off-by: Afzal Mohammed
> ---
> arch/arm/mach-omap2/gpmc.c | 32
> +++
On 06/11/2012 09:27 AM, Afzal Mohammed wrote:
> Helper for configuring waitpin. There are two parts to it;
> configuring at CS level and the other at device level.
> A device embedding multiple CS has been provided the
> capability to use same waitpin (different waitpins has not
> been supported a
On 06/11/2012 09:27 AM, Afzal Mohammed wrote:
> Some of the GPMC peripherals depend on bootloader to do the
> configuration. This facility is deprecated, notify user
> about the present GPMC settings & inform that that relying
> on bootloader for GPMC setting is deprecated.
Nit, "holler" is slang
On 06/11/2012 09:27 AM, Afzal Mohammed wrote:
> Some of the timing configuration like extra delay
> has bool type configurations. Provide a helper so
> that these too can be configured in Kernel.
>
> Signed-off-by: Afzal Mohammed
> ---
> arch/arm/mach-omap2/gpmc.c | 55
>
On 06/11/2012 09:26 AM, Afzal Mohammed wrote:
> Helper for configuring given CS based on flags.
>
> Signed-off-by: Afzal Mohammed
> ---
> arch/arm/mach-omap2/gpmc.c | 33
>
> arch/arm/plat-omap/include/plat/gpmc.h |5 +
> 2 files changed,
On 06/11/2012 09:26 AM, Afzal Mohammed wrote:
> Helpers for propulating given resource structure
> with memory & interrupt information.
>
> Signed-off-by: Afzal Mohammed
> ---
> arch/arm/mach-omap2/gpmc.c | 45
>
> 1 file changed, 45 insertions(+)
On 06/11/2012 09:26 AM, Afzal Mohammed wrote:
> Create a minimal driver out of gpmc code.
> Responsibilities handled by earlier gpmc
> initialization is now achieved in probe.
>
> Signed-off-by: Afzal Mohammed
> ---
> arch/arm/mach-omap2/gpmc.c | 170
>
Hi Afzal,
On 06/11/2012 09:26 AM, Afzal Mohammed wrote:
> A driver is being created out of GPMC code. This is being
> attempted to acheive by not breaking existing interface,
> necessitating requirement of GPMC peripherals being able
> to work with as well as without the help of driver. To not
> b
Hi Afzal,
On 06/11/2012 09:26 AM, Afzal Mohammed wrote:
> Create API for platforms to adapt gpmc to HWMOD
>
> Signed-off-by: Afzal Mohammed
> ---
> arch/arm/mach-omap2/gpmc.c | 31 +++
> arch/arm/plat-omap/include/plat/gpmc.h |2 ++
> 2 files change
Hi Will,
On 06/11/2012 12:39 PM, Will Deacon wrote:
> On Fri, Jun 08, 2012 at 04:24:32PM +0100, Jon Hunter wrote:
>> Hi Will,
>
> Hi Jon,
>
>> Here is an updated version. I was going to send out a V3, but I wanted
>> to wait to see if others had more comments first
Hi Afzal,
On 06/11/2012 09:02 AM, Afzal Mohammed wrote:
> Configure busturnaround, cycle2cycledelay, waitmonitoringtime,
> clkactivationtime in gpmc_cs_set_timings(). This is done so
> that boards can configure these parameters of gpmc in Kernel
> instead of relying on bootloader.
What boards hav
Hi Afzal,
On 06/11/2012 09:01 AM, Afzal Mohammed wrote:
> Reorganize gpmc-onenand initialization so that changes
> required for gpmc driver migration can be made smooth.
>
> Ensuring sync read/write are disabled in onenand cannot be
> expect to work properly unless GPMC is setup, this has been
>
change?
Otherwise, looks good.
Reviewed-by: Jon Hunter
Cheers
Jon
[1] http://www.alwaysinnovating.com/wiki/index.php/Booting
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On 06/11/2012 09:00 AM, Zumeng Chen wrote:
> A typo fix for this cosmetic change and mute a failed message from
> a unnecessary setting of some parent clk for usbhs_omap on OMAP3EVM.
>
> Signed-off-by: Zumeng Chen
> ---
> drivers/mfd/omap-usb-host.c |4 +++-
> 1 files changed, 3 insertions(
On 06/11/2012 09:00 AM, Zumeng Chen wrote:
> Signed-off-by: Vaibhav Hiremath
> Tested-by: Zumeng Chen
I think that you need to have something in the changelog above, even if
this is a trivial change.
> ---
> arch/arm/mach-omap2/board-omap3evm.c | 39
> ++
>
On 06/11/2012 09:00 AM, Zumeng Chen wrote:
> These patches fix misc problems when reflash ti-omap3530evm for
> master branch on Linux-omap. Currently they have been tested on
> 3530evm but were not ack'ed.
>
> Most of them are the leftovers from the great original developers
> with my the latest
Hi Stephen, Arnd,
Been a while ;-)
On 05/21/2012 03:32 PM, Stephen Warren wrote:
> On 05/21/2012 12:18 PM, Arnd Bergmann wrote:
>> On Monday 21 May 2012, Stephen Warren wrote:
The point with the direction was that it covers most cases and makes
them rather simple, while for the rar
Hi Will,
On 06/08/2012 04:47 AM, Will Deacon wrote:
> Hi Jon,
>
> On Thu, Jun 07, 2012 at 10:22:03PM +0100, Jon Hunter wrote:
>> diff --git a/arch/arm/kernel/perf_event.c b/arch/arm/kernel/perf_event.c
>> index 186c8cb..00adb98 100644
>> --- a/arch/arm/kernel/per
Hi Will,
On 06/08/2012 04:47 AM, Will Deacon wrote:
> Hi Jon,
>
> On Thu, Jun 07, 2012 at 10:22:03PM +0100, Jon Hunter wrote:
>> diff --git a/arch/arm/kernel/perf_event.c b/arch/arm/kernel/perf_event.c
>> index 186c8cb..00adb98 100644
>> --- a/arch/arm/kernel/per
On 06/07/2012 04:22 PM, Jon Hunter wrote:
> This series adds PMU support for OMAP4 devices. This is based upon Will
> Deacons
> series [1]. This series fixes the management of the EMU power domain so that
> PMU can be enabled at runtime and low-power states are not prevented when PMU
On 06/07/2012 06:00 PM, Jon Hunter wrote:
> OMAP4470 currently fails to boot, printing various messages such as ...
>
> omap_hwmod: mpu: cannot clk_get main_clk dpll_mpu_m2_ck
> omap_hwmod: mpu: cannot _init_clocks
> [ cut here ]
> WARNING: at a
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