commit aa4f99638b (ARM: OMAP2+: Use omap initcalls) converted
the initcalls here, but did not #include soc.h where the omap
inicalls are defined.
To fix, #include soc.h
Signed-off-by: Kevin Hilman khil...@linaro.org
---
Tony, the patch that broke this was introduced in your
omap-for-v3.9
NeilBrown ne...@suse.de writes:
On Tue, 12 Feb 2013 13:03:36 -0800 Kevin Hilman khil...@linaro.org wrote:
NeilBrown ne...@suse.de writes:
[...]
My patch was fixing a real hang when musb was built-in (or loaded), in
host-mode (mini-A cable attached) but no devices attached. I just tried
Hi Russ,
Russ Dill russ.d...@ti.com writes:
After the gpio-omap runtime PM changes, I noticed that the
omap2_gpio_prepare_for_idle/omap2_gpio_resume_after_idle functions are
a NOP in the case of suspend.
void omap2_gpio_prepare_for_idle(int pwr_mode)
{
struct gpio_bank *bank;
the appropriate flags in the TPTC0 hwmod entry.
Signed-off-by: Vaibhav Bedia vaibhav.be...@ti.com
Cc: Santosh Shilimkar santosh.shilim...@ti.com
Cc: Benoit Cousson b-cous...@ti.com
Cc: Paul Walmsley p...@pwsan.com
Cc: Kevin Hilman khil...@deeprootsystems.com
Cc: Vaibhav Hiremath hvaib
...@ti.com
Cc: Tony Lingren t...@atomide.com
Cc: Santosh Shilimkar santosh.shilim...@ti.com
Cc: Benoit Cousson b-cous...@ti.com
Cc: Paul Walmsley p...@pwsan.com
Cc: Kevin Hilman khil...@deeprootsystems.com
Thanks for the updated series here, and my apologies for the delayed
review.
I've just
the code accordingly so that the expensive cpu_suspend() path
can be avoided for the shallow CPU power states like CPU PD INA/CSWR.
Cc: Kevin Hilman khil...@deeprootsystems.com
Reported-by: Richard Woodruff r-woodru...@ti.com
Signed-off-by: Santosh Shilimkar santosh.shilim...@ti.com
Looks OK
slightly]
Signed-off-by: Paul Walmsley p...@pwsan.com
FWIW
Acked-by: Kevin Hilman khil...@linaro.org
---
arch/arm/mach-omap2/pm44xx.c | 19 ++-
1 file changed, 18 insertions(+), 1 deletion(-)
diff --git a/arch/arm/mach-omap2/pm44xx.c b/arch/arm/mach-omap2/pm44xx.c
index
Grant Likely grant.lik...@secretlab.ca writes:
On Fri, 14 Dec 2012 18:05:53 +1100, NeilBrown ne...@suse.de wrote:
On Mon, 10 Sep 2012 10:57:07 -0700 Kevin Hilman khil...@deeprootsystems.com
wrote:
OK thanks, I'll queue this up for v3.6-rc as this should qualify as a
regression.
I
Hiremath, Vaibhav hvaib...@ti.com writes:
On Mon, Dec 03, 2012 at 23:49:36, Kevin Hilman wrote:
Hiremath, Vaibhav hvaib...@ti.com writes:
+static struct omap_hwmod am33xx_debugss_hwmod = {
+ .name = debugss,
+ .class = am33xx_debugss_hwmod_class
Hiremath, Vaibhav hvaib...@ti.com writes:
+static struct omap_hwmod am33xx_debugss_hwmod = {
+ .name = debugss,
+ .class = am33xx_debugss_hwmod_class,
+ .clkdm_name = l3_aon_clkdm,
+ .main_clk = debugss_ick,
+ .flags
Signed-off-by: Kevin Hilman khil...@deeprootsystems.com
---
MAINTAINERS | 6 +++---
1 file changed, 3 insertions(+), 3 deletions(-)
diff --git a/MAINTAINERS b/MAINTAINERS
index 9386a63..17f2ad2 100644
--- a/MAINTAINERS
+++ b/MAINTAINERS
@@ -5236,7 +5236,7 @@ S:Maintained
F: arch/arm
Roger Quadros rog...@ti.com writes:
Kevin,
On 11/16/2012 10:08 PM, Kevin Hilman wrote:
Roger Quadros rog...@ti.com writes:
Hi,
This patchset addresses the following
- Avoid addressing clocks one by one by name and use a for loop + bunch
of cleanups.
- Get number of channels/ports
AnilKumar Ch anilku...@ti.com writes:
From: Colin Foe-Parker colin.foepar...@logicpd.com
Set tps65217 PMIC status to OFF if power enable toggle is
supported. Also adds platform data flag, which should be
passed from board init data.
nit: changelog mentions platform_data, but the code is
AnilKumar Ch anilku...@ti.com writes:
Enable system power off control for BeagleBone in am335x-bone.dts file
under rtc node. RTC is the incharge of controlling the system power.
This flag is used by the driver to hook up the pm_power_off system call.
Signed-off-by: AnilKumar Ch
Roger Quadros rog...@ti.com writes:
Hi,
This patchset addresses the following
- Avoid addressing clocks one by one by name and use a for loop + bunch
of cleanups.
- Get number of channels/ports dynamically either from revision register
or from platform data. Avoids getting clocks that
From: Kevin Hilman khil...@ti.com
commit c9621844 (ARM: OMAP4: PM: add errata support) introduced errata
handling for OMAP4, but was broken when CONFIG_PM=n.
When CONFIG_PM=n, pm44xx.c is not compiled, yet that is where pm44xx_errata
is defined. However, these errata are needed for the SMP boot
From: Kevin Hilman khil...@ti.com
commit 908b75e8 (ARM: OMAP: add support for oscillator setup) added a new
API for oscillator setup, but is broken when CONFIG_PM=n.
The new functions have dummy definitions when CONFIG_PM=n, but also have
full implementations available, which conflict.
To fix
Paul Walmsley p...@pwsan.com writes:
On Fri, 9 Nov 2012, Kevin Hilman wrote:
I found that disabling MMC in the config made the tests pass again, so
then bisected it down to the commit below removing SYSCONFIG
accesses[2]. I haven't had the time to find out exactly the cause, but
clearly
Tero Kristo t-kri...@ti.com writes:
On Tue, 2012-11-06 at 13:19 -0800, Kevin Hilman wrote:
Tero Kristo t-kri...@ti.com writes:
Hi Kevin,
On Mon, 2012-11-05 at 14:23 -0800, Kevin Hilman wrote:
Hi Tero,
Tero Kristo t-kri...@ti.com writes:
Hi,
Changes compared
: Tony Lindgren t...@atomide.com
Cc: Kevin Hilman khil...@ti.com
looks good to me. I would still suggest adding a REVISIT or FIXME note
stating that this should be moved to SCM driver eventually ;-)
Other than that:
Acked-by: Felipe Balbi ba...@ti.com
Thanks will try to get this in for v3.8
Tony Lindgren t...@atomide.com writes:
* Paul Walmsley p...@pwsan.com [121112 11:33]:
Here are some basic OMAP test results for Linux v3.7-rc5.
Logs and other details at:
http://www.pwsan.com/omap/testlogs/test_v3.7-rc5/2012081034/
Passing tests
-
Boot to
Hi Mark,
Mark A. Greer mgr...@animalcreek.com writes:
From: Mark A. Greer mgr...@animalcreek.com
Convert the omap-sham crypto driver to use the
pm_runtime API instead of the clk API.
CC: Kevin Hilman khil...@deeprootsystems.com
CC: Paul Walmsley p...@pwsan.com
CC: Dmitry Kasatkin
From: Kevin Hilman khil...@ti.com
On OMAP4 boards using the TWL6030 PMIC, the sys_drm_msecure is
connected to the MSECURE input of the TWL6030 PMIC. This signal
controls the secure-mode operation of the PMIC. If its not mux'd
correctly, some functionality of the PMIC will not be accessible
Mike Turquette mturque...@ti.com writes:
Quoting Rajendra Nayak (2012-11-07 21:02:59)
On Thursday 08 November 2012 06:42 AM, Mike Turquette wrote:
I also tested on OMAP4460 Panda-ES. Boot is fine and PRCM programming
appears sane. However Panda-ES never comes back from suspend/resume.
Hi Sricharan,
R Sricharan r.sricha...@ti.com writes:
In the latest, pad mux and clocks for all
non-essential modules at U-BOOT were removed.
This might also cause the problem.
We can bring this back in u-boot by adding the following macros
and check if it works fine again.
Bedia, Vaibhav vaibhav.be...@ti.com writes:
Hi Kevin,
On Wed, Nov 07, 2012 at 06:36:06, Kevin Hilman wrote:
Bedia, Vaibhav vaibhav.be...@ti.com writes:
On Mon, Nov 05, 2012 at 23:10:27, Kevin Hilman wrote:
[...]
Also, if there are drivers for these devices, won't this interfere
Tero Kristo t-kri...@ti.com writes:
Hi Kevin,
On Mon, 2012-11-05 at 14:23 -0800, Kevin Hilman wrote:
Hi Tero,
Tero Kristo t-kri...@ti.com writes:
Hi,
Changes compared to previous version:
- rebased on top of 3.7-rc1
- applies on top of latest func pwrst code (v6)
- added back
Kevin Hilman khil...@deeprootsystems.com writes:
Tero Kristo t-kri...@ti.com writes:
Added similar PM errata flag support as omap3 has. This should be used
in similar manner, set the flags during init time, and check the flag
values during runtime.
Signed-off-by: Tero Kristo t-kri
Tony,
Here's a small series that fixes some errata to make suspend/resume
work on OMAP4460.
This is not a regression and has been broken for awhile, so this is v3.8
material, not v3.7.
Kevin
The following changes since commit 3d70f8c617a436c7146ecb81df2265b4626dfe89:
Linux 3.7-rc4
Tony,
Here is some PM related cleanup targetted for v3.8.
Kevin
The following changes since commit 6f0c0580b70c89094b3422ba81118c7b959c7556:
Linux 3.7-rc2 (2012-10-20 12:11:32 -0700)
are available in the git repository at:
Tony,
Here's some minor platform_data related updates for SR for v3.8.
Kevin
The following changes since commit ddffeb8c4d0331609ef2581d84de4d763607bd37:
Linux 3.7-rc1 (2012-10-14 14:41:04 -0700)
are available in the git repository at:
Tony,
Here's a set of voltage layer updates for v3.8.
This implements all the framework changes necessary to get
auto-ret/auto-off working, but the main change to enable
auto-ret/auto-off is awaiting the functional power state changes that
are still under review/rework.
Also, this fixes that
Hello,
I just noticed that the kernel wakeup from suspend using RTC is broken
after I upgraded u-boot from v2012.04.01 to v2012.10 on my
OMAP4430/Panda and OMAP4460/Panda-ES.
I haven't isolated the cause yet, but am hoping someone might have a
pointer about where to start digging.
Kevin
--
To
Bedia, Vaibhav vaibhav.be...@ti.com writes:
On Mon, Nov 05, 2012 at 23:10:27, Kevin Hilman wrote:
[...]
Also, if there are drivers for these devices, won't this interfere?
Hmm, I can think of the following scenarios
1. Runtime PM adapted drivers are compiled in - We'll have to ensure
+Santosh (to help with EMIF questions/comments)
On 11/02/2012 12:32 PM, Vaibhav Bedia wrote:
AM335x supports various low power modes as documented
in section 8.1.4.3 of the AM335x TRM which is available
@ http://www.ti.com/litv/pdf/spruh73f
DeepSleep0 mode offers the lowest power mode with
Bedia, Vaibhav vaibhav.be...@ti.com writes:
On Sat, Nov 03, 2012 at 18:34:30, Kevin Hilman wrote:
[...]
Doesn't this also mean that you won't get timer wakeups
in idle? Or are you keeping the domain where the clockevent is
on during idle?
The lowest idle state that we
Bedia, Vaibhav vaibhav.be...@ti.com writes:
On Mon, Nov 05, 2012 at 20:23:11, Shilimkar, Santosh wrote:
[...]
On OMAP the OCMC RAM is always clocked and doesn't need any special
clock enable. CM_L3_2_OCMC_RAM_CLKCTRL module mode field is read only.
Isn't it same on AMXX ?
On AM33xx,
Hi Tero,
Tero Kristo t-kri...@ti.com writes:
Hi,
Changes compared to previous version:
- rebased on top of 3.7-rc1
- applies on top of latest func pwrst code (v6)
- added back patch #1 to this set (it wasn't queued yet after all)
- added patch #7 for fixing a bug in the functional pwrst
Tero Kristo t-kri...@ti.com writes:
From: Colin Cross ccr...@android.com
'Workaround for ROM bug because of CA9 r2pX gic control'
register change disables the gic distributor while the secondary
Just to clarify: this is referring to PATCH 3/8 of this series, correct?
Kevin
--
To unsubscribe
Tero Kristo t-kri...@ti.com writes:
Added similar PM errata flag support as omap3 has. This should be used
in similar manner, set the flags during init time, and check the flag
values during runtime.
Signed-off-by: Tero Kristo t-kri...@ti.com
These allow basic suspend/resume to work on
From: Kevin Hilman khil...@ti.com
commit 24d7b40a (ARM: OMAP2+: PM: MPU DVFS: use generic CPU device for
MPU-SS) updated the regulator name used for the MPU regulator, but only
updated OMAP3, not OMAP4. Fix the OMAP4 name as well, otherwise CPUfreq
fails to find the MPU regulator.
Signed-off
Jean Pihet jean.pi...@newoldbits.com writes:
[...]
I ran some intensive stress tests on the I2C and ... unfortunately I
could not trigger the problem. It looks like the issue is caused by
some transient situation where the CORE and/or I2C is in a low power
state.
FYI... I just ran across
Kevin Hilman (2):
ARM: OMAP2+: PM: add missing newline to VC warning message
ARM: OMAP4: PM: fix regulator name for VDD_MPU
arch/arm/mach-omap2/twl-common.c | 2 +-
arch/arm/mach-omap2/vc.c | 2 +-
2 files changed, 2
Hi Tero,
Tero Kristo t-kri...@ti.com writes:
This set applies on top of linux-3.6-rc5 + func-pwrst code (from Jean) +
omap4 core retention set (from me) + PM usecounting changes set (from me).
Since the functional pwrst and usecounting changes are still under
review, I've taken the patches
On 11/02/2012 12:32 PM, Vaibhav Bedia wrote:
AM33XX has only one usable timer in the WKUP domain.
After reading the TRM, it seems there are two: DMTIMER0 and DMTIMER1.
Looking at the hwmod data though, I don't see a hwmod for DMTIMER0. Can
you explain a little about why DMTIMER0 is
On 11/02/2012 09:43 AM, Pantelis Antoniou wrote:
[...]
And then use the standard DT support to create later the platform_device that
does represent the new super-cape devices.
We know this is the ideal case. In fact that's the long term goal and we had
internal discussions about it.
On 11/02/2012 01:32 PM, Vaibhav Bedia wrote:
AM33XX has only one usable timer in the WKUP domain.
Currently the timer instance in WKUP domain is used
as the clockevent and the timer in non-WKUP domain
as the clocksource. The timer in WKUP domain can keep
running in suspend from a 32K clock and
-by: Kevin Hilman khil...@ti.com
Benoit, feel free to take this one as well.
Kevin
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On 11/02/2012 01:32 PM, Vaibhav Bedia wrote:
From: Vaibhav Hiremath hvaib...@ti.com
The current OMAP timer code registers two timers -
one as clocksource and one as clockevent.
AM33XX has only one usable timer in the WKUP domain
so one of the timers needs suspend-resume support
to restore the
On 11/02/2012 01:32 PM, Vaibhav Bedia wrote:
Signed-off-by: Vaibhav Bedia vaibhav.be...@ti.com
Even simple patches need a simple changelog.
Kevin
arch/arm/boot/dts/am33xx.dtsi | 11 +++
1 files changed, 11 insertions(+), 0 deletions(-)
diff --git
On 11/02/2012 01:32 PM, Vaibhav Bedia wrote:
AM33XX PM code depends on Mailbox module for IPC
between MPU and WKUP_M3.
OK, but what if I try to build for AM33xx without starting from
omap2plus_defconfig?
IOW, instead of changing the default defconfig, AM33xx should select
this when PM
is
T
On 11/03/2012 12:47 PM, Bedia, Vaibhav wrote:
Hi Kevin,
On Sat, Nov 03, 2012 at 17:13:54, Kevin Hilman wrote:
On 11/02/2012 01:32 PM, Vaibhav Bedia wrote:
AM33XX has only one usable timer in the WKUP domain.
Currently the timer instance in WKUP domain is used
as the clockevent and the timer
On 10/23/2012 10:43 PM, Nishanth Menon wrote:
SoC integration of SmartReflex AVS block is varied. Some use
Voltage Processor for a hardware loop in certain OMAP SoC (called
hardware loop), while others have just the AVS block without
hardware loop automatic calibration mechanism for AVS block
to
Hi Nishanth,
On 10/25/2012 09:21 AM, Jean Pihet wrote:
Hi Nishant,
On Tue, Oct 23, 2012 at 11:43 PM, Nishanth Menon n...@ti.com wrote:
smartreflex.c now resides in drivers/power/avs directory, but class driver
is in mach-omap2. High time we move it off to drivers/power/avs.
Great to see the
On 11/03/2012 01:17 PM, Bedia, Vaibhav wrote:
On Sat, Nov 03, 2012 at 17:45:03, Kevin Hilman wrote:
On 11/02/2012 01:32 PM, Vaibhav Bedia wrote:
From: Vaibhav Hiremath hvaib...@ti.com
The current OMAP timer code registers two timers -
one as clocksource and one as clockevent.
AM33XX has only
On 11/03/2012 01:17 PM, Bedia, Vaibhav wrote:
On Sat, Nov 03, 2012 at 17:50:25, Kevin Hilman wrote:
On 11/02/2012 01:32 PM, Vaibhav Bedia wrote:
AM33XX PM code depends on Mailbox module for IPC
between MPU and WKUP_M3.
OK, but what if I try to build for AM33xx without starting from
Linus Walleij linus.wall...@linaro.org writes:
On Wed, Oct 31, 2012 at 9:10 PM, Kevin Hilman
khil...@deeprootsystems.com wrote:
Linus Walleij linus.wall...@linaro.org writes:
piece of hardware, this would be the right thing to do,
and I think the in-kernel examples are all simple
Santosh Shilimkar santosh.shilim...@ti.com writes:
[...]
Just to summaries, there are 3 things we are talking here.
Santosh, thanks for the summary. You are right on.
1. Delaying the idle with a timeout which $subject patch is
trying to do to reduce latency for interrupts. That itself
is
Hi Jean,
Jean Pihet jean.pi...@newoldbits.com writes:
[...]
Based on a very quick look, I'd say the original patch 3db11fe is broken.
I don't see how it can ensure that its PM_QOS_CPU_DMA_LATENCY request is
honored when CONFIG_CPU_IDLE=n. CONFIG_CPU_IDLE=n is the default for
of the drivers. IME the SoCs where you need to do
different things for different IPs shoudl mostly still get some reuse
out of such an approach.
Talking to Kevin Hilman today he was also stressing that
power domains is a good thing for handling resources, especially
when replacing prior hacks
Mike Turquette mturque...@ti.com writes:
From: Mike Turquette mturque...@linaro.org
Signed-off-by: Mike Turquette mturque...@linaro.org
Re: $SUBJECT... ok, I'll bite why?
(I'm sure I will find out when I read the rest of the series, but I'm
impatient and picky and would like to know
Mike Turquette mturque...@ti.com writes:
From: Mike Turquette mturque...@linaro.org
Implement the voltdm-get_voltage callback for the voltage controller
driver.
nit: since it's not actually used in this series, it should say
Impelment the function that will be used as the -get_voltage()
Hi Mike,
Mike Turquette mturque...@ti.com writes:
From: Mike Turquette mturque...@linaro.org
This series creates a new callback for struct voltagedomain,
.get_voltage. This fetches the voltage from hardware, if possible, and
returns it to the caller. We use this call to populate
the debounce clock while debounce is enabled.
Special thanks to Kevin Hilman for root causing the bug. This fix is a
collaborative effort with inputs from Kevin Hilman, Grazvydas Ignotas and
Santosh Shilimkar.
Testing:
- This has been unit tested on an OMAP3430 Beagle board, by requesting
Matt Porter mpor...@ti.com writes:
On Tue, Oct 23, 2012 at 02:03:43PM -0700, Kevin Hilman wrote:
Matt Porter mpor...@ti.com writes:
[...]
Ok, very quick update...no need to mess around with the eeprom. I just
received the official word on what will be supported. Since A2 is
pre
Jon Hunter jon-hun...@ti.com writes:
On 10/24/2012 12:10 PM, Kevin Hilman wrote:
From: Kevin Hilman khil...@ti.com
When a GPIO bank is freed or shutdown, ensure that the banks
dbck_enable_mask is cleared also. Otherwise, context restore on
subsequent off-mode transition will restore
Jon Hunter jon-hun...@ti.com writes:
On 10/25/2012 02:00 AM, Santosh Shilimkar wrote:
On Thursday 25 October 2012 04:24 AM, Jon Hunter wrote:
On 10/24/2012 12:10 PM, Kevin Hilman wrote:
From: Kevin Hilman khil...@ti.com
When a GPIO bank is freed or shutdown, ensure that the banks
From: Kevin Hilman khil...@ti.com
When a GPIO is freed or shutdown, ensure that the proper bit in
dbck_enable_mask is cleared also. Otherwise, context restore on
subsequent off-mode transition will restore previous debounce values
from the shadow copies (bank-context.debounce*) leading
+Paul
Felipe Balbi ba...@ti.com writes:
if we allow compiler reorder our writes, we could
fall into a situation where dev-buf_len is reset
for no apparent reason.
Any chance this would help with the bug Paul found with I2C timeouts on
beagle userspace startup?
Kevin
This bug was found
Jon Hunter jon-hun...@ti.com writes:
On 10/24/2012 12:23 PM, Will Deacon wrote:
On Wed, Oct 24, 2012 at 04:06:07PM +0100, Jon Hunter wrote:
On 10/24/2012 09:32 AM, Will Deacon wrote:
Hmmm, now I start to wonder whether your original idea of having separate
callbacks for enable/disable irq
Tony Lindgren t...@atomide.com writes:
* Russell King - ARM Linux li...@arm.linux.org.uk [121023 03:12]:
On Fri, Oct 12, 2012 at 04:54:34PM +0100, Russell King - ARM Linux wrote:
For those who don't bother looking at my kautobuild boot tests on the OMAP
boards I have, here's the errors
From: Kevin Hilman khil...@ti.com
Add missing newline to warning message to avoid annoying
wrapping problems during kernel boot like this one:
omap_vc_i2c_init: I2C config for vdd_iva does not match other channels (0).
omap_vc_i2c_init: I2C config for vdd_mpu does not match other channels
Kevin Hilman khil...@deeprootsystems.com writes:
Tony Lindgren t...@atomide.com writes:
[...]
omap_hsmmc omap_hsmmc.4: Failed to get debounce clk
omap_vc_i2c_init: I2C config for vdd_iva does not match other channels (0).
omap_vc_i2c_init: I2C config for vdd_mpu does not match other
a little overhead
when initialising and uninitialising the PMU device.
Tested with PERF on OMAP2420, OMAP3430 and OMAP4460.
V2 changes:
- Call pm_runtime_enable() unconditionally on registering the PMU device.
Signed-off-by: Jon Hunter jon-hun...@ti.com
Acked-by: Kevin Hilman khil...@ti.com
Nishanth Menon n...@ti.com writes:
change pr_warnings to pr_warn and ensure a newline
is present in all messages
Cc: linux-omap@vger.kernel.org
Cc: linux-arm-ker...@lists.infradead.org
Signed-off-by: Nishanth Menon n...@ti.com
Thanks queuing for v3.8 as PM cleanup (branch:
Jon Hunter jon-hun...@ti.com writes:
Hi Kevin,
On 10/25/2012 11:34 AM, Kevin Hilman wrote:
From: Kevin Hilman khil...@ti.com
When a GPIO is freed or shutdown, ensure that the proper bit in
dbck_enable_mask is cleared also. Otherwise, context restore on
subsequent off-mode transition
Hi Mark,
Mark A. Greer mgr...@animalcreek.com writes:
From: Mark A. Greer mgr...@animalcreek.com
Convert the omap-sham crypto driver to use the
pm_runtime API instead of the clk API.
CC: Kevin Hilman khil...@deeprootsystems.com
CC: Paul Walmsley p...@pwsan.com
CC: Dmitry Kasatkin
Grazvydas Ignotas nota...@gmail.com writes:
On Tue, Oct 23, 2012 at 9:09 PM, Kevin Hilman
khil...@deeprootsystems.com wrote:
From: Kevin Hilman khil...@ti.com
When debounce clocks are disabled, ensure that the banks
dbck_enable_mask is cleared also. Otherwise, context restore
From: Kevin Hilman khil...@ti.com
When a GPIO bank is freed or shutdown, ensure that the banks
dbck_enable_mask is cleared also. Otherwise, context restore on
subsequent off-mode transition will restore previous value from the
shadow copies (bank-context.debounce*) leading to mismatch state
Paul Walmsley p...@pwsan.com writes:
Hi Tero,
On Mon, 22 Oct 2012, Tero Kristo wrote:
When waking up from off-mode, some IP blocks are reset automatically by
hardware. For this reason, software must wait until the reset has
completed before attempting to access the IP block.
This patch
Shubhrajyoti Datta omaplinuxker...@gmail.com writes:
On Tue, Oct 23, 2012 at 3:16 AM, Kevin Hilman
khil...@deeprootsystems.com wrote:
Tero Kristo t-kri...@ti.com writes:
When waking up from off-mode, some IP blocks are reset automatically by
hardware. For this reason, software must wait
Kevin Hilman khil...@deeprootsystems.com writes:
Paul Walmsley p...@pwsan.com writes:
Hi Tero,
On Mon, 22 Oct 2012, Tero Kristo wrote:
When waking up from off-mode, some IP blocks are reset automatically by
hardware. For this reason, software must wait until the reset has
completed
From: Kevin Hilman khil...@ti.com
When debounce clocks are disabled, ensure that the banks
dbck_enable_mask is cleared also. Otherwise, context restore on
subsequent off-mode transition will restore previous value from the
shadow copies (bank-context.debounce*) leading to mismatch state
between
Kevin Hilman khil...@deeprootsystems.com writes:
+Igor
Paul Walmsley p...@pwsan.com writes:
Here are some basic OMAP test results for Linux v3.7-rc2.
Logs and other details at:
http://www.pwsan.com/omap/testlogs/test_v3.7-rc2/20121020134755/
[...]
* 37xx EVM: CORE not entering
Jean Pihet jean.pi...@newoldbits.com writes:
Hi,
On Sat, Oct 20, 2012 at 8:14 AM, Paul Walmsley p...@pwsan.com wrote:
Hi Jean
On Fri, 19 Oct 2012, Paul Walmsley wrote:
On Thu, 18 Oct 2012, Paul Walmsley wrote:
Here are some basic OMAP test results for Linux v3.7-rc1.
Logs and other
Matt Porter mpor...@ti.com writes:
[...]
Ok, very quick update...no need to mess around with the eeprom. I just
received the official word on what will be supported. Since A2 is
pre-release, simply go to http://beagleboard.org/support/rma and fill
out the form to have it replaced with the
Felipe Balbi ba...@ti.com writes:
Hi,
On Tue, Oct 23, 2012 at 11:09:31AM -0700, Kevin Hilman wrote:
From: Kevin Hilman khil...@ti.com
When debounce clocks are disabled, ensure that the banks
dbck_enable_mask is cleared also. Otherwise, context restore on
subsequent off-mode transition
fixes for v3.7-rc
Kevin Hilman (2):
ARM: OMAP2: UART: fix console UART mismatched runtime PM status
ARM: OMAP3: Beagle: fix OPP customization and initcall ordering
Paul Walmsley (1):
ARM: OMAP3: PM: apply part
Russell King - ARM Linux li...@arm.linux.org.uk writes:
On Tue, Oct 16, 2012 at 03:07:49PM -0700, Kevin Hilman wrote:
From: Thomas Gleixner t...@linutronix.de
Attempts to retrigger nested threaded IRQs currently fail because they
have no primary handler. In order to support retrigger
Peter Zijlstra pet...@infradead.org writes:
On Fri, 2012-10-19 at 16:54 -0700, Kevin Hilman wrote:
So I did the same thing for my ARM SoC, and it definitley stops the RT
throttling.
However, it has the undesriable (IMO) side effect of making timed printk
output rather unhelpful
+Colin Cross, Barry Song also
Felipe Balbi ba...@ti.com writes:
The scheduler imposes a requirement to sched_clock()
which is to stop the clock during suspend, if we don't
do that IRQ threads will be rescheduled in the future
which might cause transfers to timeout depending on
how driver is
Aaro Koskinen aaro.koski...@iki.fi writes:
Hi,
On Fri, Oct 19, 2012 at 10:01:36PM +0300, Felipe Balbi wrote:
On Fri, Oct 19, 2012 at 10:03:58PM +0300, Aaro Koskinen wrote:
FYI, I saw I2C hangs also on Nokia N900 with v3.7-rc1 (omap_i2c
omap_i2c.1: timeout waiting for bus ready). After
:
commit 24d7b40a60cf19008334bcbcbd98da374d4d9c64
Author: Kevin Hilman khil...@ti.com
Date: Thu Sep 6 14:03:08 2012 -0700
ARM: OMAP2+: PM: MPU DVFS: use generic CPU device for MPU-SS
Care to take a look at it and fix it?
Yup, will fix. Looks like this exposed some initcall ordering
From: Kevin Hilman khil...@ti.com
After commit 24d7b40a60cf19008334bcbcbd98da374d4d9c64 (ARM: OMAP2+:
PM: MPU DVFS: use generic CPU device for MPU-SS), OPPs are registered
using an existing CPU device, not the omap_device for MPU-SS.
First, fix the board file to use get_cpu_device() as required
Kevin Hilman khil...@deeprootsystems.com writes:
Aaro Koskinen aaro.koski...@iki.fi writes:
Hi,
On Fri, Oct 19, 2012 at 10:01:36PM +0300, Felipe Balbi wrote:
On Fri, Oct 19, 2012 at 10:03:58PM +0300, Aaro Koskinen wrote:
FYI, I saw I2C hangs also on Nokia N900 with v3.7-rc1 (omap_i2c
Kevin Hilman khil...@deeprootsystems.com writes:
Paul Walmsley p...@pwsan.com writes:
Hi Kevin
On Fri, 19 Oct 2012, Paul Walmsley wrote:
On Thu, 18 Oct 2012, Paul Walmsley wrote:
Here are some basic OMAP test results for Linux v3.7-rc1.
Logs and other details at
http
: Paul Walmsley p...@pwsan.com
Cc: Benoit Cousson b-cous...@ti.com
Cc: Venkatraman S svenk...@ti.com
I can confirm that this patch the regression in my OMAP3 PM tests where
suspend test (to retention or off) failed if ran after the off-idle
test.
Tested-by: Kevin Hilman khil...@ti.com
on 3530/Overo
Matt Porter mpor...@ti.com writes:
On Sat, Oct 20, 2012 at 06:58:10PM +, Paul Walmsley wrote:
On Sat, 20 Oct 2012, Richard Cochran wrote:
On Sat, Oct 20, 2012 at 06:12:35PM +, Paul Walmsley wrote:
Just tried omap2plus_defconfig here and the board didn't boot,
confirming
From: Kevin Hilman khil...@ti.com
After commit 24d7b40a60cf19008334bcbcbd98da374d4d9c64 (ARM: OMAP2+:
PM: MPU DVFS: use generic CPU device for MPU-SS), OPPs are registered
using an existing CPU device, not the omap_device for MPU-SS.
First, fix the board file to use get_cpu_device() as required
Kevin Hilman khil...@deeprootsystems.com writes:
From: Kevin Hilman khil...@ti.com
After commit 24d7b40a60cf19008334bcbcbd98da374d4d9c64 (ARM: OMAP2+:
PM: MPU DVFS: use generic CPU device for MPU-SS), OPPs are registered
using an existing CPU device, not the omap_device for MPU-SS.
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