is done via
the clock API there is a posibility to enable the external sleep
control. In this way the clock can be enabled/disabled on demand by the
user of the clock.
Signed-off-by: Peter Ujfalusi peter.ujfal...@ti.com
Reviewed-by: Nishanth Menon n...@ti.com
---
.../bindings/clock/clk-palmas-clk32kg
is done via
the clock API there is a posibility to enable the external sleep
control. In this way the clock can be enabled/disabled on demand by the
user of the clock.
See the documentation for more details.
Signed-off-by: Peter Ujfalusi peter.ujfal...@ti.com
Reviewed-by: Nishanth Menon n...@ti.com
ti,palmas-clk32kgaudio for clk32kgaudio clock
Apart from the register control of the clocks - which is done via
the clock API there is a posibility to enable the external sleep
control. In this way the clock can be enabled/disabled on demand by the
user of the clock.
Regards,
Peter
---
Peter
Ujfalusi peter.ujfal...@ti.com
Cc: Peter Ujfalusi peter.ujfal...@ti.com
Cc: Jarkko Nikula jarkko.nik...@bitmer.com
Cc: linux-omap@vger.kernel.org
Signed-off-by: Fabian Frederick f...@skynet.be
---
sound/soc/omap/mcbsp.c | 3 +--
1 file changed, 1 insertion(+), 2 deletions(-)
diff --git
On 05/27/2014 06:03 PM, Joel Fernandes wrote:
On 05/27/2014 05:22 AM, Peter Ujfalusi wrote:
On 05/27/2014 12:32 AM, Olof Johansson wrote:
[..]
I came across this patch when I was looking at a pull request from
Sekhar for EDMA cleanups, and it made me look closer at the contents
of this file
On 05/27/2014 12:32 AM, Olof Johansson wrote:
Hi,
On Mon, Apr 14, 2014 at 4:41 AM, Peter Ujfalusi peter.ujfal...@ti.com wrote:
The edmacc_param struct should follow the layout of the paRAM area in the
HW. Be explicit on the size of the fields (u32) and also mark the struct
as packed
Mike,
On 05/06/2014 04:31 PM, Nishanth Menon wrote:
On 16:24-20140506, Peter Ujfalusi wrote:
Hi,
Changes since v1:
- binding documentation and driver has been separated based on Nishanth
Menon's
comment
Could you take a look at this series please? I really hoped that it would make
On 05/26/2014 11:51 AM, Jyri Sarha wrote:
Make including the omap-pcm.h outside sound/soc/omap more convenient.
Acked-by: Peter Ujfalusi peter.ujfal...@ti.com
Signed-off-by: Jyri Sarha jsa...@ti.com
---
It would be nice to get this applied at ASAP for OMAP HDMI audio
rework patches depend
On 05/19/2014 02:07 PM, Sekhar Nori wrote:
To which baseline do the patches apply? These lines are not present at
least in v3.15-rc5. I am applying the patch without this hunk.
It is generate on top of linux-next-20140515.
next picked up several patches since 3.15-rc and I also have my other
On 05/19/2014 04:06 PM, Sekhar Nori wrote:
On Friday 16 May 2014 05:47 PM, Peter Ujfalusi wrote:
Hi,
Changes since v2:
- Comments from Sekhar and Arnd has been addressed best as I could.
- Use the CCCFG information in all cases instead of pdata provided
information
- To achieve this I
this member does not
make any sense (and the driver no longer uses it).
Signed-off-by: Peter Ujfalusi peter.ujfal...@ti.com
---
include/linux/platform_data/edma.h | 7 ---
1 file changed, 7 deletions(-)
diff --git a/include/linux/platform_data/edma.h
b/include/linux/platform_data/edma.h
index
/eDMA3_CC instance so this
member does not make any sense (and the driver no longer uses it).
Signed-off-by: Peter Ujfalusi peter.ujfal...@ti.com
---
arch/arm/mach-davinci/devices-da8xx.c | 15 ---
arch/arm/mach-davinci/dm355.c | 5 -
arch/arm/mach-davinci/dm365.c | 5
dma-channels, ti,edma-regions and ti,edma-slots no longer needed in DT since
the the same information is available in the IP's CCCFG register.
Signed-off-by: Peter Ujfalusi peter.ujfal...@ti.com
---
arch/arm/boot/dts/am33xx.dtsi | 3 ---
1 file changed, 3 deletions(-)
diff --git a/arch/arm/boot
dma-channels, ti,edma-regions and ti,edma-slots no longer needed in DT since
the the same information is available in the IP's CCCFG register.
Signed-off-by: Peter Ujfalusi peter.ujfal...@ti.com
---
arch/arm/boot/dts/am4372.dtsi | 3 ---
1 file changed, 3 deletions(-)
diff --git a/arch/arm/boot
set up a default priority map.
Signed-off-by: Peter Ujfalusi peter.ujfal...@ti.com
---
arch/arm/common/edma.c | 115 +++--
1 file changed, 73 insertions(+), 42 deletions(-)
diff --git a/arch/arm/common/edma.c b/arch/arm/common/edma.c
index aa9473cb0c23
since the very same information can be obtained from the HW.
The mentioned properties are deprecated.
Signed-off-by: Peter Ujfalusi peter.ujfal...@ti.com
---
Documentation/devicetree/bindings/dma/ti-edma.txt | 13 +++--
1 file changed, 7 insertions(+), 6 deletions(-)
diff --git
It is ignored by the edma driver since we are just setting back the default
mapping of TC - Queue.
Signed-off-by: Peter Ujfalusi peter.ujfal...@ti.com
---
arch/arm/mach-davinci/devices-da8xx.c | 16
arch/arm/mach-davinci/dm355.c | 9 -
arch/arm/mach-davinci
To be consistent in the code that we take parameters from edma_cc[j] struct
and not randomly from info[j] as well.
Signed-off-by: Peter Ujfalusi peter.ujfal...@ti.com
---
arch/arm/common/edma.c | 3 ++-
1 file changed, 2 insertions(+), 1 deletion(-)
diff --git a/arch/arm/common/edma.c b/arch
It is no longer in use by the driver or board files.
Signed-off-by: Peter Ujfalusi peter.ujfal...@ti.com
---
include/linux/platform_data/edma.h | 1 -
1 file changed, 1 deletion(-)
diff --git a/include/linux/platform_data/edma.h
b/include/linux/platform_data/edma.h
index 12f134b1493c
Instead of saving the for loop length, take the num_tc value from the pdata.
In case of DT boot set the n_tc to 3 as it is hardwired in edma_of_parse_dt()
This is a temporary state since upcoming patch(es) will change how we are
dealing with these parameters.
Signed-off-by: Peter Ujfalusi
There is no need to change the default TC - Queue mapping. By default the
mapping is: TC0 - Q0, TC1 - Q1, etc.
Changing this has no benefits at all and all the board files are just setting
the same mapping back to the HW.
Signed-off-by: Peter Ujfalusi peter.ujfal...@ti.com
---
arch/arm/common
The pdata has been just allocated with devm_kzalloc() in
edma_setup_info_from_dt() and passed to this function.
Signed-off-by: Peter Ujfalusi peter.ujfal...@ti.com
---
arch/arm/common/edma.c | 2 --
1 file changed, 2 deletions(-)
diff --git a/arch/arm/common/edma.c b/arch/arm/common/edma.c
and they can be
removed from the binding documentation and from the dtsi files as well.
The change will not introduce regression when new kernel is booted using older
DTB (since we just ignore the mentioned properties).
Regards,
Peter
---
Peter Ujfalusi (13):
ARM: edma: No need to clean the pdata
On 05/15/2014 11:01 AM, Arnd Bergmann wrote:
On Tuesday 13 May 2014 13:30:30 Peter Ujfalusi wrote:
From CCCFG register of eDMA3 we can get all the needed information for the
driver about the IP:
Number of channels: NUM_DMACH
Number of regions: NUM_REGN
Number of slots (PaRAM sets
Hi Sekhar,
On 05/15/2014 11:53 AM, Sekhar Nori wrote:
Hi Peter,
On Tuesday 13 May 2014 04:00 PM, Peter Ujfalusi wrote:
From CCCFG register of eDMA3 we can get all the needed information for the
driver about the IP:
Number of channels: NUM_DMACH
Number of regions: NUM_REGN
Number of slots
Get the two interrupt line number at the same time by merging the two
instance of if(node){}else{} places.
replace the pdev-dev with the already existing dev which makes it possible
to collapse lines with devm_request_irq()
Signed-off-by: Peter Ujfalusi peter.ujfal...@ti.com
---
arch/arm/common
DTB (since we just ignore the mentioned properties).
Regards,
Peter
---
Peter Ujfalusi (4):
ARM: edma: Get IP information from HW when booting with DT
dt/bindings: ti,edma: Remove redundant properties from documentation
ARM: dts: am33xx: Remove obsolete properties from edma node
ARM: dts
dma-channels, ti,edma-regions and ti,edma-slots no longer needed in DT since
the the same information is available in the IP's CCCFG register.
Signed-off-by: Peter Ujfalusi peter.ujfal...@ti.com
---
arch/arm/boot/dts/am33xx.dtsi | 3 ---
1 file changed, 3 deletions(-)
diff --git a/arch/arm/boot
From CCCFG register of eDMA3 we can get all the needed information for the
driver about the IP:
Number of channels: NUM_DMACH
Number of regions: NUM_REGN
Number of slots (PaRAM sets): NUM_PAENTRY
Number of TC/EQ: NUM_EVQUE
Signed-off-by: Peter Ujfalusi peter.ujfal...@ti.com
---
arch/arm/common
dma-channels, ti,edma-regions and ti,edma-slots no longer needed in DT since
the the same information is available in the IP's CCCFG register.
Signed-off-by: Peter Ujfalusi peter.ujfal...@ti.com
---
arch/arm/boot/dts/am4372.dtsi | 3 ---
1 file changed, 3 deletions(-)
diff --git a/arch/arm/boot
since the very same information can be obtained from the HW.
The mentioned properties can be removed from the binding document.
Signed-off-by: Peter Ujfalusi peter.ujfal...@ti.com
---
Documentation/devicetree/bindings/dma/ti-edma.txt | 6 --
1 file changed, 6 deletions(-)
diff --git
On 05/13/2014 11:33 AM, Sekhar Nori wrote:
On Tuesday 13 May 2014 01:13 PM, Peter Ujfalusi wrote:
Hi,
We are requesting redundant information via DT for the driver since the very
same
data is available in the HW: by reading and decoding the content of CCCFG
register we can get:
Number
dma-channels, ti,edma-regions and ti,edma-slots no longer needed in DT since
the the same information is available in the IP's CCCFG register.
Signed-off-by: Peter Ujfalusi peter.ujfal...@ti.com
---
arch/arm/boot/dts/am4372.dtsi | 3 ---
1 file changed, 3 deletions(-)
diff --git a/arch/arm/boot
since the very same information can be obtained from the HW.
The mentioned properties can be removed from the binding document.
Signed-off-by: Peter Ujfalusi peter.ujfal...@ti.com
---
Documentation/devicetree/bindings/dma/ti-edma.txt | 6 --
1 file changed, 6 deletions(-)
diff --git
From CCCFG register of eDMA3 we can get all the needed information for the
driver about the IP:
Number of channels: NUM_DMACH
Number of regions: NUM_REGN
Number of slots (PaRAM sets): NUM_PAENTRY
Number of TC/EQ: NUM_EVQUE
Signed-off-by: Peter Ujfalusi peter.ujfal...@ti.com
---
arch/arm/common
dma-channels, ti,edma-regions and ti,edma-slots no longer needed in DT since
the the same information is available in the IP's CCCFG register.
Signed-off-by: Peter Ujfalusi peter.ujfal...@ti.com
---
arch/arm/boot/dts/am33xx.dtsi | 3 ---
1 file changed, 3 deletions(-)
diff --git a/arch/arm/boot
The pdata has been just allocated with devm_kzalloc() in
edma_setup_info_from_dt() and passed to this function.
Signed-off-by: Peter Ujfalusi peter.ujfal...@ti.com
---
arch/arm/common/edma.c | 2 --
1 file changed, 2 deletions(-)
diff --git a/arch/arm/common/edma.c b/arch/arm/common/edma.c
as well.
The change will not introduce regression when new kernel is booted using older
DTB (since we just ignore the mentioned properties).
Regards,
Peter
---
Peter Ujfalusi (5):
ARM: edma: No need to clean the pdata in edma_of_parse_dt()
ARM: edma: Get IP information from HW when booting with DT
Paul,
On 04/30/2014 02:43 PM, Peter Ujfalusi wrote:
Add the needed hwmod entries which is needed for AESS (Audio Engine
SubSystem) and ABE.
please ignore this patch to add AESS to hwmod data. W/o addresses defined we
will see warnings printed. So either I add the addresses to hwmod data
McPDM need to be configured to NO_IDLE mode when it is in used otherwise
vital clocks will be gated which results 'slow motion' audio playback.
Signed-off-by: Peter Ujfalusi peter.ujfal...@ti.com
---
Hi Paul,
Changes since v1:
- updated the commit message
If this can still make it to 3.15
All audio related omap_hwmod_ocp_if *_dma can be removed from the data since
we can just add the user flag to the non dma structure.
Signed-off-by: Peter Ujfalusi peter.ujfal...@ti.com
---
arch/arm/mach-omap2/omap_hwmod_44xx_data.c | 99 +++---
1 file changed, 9
Hi Paul,
On 05/08/2014 03:20 AM, Paul Walmsley wrote:
Hi Péter,
On Wed, 30 Apr 2014, Peter Ujfalusi wrote:
Add HWMOD_SWSUP_SIDLE to flags.
Signed-off-by: Peter Ujfalusi peter.ujfal...@ti.com
This patch could use a better changelog. It would be ideal to understand
_why_
and integrates the ATL clock into the clock
tree.
V1 of the ATL series:
https://lkml.org/lkml/2014/4/2/238
Regards,
Peter
---
Peter Ujfalusi (4):
ARM: dts: dra7xx-clocks: Correct name for atl clkin3 clock
dt:/bindings: DRA7 ATL (Audio Tracking Logic) clock bindings
clk: ti: Driver for DRA7 ATL
codecs can also use the very same clock
as their MCLK.
The ATL IP in DRA7 contains 4 ATL instences.
Signed-off-by: Peter Ujfalusi peter.ujfal...@ti.com
---
.../devicetree/bindings/clock/ti/dra7-atl.txt | 97 ++
include/dt-bindings/clk/ti-dra7-atl.h | 40
Modify the clock nodes for the ATL clocks to use the ATL clock driver to
handle them.
Add the ATL device node at the same time for DRA7.
Signed-off-by: Peter Ujfalusi peter.ujfal...@ti.com
---
arch/arm/boot/dts/dra7.dtsi | 11 +++
arch/arm/boot/dts/dra7xx-clocks.dtsi | 16
codecs can also use the very same clock
as their MCLK.
The ATL IP in DRA7 contains 4 ATL instences.
Signed-off-by: Peter Ujfalusi peter.ujfal...@ti.com
---
drivers/clk/ti/Makefile | 3 +-
drivers/clk/ti/clk-dra7-atl.c | 313 ++
2 files changed, 315
To allign the name with the other atl clock names:
atlclkin3_ck - atl_clkin3_ck
Signed-off-by: Peter Ujfalusi peter.ujfal...@ti.com
---
arch/arm/boot/dts/dra7xx-clocks.dtsi | 22 +++---
drivers/clk/ti/clk-7xx.c | 2 +-
2 files changed, 12 insertions(+), 12 deletions
When the MCLK is 19.2 or 38.4 MHz the HPPLL need to be enabled and can be
put in bypass mode.
This will fix HPPLL use on boards with 19.2MHz mclk.
Signed-off-by: Peter Ujfalusi peter.ujfal...@ti.com
---
drivers/mfd/twl6040.c | 13 +
1 file changed, 5 insertions(+), 8 deletions
/disabled on demand by the
user of the clock.
Regards,
Peter
---
Peter Ujfalusi (2):
dt/bindings: Binding documentation for Palmas clk32kg and clk32kgaudio
clocks
clk: Add driver for Palmas clk32kg and clk32kgaudio clocks
.../bindings/clock/clk-palmas-clk32kg-clocks.txt | 35 +++
drivers
is done via
the clock API there is a posibility to enable the external sleep
control. In this way the clock can be enabled/disabled on demand by the
user of the clock.
See the documentation for more details.
Signed-off-by: Peter Ujfalusi peter.ujfal...@ti.com
---
drivers/clk/Kconfig | 7
is done via
the clock API there is a posibility to enable the external sleep
control. In this way the clock can be enabled/disabled on demand by the
user of the clock.
Signed-off-by: Peter Ujfalusi peter.ujfal...@ti.com
---
.../bindings/clock/clk-palmas-clk32kg-clocks.txt | 35
Mike,
On 04/24/2014 06:03 PM, Tero Kristo wrote:
On 04/24/2014 12:11 PM, Peter Ujfalusi wrote:
Mike, Tero,
On 04/03/2014 09:29 AM, Peter Ujfalusi wrote:
On 04/02/2014 05:12 PM, Tero Kristo wrote:
On 04/02/2014 04:48 PM, Peter Ujfalusi wrote:
ABE DPLL frequency need to be lowered from
In order to get correct clock dividers for AESS/ABE we need to set the
dpll_abe_m2x2_ck rate to be double of dpll_abe_ck.
Signed-off-by: Peter Ujfalusi peter.ujfal...@ti.com
---
drivers/clk/ti/clk-54xx.c | 6 ++
1 file changed, 6 insertions(+)
diff --git a/drivers/clk/ti/clk-54xx.c b
In OMAP5 bit 8 in PRCM registers are not defined (Reserved) unlike their
counterpart in OMAP4.
It is better to not write to these bits.
Signed-off-by: Peter Ujfalusi peter.ujfal...@ti.com
---
arch/arm/boot/dts/omap54xx-clocks.dtsi | 48 --
1 file changed, 48
abe_iclk's parent is aess_fclk and not abe_clk.
Also correct the parameters for clock rate calculation as used for OMAP4
since in PRCM level there's no difference between the two platform
regarding to AESS/ABE clocking.
Signed-off-by: Peter Ujfalusi peter.ujfal...@ti.com
---
arch/arm/boot/dts
Add HWMOD_SWSUP_SIDLE to flags.
Signed-off-by: Peter Ujfalusi peter.ujfal...@ti.com
---
arch/arm/mach-omap2/omap_hwmod_54xx_data.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/arch/arm/mach-omap2/omap_hwmod_54xx_data.c
b/arch/arm/mach-omap2/omap_hwmod_54xx_data.c
index
Add the needed hwmod entries which is needed for AESS (Audio Engine
SubSystem) and ABE.
Signed-off-by: Peter Ujfalusi peter.ujfal...@ti.com
---
arch/arm/mach-omap2/omap_hwmod_54xx_data.c | 64 ++
1 file changed, 64 insertions(+)
diff --git a/arch/arm/mach-omap2
On 04/24/2014 05:19 PM, Nishanth Menon wrote:
On 04/24/2014 03:55 AM, Peter Ujfalusi wrote:
On 04/18/2014 12:00 AM, Nishanth Menon wrote:
On 04/17/2014 03:57 PM, Santosh Shilimkar wrote:
I looked at the series and its looks pretty good. Thanks for fixups,
updates.
For whole series,
Acked
gets utilized.
Cc: Nishanth Menon n...@ti.com
Cc: Peter Ujfalusi peter.ujfal...@ti.com
Cc: Ezequiel Garcia ezequiel.gar...@free-electrons.com
Cc: Javier Martinez Canillas jav...@dowhile0.org
Cc: Tony Lindgren t...@atomide.com
Cc: Santosh Shilimkar santosh.shilim...@ti.com
Cc: linux-omap linux
It helps to identify issues if we have some information regarding to the
channel which the event is associated.
Signed-off-by: Peter Ujfalusi peter.ujfal...@ti.com
Acked-by: Joel Fernandes jo...@ti.com
---
Hi Vinod,
rebased on:
git://git.infradead.org/users/vkoul/slave-dma.git next
On top
On 04/16/2014 07:05 PM, Joel Fernandes wrote:
On 04/16/2014 07:59 AM, Peter Ujfalusi wrote:
[..]
If the dma-priority is missing we should assume lowest priority (0).
The highest priority depends on the platform. For eDMA3 in AM335x it is
three
level. For designware controller you might have
Hi Mike,
On 04/03/2014 01:52 PM, Peter Ujfalusi wrote:
Palmas class of devices have either twl 32K clock outputs:
CLK32K_KG and CLK32K_KGAUDIO
or only one:
CLK32K_KG (TPS659039 for example)
Use separate compatible flags for the two 32K clock.
A system which needs or have only one
Mike, Tero,
On 04/03/2014 09:29 AM, Peter Ujfalusi wrote:
On 04/02/2014 05:12 PM, Tero Kristo wrote:
On 04/02/2014 04:48 PM, Peter Ujfalusi wrote:
ABE DPLL frequency need to be lowered from 361267200
to 180633600 to facilitate the ATL requironments.
The dpll_abe_m2x2_ck clock need to be set
Lee,
On 04/01/2014 04:44 PM, Peter Ujfalusi wrote:
Hi,
While looking into a report by Florian Vaussard [1] I have noticed couple of
most
likely unrelated issues:
- all boards using twl6040 configures the i2c bus to 400KHz while twl6040 is
set
to 100KHz as default.
- if I set
Hi Mike,
On 04/02/2014 04:55 PM, Peter Ujfalusi wrote:
Hi,
Audio Tracking Logic is designed to be used by HD Radio
applications to synchronize the audio output clocks to the
baseband clock. ATL can be also used to track errors between
two reference clocks (BWS, AWS) and generate
On 04/18/2014 12:00 AM, Nishanth Menon wrote:
On 04/17/2014 03:57 PM, Santosh Shilimkar wrote:
I looked at the series and its looks pretty good. Thanks for fixups, updates.
For whole series,
Acked-by: Santosh Shilimkar santosh.shilim...@ti.com
Thanks.
Patches(including Peter's) is
);
return 0;
}
Thanks, this makes am335x-evmsk boot with linux-next.
Tested-by: Peter Ujfalusi peter.ujfal...@ti.com
--
To unsubscribe from this list: send the line unsubscribe linux-omap in
the body of a message to majord...@vger.kernel.org
More majordomo info at http://vger.kernel.org
On 04/23/2014 04:47 PM, Nishanth Menon wrote:
Hi,
Will be great if someone else could confirm as well.
next-20140423-multi_lpae_defconfig
1: DRA7xx-EVM: Boot FAIL: http://slexy.org/raw/s2HJJ9SKzM
2: OMAP5432uEVM: Boot FAIL: http://slexy.org/raw/s2HoDCbtO0
TOTAL = 2 boards, Booted
On 04/22/2014 04:18 PM, Nishanth Menon wrote:
next-20140422-omap2plus_defconfig
1: am335x-sk: Boot FAIL: http://slexy.org/raw/s2gh6XsLve
2: am3517-evm: Boot PASS: http://slexy.org/raw/s2MTkdzPnb
3: am37x-evm: Boot PASS: http://slexy.org/raw/s2SJwrVat8
4: am43xx-epos: Boot PASS:
On 04/14/2014 05:32 PM, Sekhar Nori wrote:
Yes, you can. But as soon as you have other devices using the same priority
(with eDMA3 at least) and asks for a 'long' transfer it can ruin the audio.
During audio playback/capture you execute a long MMC read for example can
introduce a glitch.
On 04/15/2014 12:59 AM, Alexandre Belloni wrote:
Signed-off-by: Alexandre Belloni alexandre.bell...@free-electrons.com
---
arch/arm/mach-omap2/board-omap3beagle.c | 10 ++
1 file changed, 2 insertions(+), 8 deletions(-)
diff --git a/arch/arm/mach-omap2/board-omap3beagle.c
On 04/15/2014 10:14 AM, Simon Horman wrote:
On Tue, Apr 15, 2014 at 10:01:44AM +0300, Peter Ujfalusi wrote:
On 04/15/2014 12:59 AM, Alexandre Belloni wrote:
Signed-off-by: Alexandre Belloni alexandre.bell...@free-electrons.com
---
arch/arm/mach-omap2/board-omap3beagle.c | 10 ++
1
things sorted out I noticed that the debug was
too verbose and the important information was hidden even when the we did not
asked for verbose dmaengine debug.
I have included some debug cleanups for the edma dmaengine driver also.
Regards,
Peter
---
Peter Ujfalusi (10):
platform_data: edma
In case of not supported direction it is better to print the direction also.
It is unlikely, but in such an event it helps with the debugging.
Signed-off-by: Peter Ujfalusi peter.ujfal...@ti.com
Acked-by: Joel Fernandes jo...@ti.com
---
drivers/dma/edma.c | 4 ++--
1 file changed, 2 insertions
It helps to identify issues if we have some information regarding to the
channel which the event is associated.
Signed-off-by: Peter Ujfalusi peter.ujfal...@ti.com
Acked-by: Joel Fernandes jo...@ti.com
---
drivers/dma/edma.c | 7 ---
1 file changed, 4 insertions(+), 3 deletions(-)
diff
since all other error cases are dev_err and this failure is
similarly fatal as the other ones.
Signed-off-by: Peter Ujfalusi peter.ujfal...@ti.com
Acked-by: Joel Fernandes jo...@ti.com
---
drivers/dma/edma.c | 14 --
1 file changed, 8 insertions(+), 6 deletions(-)
diff --git a/drivers/dma
Do not print the paRAM information when verbose debugging is not asked and
also reduce the number of lines printed in edma_prep_dma_cyclic()
Signed-off-by: Peter Ujfalusi peter.ujfal...@ti.com
Acked-by: Joel Fernandes jo...@ti.com
---
drivers/dma/edma.c | 11 +--
1 file changed, 5
With the callback implemented omap-dma can provide information to client
drivers regarding to supported address widths, directions, residue
granularity, etc.
Signed-off-by: Peter Ujfalusi peter.ujfal...@ti.com
Acked-by: Joel Fernandes jo...@ti.com
---
drivers/dma/edma.c | 18
Indicate that the edma dmaengine driver has support for cyclic mode.
Signed-off-by: Peter Ujfalusi peter.ujfal...@ti.com
Acked-by: Joel Fernandes jo...@ti.com
---
arch/arm/common/edma.c | 1 +
drivers/dma/edma.c | 1 +
2 files changed, 2 insertions(+)
diff --git a/arch/arm/common/edma.c b
Pause/Resume can be used by the audio stack when the stream is paused/resumed
The edma platform code has support for this and the legacy audio stack used
this.
Signed-off-by: Peter Ujfalusi peter.ujfal...@ti.com
Acked-by: Joel Fernandes jo...@ti.com
---
drivers/dma/edma.c | 28
Hi Vinod,
On 04/11/2014 03:46 PM, Vinod Koul wrote:
I think the number shouldn't be viewed in absolute terms. If we decide that
(lets
say) 0-7, then any controller should map 0 to lowest and 7 to highest.
For your case you can do this and then intermediate numbers would be medium
The edmacc_param struct should follow the layout of the paRAM area in the
HW. Be explicit on the size of the fields (u32) and also mark the struct
as packed to avoid any padding on non 32bit architectures.
Signed-off-by: Peter Ujfalusi peter.ujfal...@ti.com
Acked-by: Joel Fernandes jo...@ti.com
For later use save the number of queues available for the CC.
Signed-off-by: Peter Ujfalusi peter.ujfal...@ti.com
Acked-by: Joel Fernandes jo...@ti.com
---
arch/arm/common/edma.c | 3 +++
1 file changed, 3 insertions(+)
diff --git a/arch/arm/common/edma.c b/arch/arm/common/edma.c
index
When clients asks for maxburst = 0 it is basically the same case as if they
were asking for maxburst = 1 since in both case ASYNC need to be used and
the eDMA is expected to write/read one word per DMA request.
Signed-off-by: Peter Ujfalusi peter.ujfal...@ti.com
Acked-by: Joel Fernandes jo
On 04/14/2014 03:12 PM, Sekhar Nori wrote:
On Monday 14 April 2014 05:26 PM, Peter Ujfalusi wrote:
Hi Vinod,
On 04/11/2014 03:46 PM, Vinod Koul wrote:
I think the number shouldn't be viewed in absolute terms. If we decide that
(lets
say) 0-7, then any controller should map 0 to lowest
On 04/11/2014 01:40 AM, Joel Fernandes wrote:
On 04/01/2014 08:06 AM, Peter Ujfalusi wrote:
We only support DEV_TO_MEM or MEM_TO_DEV directions with edma driver and the
check for the direction has been already done in the function calling
edma_config_pset().
The error reporting is redundant
On 04/11/2014 11:17 AM, Sekhar Nori wrote:
On Tuesday 01 April 2014 06:36 PM, Peter Ujfalusi wrote:
Use the EVENTQ_1 for default and leave the EVENTQ_0 to be used by high
priority channels, like audio.
Signed-off-by: Peter Ujfalusi peter.ujfal...@ti.com
Acked-by: Sekhar Nori nsek...@ti.com
On 04/11/2014 11:56 AM, Sekhar Nori wrote:
On Friday 11 April 2014 02:20 PM, Peter Ujfalusi wrote:
On 04/11/2014 11:17 AM, Sekhar Nori wrote:
On Tuesday 01 April 2014 06:36 PM, Peter Ujfalusi wrote:
Use the EVENTQ_1 for default and leave the EVENTQ_0 to be used by high
priority channels, like
Hi Vinod,
On 04/11/2014 12:42 PM, Vinod Koul wrote:
On Fri, Apr 11, 2014 at 12:38:00PM +0300, Peter Ujfalusi wrote:
On 04/11/2014 11:56 AM, Sekhar Nori wrote:
On Friday 11 April 2014 02:20 PM, Peter Ujfalusi wrote:
On 04/11/2014 11:17 AM, Sekhar Nori wrote:
On Tuesday 01 April 2014 06:36 PM
On 04/11/2014 02:31 PM, Vinod Koul wrote:
I would say that it is channel based config. I don't see the reason why would
one mix different priorities on a configured channel between descriptors.
If not then we can add this in dma_slave_config ?
So adding to the struct for example:
bool
On 04/03/2014 04:49 PM, Nishanth Menon wrote:
On 04/03/2014 05:52 AM, Peter Ujfalusi wrote:
[...]
.../devicetree/bindings/clock/clk-palmas.txt | 35 +++
drivers/clk/Kconfig| 7 +
drivers/clk/Makefile | 1 +
drivers/clk
On 04/02/2014 05:12 PM, Tero Kristo wrote:
On 04/02/2014 04:48 PM, Peter Ujfalusi wrote:
ABE DPLL frequency need to be lowered from 361267200
to 180633600 to facilitate the ATL requironments.
The dpll_abe_m2x2_ck clock need to be set to double
of ABE DPLL rate in order to have correct clocks
the documentation for more details.
Signed-off-by: Peter Ujfalusi peter.ujfal...@ti.com
---
Hi,
Part of the driver is based on the v4 of palmas clock driver from
Laxman Dewangan, which can be found here:
https://lkml.org/lkml/2013/10/9/146
Since no updates followed after the comments and patches I
The correct bit is 24 for AHCLKX.
Signed-off-by: Peter Ujfalusi peter.ujfal...@ti.com
---
arch/arm/boot/dts/dra7xx-clocks.dtsi | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/arch/arm/boot/dts/dra7xx-clocks.dtsi
b/arch/arm/boot/dts/dra7xx-clocks.dtsi
index e96da9a898ad
ABE DPLL frequency need to be lowered from 361267200
to 180633600 to facilitate the ATL requironments.
The dpll_abe_m2x2_ck clock need to be set to double
of ABE DPLL rate in order to have correct clocks
for audio.
Signed-off-by: Peter Ujfalusi peter.ujfal...@ti.com
---
drivers/clk/ti/clk-7xx.c
Modify the clock nodes for the ATL clocks to use the ATL clock driver to
handle them.
Add the ATL device node at the same time for DRA7.
Signed-off-by: Peter Ujfalusi peter.ujfal...@ti.com
---
arch/arm/boot/dts/dra7.dtsi | 11 +++
arch/arm/boot/dts/dra7xx-clocks.dtsi | 16
on demand of it's use and
all the IP which needs ATL clock can be sure that it is enabled for them.
The first patch fixes the name of atl clkin3 node in dtsi file.
Regards,
Peter
---
Peter Ujfalusi (3):
ARM: dts: dra7xx-clocks: Correct name for atl clkin3 clock
clk: Driver for DRA7 ATL (Audio
.
With setup pm_runtime can handle the ATL clock on demand of it's use and
all the IP which needs ATL clock can be sure that it is enabled for them.
Signed-off-by: Peter Ujfalusi peter.ujfal...@ti.com
---
.../devicetree/bindings/clock/ti/dra7-atl.txt | 97 +++
drivers/clk/ti/Makefile
To allign the name with the other atl clock names:
atlclkin3_ck - atl_clkin3_ck
Signed-off-by: Peter Ujfalusi peter.ujfal...@ti.com
---
arch/arm/boot/dts/dra7xx-clocks.dtsi | 22 +++---
drivers/clk/ti/clk-7xx.c | 2 +-
2 files changed, 12 insertions(+), 12 deletions
since all other error cases are dev_err and this failure is
similarly fatal as the other ones.
Signed-off-by: Peter Ujfalusi peter.ujfal...@ti.com
---
drivers/dma/edma.c | 14 --
1 file changed, 8 insertions(+), 6 deletions(-)
diff --git a/drivers/dma/edma.c b/drivers/dma/edma.c
index
601 - 700 of 1965 matches
Mail list logo
