Re: power states transitions

On Wed, Nov 25, 2015 at 8:50 PM, Tony Lindgren <t...@atomide.com> wrote: > * Ran Shalit <ransha...@gmail.com> [151122 07:59]: >> Hello, >> >> I have stranhe behaviour in which even when there is no activity in >> serial port, the retention cou

power states transitions

Hello, I have stranhe behaviour in which even when there is no activity in serial port, the retention counter is keep incremented all these time, as if the cpu gets in and out of retention periodically. I would expect the cpu to get into retention mode, when there is no activity and stay in that

ALSA DMA ping-pong

Hello, I hope someone can help me understand the concept of ping-pong dma with ALSA. I am using davinci soc: /sound/soc/davinci/davinci_pcm.c But I am not sure if it using ping-pong dma or not. In the header of "davinci_pcm_enqueue_dma" function it states "Not used with ping/pong", but inside I

Re: cpuidle results in ethernet degredation ?

On Tue, Aug 4, 2015 at 11:09 AM, Tony Lindgren t...@atomide.com wrote: * Ran Shalit ransha...@gmail.com [150803 07:03]: I am using GPMC with smsc911x controller. If I understand you correctly, I can overcome this, but asking the hardware not get into inactive state. Correct. Probably

Re: cpuidle results in ethernet degredation ?

On Mon, Aug 3, 2015 at 4:21 PM, Tony Lindgren t...@atomide.com wrote: * Ran Shalit ransha...@gmail.com [150801 11:34]: Hi , I've accidently omitted linux-omap in last message, so please here it is again: I think that if someone here understand cpuidle it may lead me to a solution... 1

Re: cpuidle results in ethernet degredation ?

? Regards, Ran On Fri, Jul 31, 2015 at 7:40 PM, Robert Nelson robertcnel...@gmail.com wrote: On Fri, Jul 31, 2015 at 11:29 AM, Ran Shalit ransha...@gmail.com wrote: On Thu, Jul 30, 2015 at 9:49 PM, Ran Shalit ransha...@gmail.com wrote: Hello, I hope some will have some idea: I am using iperf

Re: cpuidle results in ethernet degredation ?

On Thu, Jul 30, 2015 at 9:49 PM, Ran Shalit ransha...@gmail.com wrote: Hello, I hope some will have some idea: I am using iperf to check bandwidth and I see that with small tcp windows in the test there is always high degredation in performance compared to version without cpuidle. I've

cpuidle results in ethernet degredation ?

Hello, I hope some will have some idea: I am using iperf to check bandwidth and I see that with small tcp windows in the test there is always high degredation in performance compared to version without cpuidle. I've noticed that C3 state (core inactive) is entered several times during the test,

Re: omap voltage management

On Fri, Mar 20, 2015 at 7:11 AM, Ran Shalit ransha...@gmail.com wrote: We currently are missing dm8148 support from mainline, dm8168 does have basic support now. Adding dm8148 will hopefully happen too with time permitting :) Hi Tony, What is exactly the voltage driver capability ? Does

no opp match error

Hello, I get in boot of board the following error: omap_target: cpu0: no opp match for freq 90. I see that the failure is in function cpufreq-opp_find_freq_exact(). Does is mean that cpufreq fails and do nothing ? How can I fix this error ? Regards, Ran -- To unsubscribe from this list:

Re: omap voltage management

We currently are missing dm8148 support from mainline, dm8168 does have basic support now. Adding dm8148 will hopefully happen too with time permitting :) Hi Tony, What is exactly the voltage driver capability ? Does it mean that it does not support AVS (feature for power saving) ? Regards,

omap voltage management

Hello, I am using DM8148 and I get error message in boot that voltage management driver is not added. Is it supported in DM8148. If not - why ? Thank you, Ran -- To unsubscribe from this list: send the line unsubscribe linux-omap in the body of a message to majord...@vger.kernel.org More

omap voltage driver errors

Hello, I receive the following errors in boot: omap_voltage_early_init: voltage driver support not added regulator: core version 0.5 regulator: dummy: NET: Registered protocol family 16 omap_voltage_domain_lookup: Voltage driver init not yet happened.Faulting! omap_voltage_add_dev: VDD

Ethernet WOL (wake on lan)

Hello, I would please like to ask how I should use therenet WOL (wake on lan) ? I am using device smsc911x, and I can see in code that there is reference to WOL. But I don't understand how this should function. Should I call smsc911x_suspend() smsc911x_resume() or does it automatically

Re: reboot command fails with low frequency

I added power support to kernel menuconfig, such as cpuidle, and it seems to work fine. I also validated in counter that cpu gets into retention. We observer that with highest available frequency (60) reboot command is OK, but when frequency is changed to lower value, the reboot command

Re: reboot command fails with low frequency

We observer that with highest available frequency (60) reboot command is OK, but when frequency is changed to lower value, the reboot command fails. Has anyone observed such behaviour ? I remember some commit for this problem. What version of the linux are you running? I use Linux

Re: reboot command fails with low frequency

On Thu, Mar 5, 2015 at 12:58 PM, Michael Trimarchi mich...@amarulasolutions.com wrote: Hi You should find the twl4030 power script and you should have something like this static struct twl4030_ins wrst_seq[] __initdata = { {MSG_SINGULAR(DEV_GRP_NULL, 0x1b, RES_STATE_OFF), 2},

Re: reboot command fails with low frequency

I think I can also do some workaround if I set the frequency to the highest level just before doing reset. The thing is that I mustn't use sysfs in my system. Is there some way to set frequency without using sysfs ? -- To unsubscribe from this list: send the line unsubscribe linux-omap in the body

reboot command - fail with power save support

Hello, I added power support to kernel menuconfig, such as cpuidle, and it seems to work fine. I also validated in counter that cpu gets into retention. The strange thing is that reboot now doesn't work and more: it starts printing garbage, but does not continue with reboot. Is there any idea ?

suspend ethernet only , with WOL (wake on lan)

Hello, I am using OMAP3530 with SMSC911X phy. I see in smsc911 driver that it contain WOL (wake on lan) feature here: http://lxr.free-electrons.com/source/drivers/net/ethernet/smsc/smsc911x.c 1. Is it that to enable WOL I just need ethtool (without configuring anything in kernel) ?

Re: Fail to enter retention

-mpu_pwrdm (0) prm_clkdm-wkup_pwrdm (0) cm_clkdm-core_pwrdm (0) Thank you, Ran On Mon, Nov 17, 2014 at 11:09 PM, Ran Shalit ransha...@gmail.com wrote: Hi Tony, Just printing the registers out in the idle loop most likely will give you the info you need. Probably a dumb question... But if I try

Re: Fail to enter retention

/system/cpu/cpu0/cpuidle/state3/time 0 ~ # cat /sys/devices/system/cpu/cpu0/cpuidle/state4/time 0 ~ # cat /sys/devices/system/cpu/cpu0/cpuidle/state5/time 0 ~ # cat /sys/devices/system/cpu/cpu0/cpuidle/state6/time 0 Regards, Ran On Tue, Nov 18, 2014 at 10:21 AM, Ran Shalit ransha...@gmail.com wrote

Re: Fail to enter retention

Hi Tony, I eventually managed to enter retention :)) I did the following changes: 1. added CONFIG_SUSPEND (though I do not use suspend/resume but only cpuidle, it seems to have some effect, I think without it the wakeup in console did not function correctly. 2. enabled sleep for all uart

Re: Fail to enter retention

, 2014 at 6:22 PM, Tony Lindgren t...@atomide.com wrote: * Ran Shalit ransha...@gmail.com [141116 12:13]: Hello, I'm using OMAP3530 with custom board. I have enabled all power mode features as described in PSP wiki, but it still fails to enter any state different from state0. Works for me

Smartreflex - validation failed

Hello, Does anyone knows how to validate smartreflex operation? I am setting new fequency but I than see that the voltage in all points is still the same as following: It seems that smartreflex is not enabled in default, so I enable smartreflext as following: ~ # echo 1

Re: Fail to enter retention

very much, Ran On Mon, Nov 17, 2014 at 8:09 PM, Tony Lindgren t...@atomide.com wrote: * Ran Shalit ransha...@gmail.com [141117 09:14]: Hi Tony, Thanks very much for suggestions, I am able to wakeup the uart (though it takes about 10 seconds till it wakeup). The wake-up should happen within

Re: Fail to enter retention

Lindgren t...@atomide.com wrote: * Ran Shalit ransha...@gmail.com [141117 11:48]: You need to look if you have some devices blocking deeper idle states in cm_idlest*_core and cm_idlest_per registers. The device will automatically idle whatever it can if there are no blockers. I believe

Fail to enter retention

Hello, I'm using OMAP3530 with custom board. I have enabled all power mode features as described in PSP wiki, but it still fails to enter any state different from state0. ~ # cat /dbg/pm_debug/count usbhost_pwrdm (ON),OFF:0,RET:0,INA:0,ON:1,RET-LOGIC-OFF:0,RET-MEMBANK1-OFF:0 sgx_pwrdm

understanding cpuidle

Hello, I try to understand the cpuidle main concept but have some difficulties. I could not find any documentation to explain the cpuidle. what does it mean that it enters idle when no thread to run ?if I have only one process which does only while(1) { printf(C); mdelay(1000); } Can I expect

nand gpmc - overriden values in kernel

Hello, In omap2_nand_gpmc_retime() the kernel override the gpmc cs configuration with other values. It resulted in failure of nand detection in some boards. Is there any reason for the override of gpmc cs values ? Thanks, Ran -- To unsubscribe from this list: send the line unsubscribe linux-omap

cpuidle vs suspend/resume

Hello, I am trying to understand the relation between HW PWM, and the linux mechanism (cpuidle and suspend/resume). If you are familiar with the relations between the 2 I wil appreciate your comments. For example, are the wakeup source relevant for changing the cpu state or do they trigger

cpuidle and SW sleep

Hello, Is there anyone who can please explain the relation between SW sleep (such as udelay), to change of C-state as done by cpuidle ? How is wakeup done ? As far as I understand udelay is sw delay not HW. Thanks for you comments, Ran -- To unsubscribe from this list: send the line unsubscribe

SRAM - power management

Hello, What happens to SRAM when omap gets into retention ? Does it need a speciasl treatment ? Thanks, Ran -- To unsubscribe from this list: send the line unsubscribe linux-omap in the body of a message to majord...@vger.kernel.org More majordomo info at

cpuidle - minimum time for sleep

Hello, Does anybody know what is the minimum expected time for sleep period with the cpuidle ? I intend t use the menu governer, and I try to estimate the sleep time. Thanks, Ran -- To unsubscribe from this list: send the line unsubscribe linux-omap in the body of a message to

ideas about idle loop and power management

Hello, I have a system which is required to have 2 modes operation: 1. idle - in which devices in Soc and on board should be off. 2. active mode Moving from idle to active on interrupt, and moving from active to idle when there is inactivity. After reading and re-reading about PM various

Re: ideas about idle loop and power management

On Tue, Sep 23, 2014 at 11:37 PM, Tony Lindgren t...@atomide.com wrote: * Ran Shalit ransha...@gmail.com [140923 12:24]: Hello, I have a system which is required to have 2 modes operation: 1. idle - in which devices in Soc and on board should be off. 2. active mode Hmm we do this already