[3.17+]
Reported-by: Tony Lindgren t...@atomide.com
Signed-off-by: Roger Quadros rog...@ti.com
---
drivers/mtd/nand/omap2.c | 3 ++-
1 file changed, 2 insertions(+), 1 deletion(-)
diff --git a/drivers/mtd/nand/omap2.c b/drivers/mtd/nand/omap2.c
index 3b357e9..758e594 100644
--- a/drivers/mtd
On 11/04/2014 05:55 PM, Tony Lindgren wrote:
* Roger Quadros rog...@ti.com [141104 02:50]:
Hi Tony,
These patches add CAN support for am33xx, am43xx and dra7 platforms.
They must go in together with CAN driver RAMINIT Syscon support [1].
Can you make this series not depend on [1] for most
On 11/04/2014 12:20 PM, Roger Quadros wrote:
Some TI SoCs like DRA7 have a RAMINIT register specification
different from the other AMxx SoCs and as expected by the
existing driver.
To add more insanity, this register is shared with other
IPs like DSS, PCIe and PWM.
Provides a more
On 11/04/2014 07:49 PM, Tony Lindgren wrote:
* Roger Quadros rog...@ti.com [141030 08:25]:
On 10/30/2014 05:10 PM, Tony Lindgren wrote:
* Roger Quadros rog...@ti.com [141021 05:43]:
Hi Tony,
These patches address GPMC configuration issues and are for v3.19.
Patches based on v3.18-rc1
On 11/05/2014 03:24 PM, Marc Kleine-Budde wrote:
On 11/04/2014 11:20 AM, Roger Quadros wrote:
DRA7 CAN IP suffers from a problem which causes it to be prevented
from fully turning OFF (i.e. stuck in transition) if the module was
disabled while there was traffic on the CAN_RX line.
To work
On 11/05/2014 03:30 PM, Marc Kleine-Budde wrote:
On 11/04/2014 11:21 AM, Roger Quadros wrote:
DRA7 SoC has 2 CAN IPs. Provide compatible IDs and RAMINIT
register data for both.
My understanding of the discussion with Wolfram was:
- We should put the number of the Interface into to DT
On 11/04/2014 03:14 AM, Tony Lindgren wrote:
* Tony Lindgren t...@atomide.com [141103 16:48]:
--- a/arch/arm/boot/dts/omap-gpmc-smsc911x.dtsi
+++ b/arch/arm/boot/dts/omap-gpmc-smsc911x.dtsi
+gpmc,device-width = 1;
+gpmc,burst-length = 4;
I've left out the
We want to have more data than just can_dev_id to be present
in the driver data e.g. TI platforms need RAMINIT register
description. Introduce the c_can_driver_data structure and move
the can_dev_id into it.
Tidy up the way it is used on probe().
Signed-off-by: Roger Quadros rog...@ti.com
moved to driver data instead of device tree file.
v2:
- added ti vendor prefix to TI specific raminit properties.
- split DTS changes into a separate series
cheers,
-roger
---
Roger Quadros (8):
net: can: c_can: Add timeout to c_can_hw_raminit_ti()
net: can: c_can: Introduce c_can_driver_data
and START/DONE bit position and use the
syscon/regmap framework to access the register.
Signed-off-by: Roger Quadros rog...@ti.com
---
.../devicetree/bindings/net/can/c_can.txt | 3 +
drivers/net/can/c_can/c_can.h | 9 ++-
drivers/net/can/c_can/c_can_platform.c
Some SoCs e.g. (TI DRA7xx) need a START pulse to start the
RAMINIT sequence i.e. START bit must be set and cleared before
checking for the DONE bit status.
Signed-off-by: Roger Quadros rog...@ti.com
---
drivers/net/can/c_can/c_can_platform.c | 6 ++
1 file changed, 6 insertions(+)
diff
DRA7 SoC has 2 CAN IPs. Provide compatible IDs and RAMINIT
register data for both.
Signed-off-by: Roger Quadros rog...@ti.com
---
Documentation/devicetree/bindings/net/can/c_can.txt | 1 +
drivers/net/can/c_can/c_can_platform.c | 16
2 files changed, 17 insertions
Some platforms (e.g. TI) need special RAMINIT register handling.
Provide a way to store RAMINIT register description in driver data.
Signed-off-by: Roger Quadros rog...@ti.com
---
drivers/net/can/c_can/c_can.h | 6 ++
drivers/net/can/c_can/c_can_platform.c | 2 ++
2 files changed, 8
on CAN up and back to the
SLEEP pin state on CAN down.
Signed-off-by: Roger Quadros rog...@ti.com
---
drivers/net/can/c_can/c_can.c | 20
drivers/net/can/c_can/c_can.h | 1 +
drivers/net/can/c_can/c_can_platform.c | 20
3 files changed, 41
-by: Roger Quadros rog...@ti.com
---
drivers/net/can/c_can/c_can_platform.c | 10 +-
1 file changed, 9 insertions(+), 1 deletion(-)
diff --git a/drivers/net/can/c_can/c_can_platform.c
b/drivers/net/can/c_can/c_can_platform.c
index fb279d6..b144e71 100644
--- a/drivers/net/can/c_can
AM3352 SoC has 2 DCAN modules. Add compatible id and
raminit driver data for am3352 DCAN.
Signed-off-by: Roger Quadros rog...@ti.com
---
Documentation/devicetree/bindings/net/can/c_can.txt | 3 ++-
drivers/net/can/c_can/c_can_platform.c | 14 ++
2 files changed, 16
The SoC supports 2 DCAN nodes. Add them.
Signed-off-by: Roger Quadros rog...@ti.com
---
arch/arm/boot/dts/dra7.dtsi | 22 ++
1 file changed, 22 insertions(+)
diff --git a/arch/arm/boot/dts/dra7.dtsi b/arch/arm/boot/dts/dra7.dtsi
index 5fd52cd..9d84846 100644
--- a/arch/arm
Display and DCAN drivers use syscon regmap to access some registers
in the CORE control area. Add the syscon regmap node for this
area.
Cc: Tomi Valkeinen tomi.valkei...@ti.com
Cc: Nishanth Menon n...@ti.com
Signed-off-by: Roger Quadros rog...@ti.com
---
arch/arm/boot/dts/dra7.dtsi | 5 +
1
The board has 2 CAN ports but only the first one can be used.
Enable the first CAN port.
WAKEUP0 pin doesn't have INPUT enable bit so we just disable
weak PULLs.
The second CAN port cannot be used without hardware modification
so we don't enable the second port.
Signed-off-by: Roger Quadros rog
syscon property to syscon-raminit
v2:
- Added vendor prefix ti, to raminit properties
- Updated am335x dcan nodes
[1] - CAN driver RAMINIT Syscon support
http://article.gmane.org/gmane.linux.can/6773
cheers,
-roger
---
Mugunthan V N (1):
arm: dts: am437x-gp: Add dcan support
Roger Quadros (9
The board has 2 CAN ports but only the first one can be used.
Enable the first CAN port.
WAKEUP0 pin doesn't have INPUT enable bit so we just disable
weak PULLs.
The second CAN port cannot be used without hardware modification
so we don't enable the second port.
Signed-off-by: Roger Quadros rog
Signed-off-by: Roger Quadros rog...@ti.com
---
arch/arm/boot/dts/am437x-gp-evm.dts | 26 ++
1 file changed, 26 insertions(+)
diff --git a/arch/arm/boot/dts/am437x-gp-evm.dts
b/arch/arm/boot/dts/am437x-gp-evm.dts
index e7ac47f..58594fd 100644
--- a/arch/arm/boot/dts/am437x-gp
Use syscon regmap to expose the Control module register space.
This register space is shared between many users e.g. DCAN, USB, display, etc.
Signed-off-by: Roger Quadros rog...@ti.com
---
arch/arm/boot/dts/am33xx.dtsi | 5 +
1 file changed, 5 insertions(+)
diff --git a/arch/arm/boot/dts
Use syscon regmap to expose the Control module register space.
This register space is shared between many users e.g. DCAN, USB, display, etc.
Signed-off-by: Roger Quadros rog...@ti.com
---
arch/arm/boot/dts/am4372.dtsi | 5 +
1 file changed, 5 insertions(+)
diff --git a/arch/arm/boot/dts
DCAN1 is routed to CAN port (J11) when Profile 1 is selected on the
profile selection switch.
Provide information for DCAN1 pins and node but keep it disabled
by default. User has to manually enable it if Profile 1 is chosen.
Signed-off-by: Roger Quadros rog...@ti.com
---
arch/arm/boot/dts
The SoC contains 2 DCAN modules. Add them.
Signed-off-by: Roger Quadros rog...@ti.com
---
arch/arm/boot/dts/am4372.dtsi | 22 ++
1 file changed, 22 insertions(+)
diff --git a/arch/arm/boot/dts/am4372.dtsi b/arch/arm/boot/dts/am4372.dtsi
index 899c57c..98f81c9 100644
Add raminit-syscon property to specify the RAMINIT register.
Add clock information.
Rename can nodes from d_can to can to be compliant
with the ePAPR specs.
Signed-off-by: Roger Quadros rog...@ti.com
---
arch/arm/boot/dts/am33xx.dtsi | 20
1 file changed, 12 insertions(+), 8
On 10/30/2014 06:30 PM, Tony Lindgren wrote:
* Roger Quadros rog...@ti.com [141030 08:05]:
On 10/30/2014 04:45 PM, Tony Lindgren wrote:
* Roger Quadros rog...@ti.com [141030 07:21]:
On 10/30/2014 02:29 AM, Tony Lindgren wrote:
+static void gpmc_cs_show_timings(int cs, const char *desc
On 10/31/2014 03:50 PM, Nishanth Menon wrote:
On 12:52-20141031, Roger Quadros wrote:
For PIN_OUTPUT_PULLUP and PIN_OUTPUT_PULLDOWN we must not set the
PULL_DIS bit which disables the PULLs.
While at that get rid for the PULL_ENA defination. It is misleading
as there is no PULL enable bit
On 10/30/2014 05:49 PM, Tony Lindgren wrote:
* Roger Quadros rog...@ti.com [141030 05:01]:
On 10/30/2014 02:28 AM, Tony Lindgren wrote:
+
+ /*
+* gpmc_ncs0, gpmc_nadv_ale, gpmc_noe, gpmc_nwe,
gpmc_wait0 not muxable
+* according
)
Signed-off-by: Roger Quadros rog...@ti.com
---
include/dt-bindings/pinctrl/dra.h | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/include/dt-bindings/pinctrl/dra.h
b/include/dt-bindings/pinctrl/dra.h
index 3d33794..7448edf 100644
--- a/include/dt-bindings/pinctrl/dra.h
+++ b
On 11/03/2014 04:30 PM, Nishanth Menon wrote:
On 12:09-20141103, Roger Quadros wrote:
For PIN_OUTPUT_PULLUP and PIN_OUTPUT_PULLDOWN we must not set the
PULL_DIS bit which disables the PULLs.
PULL_ENA is a 0 and using it in an OR operation is a NOP, so don't
use it in the PIN_OUTPUT_PULLUP
file needs
to be fixed to consider this constraint of the SoC.
Signed-off-by: Nishanth Menon n...@ti.com
Acked-by: Roger Quadros rog...@ti.com
I'm assuming that vddshv8 (MMC1 power group) can be switched off.
cheers,
-roger
---
Patch is based on v3.18-rc1 tag.
arch/arm/boot/dts/dra7
On 11/03/2014 04:59 PM, Nishanth Menon wrote:
On 11/03/2014 08:44 AM, Roger Quadros wrote:
On 11/03/2014 04:30 PM, Nishanth Menon wrote:
On 12:09-20141103, Roger Quadros wrote:
For PIN_OUTPUT_PULLUP and PIN_OUTPUT_PULLDOWN we must not set the
PULL_DIS bit which disables the PULLs.
PULL_ENA
On 10/30/2014 06:30 PM, Tony Lindgren wrote:
* Roger Quadros rog...@ti.com [141030 08:05]:
On 10/30/2014 04:45 PM, Tony Lindgren wrote:
* Roger Quadros rog...@ti.com [141030 07:21]:
On 10/30/2014 02:29 AM, Tony Lindgren wrote:
+static void gpmc_cs_show_timings(int cs, const char *desc
: dra: dt-bindings: Fix pull enable/disable)
Signed-off-by: Roger Quadros rog...@ti.com
---
include/dt-bindings/pinctrl/dra.h | 9 -
1 file changed, 4 insertions(+), 5 deletions(-)
diff --git a/include/dt-bindings/pinctrl/dra.h
b/include/dt-bindings/pinctrl/dra.h
index 3d33794..71098e4
not touch that as in general the mux settings in nolo are
correct.
Cc: Kevin Hilman khil...@kernel.org
Cc: Roger Quadros rog...@ti.com
Signed-off-by: Tony Lindgren t...@atomide.com
---
arch/arm/boot/dts/omap3-n900.dts | 29 +
1 file changed, 29 insertions
0x0200 (32MB) 0x0200 (32MB)
64MB NOR0x0400 (64MB) 0x0400 (64MB)
128MB NOR 0x0800 (128MB) 0x0800 (128MB)
256MB NOR 0x1000 (256MB) 0x1000 (256MB)
Let's also add comments to the fixed entries while at it.
Cc: Roger Quadros rog
-standard initialization added to 8250
driver to properly fix this issue.
Cc: Roger Quadros rog...@ti.com
Signed-off-by: Tony Lindgren t...@atomide.com
I haven't cross checked the timings, but otherwise it looks good to me.
cheers,
-roger
---
arch/arm/boot/dts/omap-zoom-common.dtsi | 58
struct gpmc_cs_data
as a wrapper for all the GPMC chipselect related data.
Cc: Roger Quadros rog...@ti.com
Signed-off-by: Tony Lindgren t...@atomide.com
Acked-by: Roger Quadros rog...@ti.com
cheers,
-roger
--
To unsubscribe from this list: send the line unsubscribe linux-omap in
the body
earlier so we can use that for checking if anything
was configured.
Cc: Roger Quadros rog...@ti.com
Signed-off-by: Tony Lindgren t...@atomide.com
---
arch/arm/mach-omap2/gpmc.c | 141
+++--
1 file changed, 137 insertions(+), 4 deletions(-)
diff
need to move the parsing of the device tree provided
configuration a bit earlier so we can use that for checking if anything
was configured.
Cc: Roger Quadros rog...@ti.com
Signed-off-by: Tony Lindgren t...@atomide.com
---
arch/arm/mach-omap2/gpmc.c | 141
On 10/30/2014 02:29 AM, Tony Lindgren wrote:
Now that we have timings in the .dts files for smc91x
and 8250, we can remove the device specific checks and
just print out the bootloader timings for devices that
may not have timings in the .dts files.
Cc: Roger Quadros rog...@ti.com
Signed
smc91x support.
Cc: Roger Quadros rog...@ti.com
Signed-off-by: Tony Lindgren t...@atomide.com
Acked-by: Roger Quadros rog...@ti.com
cheers,
-roger
--
To unsubscribe from this list: send the line unsubscribe linux-omap in
the body of a message to majord...@vger.kernel.org
More majordomo info
Hi Tony,
On 10/21/2014 01:41 PM, Roger Quadros wrote:
Hi Tony,
These patches add NAND and USB support for DRA72-evm.
Patches are for v3.19 and based on v3.18-rc1.
I've tested that NAND and USB host works fine on DRA72-evm.
I couldn't get USB gadget mode to work. It doesn't work on DRA7
On 10/30/2014 04:45 PM, Tony Lindgren wrote:
* Roger Quadros rog...@ti.com [141030 07:21]:
On 10/30/2014 02:29 AM, Tony Lindgren wrote:
+static void gpmc_cs_show_timings(int cs, const char *desc)
+{
+ gpmc_show_regs(cs, desc);
+
+ pr_info(gpmc cs%i access configuration:\n, cs
On 10/30/2014 05:10 PM, Tony Lindgren wrote:
* Roger Quadros rog...@ti.com [141021 05:43]:
Hi Tony,
These patches address GPMC configuration issues and are for v3.19.
Patches based on v3.18-rc1.
- Make sure to print a user visible error if a requested GPMC timing
configuration can't be met
On 10/29/2014 12:23 AM, Tony Lindgren wrote:
* Roger Quadros rog...@ti.com [141021 05:43]:
Simplify set_gpmc_timing_reg() and always print error message
if the requested timing cannot be achieved due to a too fast
GPMC functional clock, irrespective if whether DEBUG is defined
On 10/29/2014 01:36 PM, Frans Klaver wrote:
On Tue, Oct 28, 2014 at 11:46:57AM +0200, Roger Quadros wrote:
On 10/27/2014 04:34 PM, Frans Klaver wrote:
Since commit 6d178ef2fd5e (mtd: nand: Move ELM driver and rename as
omap_elm), I don't have any mtd devices present on my am335x. This
changes
this, make elm_config defer probing until the omap_elm driver is
actually loaded.
Signed-off-by: Frans Klaver frans.kla...@xsens.com
Acked-by: Roger Quadros rog...@ti.com
cheers,
-roger
--
To unsubscribe from this list: send the line unsubscribe linux-omap in
the body of a message to majord
Nishant,
On 10/21/2014 08:32 PM, Nishanth Menon wrote:
On 12:16-20141021, Nishanth Menon wrote:
On Tue, Oct 21, 2014 at 11:43 AM, Nishanth Menon n...@ti.com wrote:
Roger,
On 10/21/2014 05:41 AM, Roger Quadros wrote:
DRA72-evm has a 256MB 16-bit wide NAND chip. Add
pinmux and NAND node
Hi Frans,
On 10/27/2014 03:32 PM, Frans Klaver wrote:
Since commit 6d178ef2fd5e (mtd: nand: Move ELM driver and rename as
omap_elm), I don't have any mtd devices present on my am335x. This
appears to be related to the link order of the omap_elm and omap2
objects. Fix it by swapping the two in
. The dts entries are correct
though.
cheers,
-roger
George Cherian (1):
ARM: dts: dra72-evm: Enable USB support for dra72-evm.
Roger Quadros (3):
ARM: dts: dra72-evm: Add NAND support
ARM: dts: DRA7: Move USB_OTG 4 to dra74x.dtsi
ARM: dts: dra72-evm: Add regulator information to USB2 PHYs
The 4th USB controller instance present only on the DRA74x family of
devices so move it there.
Signed-off-by: Roger Quadros rog...@ti.com
Acked-by: Nishanth Menon n...@ti.com
Signed-off-by: Sekhar Nori nsek...@ti.com
---
arch/arm/boot/dts/dra7.dtsi | 20
arch/arm/boot/dts
DRA72-evm has a 256MB 16-bit wide NAND chip. Add
pinmux and NAND node.
The NAND chips 'Chip select' and 'Write protect' can be
controlled using DIP Switch SW5. To use NAND,
the switch must be configured like so:
SW5.1 (NAND_SELn) = ON (LOW)
SW5.9 (GPMC_WPN) = OFF (HIGH)
Signed-off-by: Roger
The ldo4_reg regulator provides power to the USB1 and USB2
High Speed PHYs.
Signed-off-by: Roger Quadros rog...@ti.com
---
arch/arm/boot/dts/dra72-evm.dts | 8
1 file changed, 8 insertions(+)
diff --git a/arch/arm/boot/dts/dra72-evm.dts b/arch/arm/boot/dts/dra72-evm.dts
index ad6ec4a
From: George Cherian george.cher...@ti.com
Add USB data and pinctrl for USB.
Signed-off-by: George Cherian george.cher...@ti.com
Signed-off-by: Sekhar Nori nsek...@ti.com
Signed-off-by: Roger Quadros rog...@ti.com
---
arch/arm/boot/dts/dra72-evm.dts | 24
1 file changed
The 5th NAND partition should be named NAND.u-boot-spl-os
instead of NAND.u-boot-spl. This is to be consistent with other
TI boards as well as u-boot.
Fixes: 91994facdd2d (ARM: dts: am335x-evm: NAND: update MTD partition table)
Signed-off-by: Roger Quadros rog...@ti.com
Signed-off-by: Sekhar
in the kernel log.
Signed-off-by: Roger Quadros rog...@ti.com
Signed-off-by: Sekhar Nori nsek...@ti.com
---
arch/arm/mach-omap2/gpmc.c | 23 ++-
1 file changed, 6 insertions(+), 17 deletions(-)
diff --git a/arch/arm/mach-omap2/gpmc.c b/arch/arm/mach-omap2/gpmc.c
index 5fa3755
-by: Roger Quadros rog...@ti.com
Signed-off-by: Sekhar Nori nsek...@ti.com
---
arch/arm/mach-omap2/gpmc.c | 7 ++-
1 file changed, 6 insertions(+), 1 deletion(-)
diff --git a/arch/arm/mach-omap2/gpmc.c b/arch/arm/mach-omap2/gpmc.c
index 45f680f..f5d9dd2 100644
--- a/arch/arm/mach-omap2/gpmc.c
+++ b
-by: Roger Quadros rog...@ti.com
Signed-off-by: Sekhar Nori nsek...@ti.com
---
arch/arm/mach-omap2/gpmc.c | 8
1 file changed, 8 insertions(+)
diff --git a/arch/arm/mach-omap2/gpmc.c b/arch/arm/mach-omap2/gpmc.c
index f5d9dd2..0ba95d3 100644
--- a/arch/arm/mach-omap2/gpmc.c
+++ b/arch/arm
lines A26-A11 for non-NAND devices.
- Perform GPMC configuration as per recommended procedure i.e.
keep Chip Select disabled while changing GPMC configuration.
Tested on dra7-evm, am437x-gp-evm and beagleboard.
cheers,
-roger
Roger Quadros (5):
ARM: OMAP2+: gpmc: Print error message
As per the OMAP reference manual [1], the Chip Select must be
disabled (i.e. CSVALID is 0) while configuring any of the
Chip select parameters.
[1] - 10.1.5.1 Chip-Select Base Address and Region Size Configuration
http://www.ti.com/lit/pdf/swpu177
Signed-off-by: Roger Quadros rog...@ti.com
This prevents potential division by zero errors
if GPMC fck turns out to be zero due to faulty clock
data.
Use resource managed clk_get() API.
Signed-off-by: Roger Quadros rog...@ti.com
Signed-off-by: Sekhar Nori nsek...@ti.com
---
arch/arm/mach-omap2/gpmc.c | 15 +++
1 file changed
On 10/14/2014 10:49 PM, Tero Kristo wrote:
On 10/14/2014 01:47 PM, Roger Quadros wrote:
Hi Tero,
The USB_DPLL doesn't have recommended M/N settings as per the TRM [1]
Thus the omapconf audit fails.
Any ideas of how we can fix this up? Should we add a new clock.ops structure
for
USB_DPLL
Hi Tero,
The USB_DPLL doesn't have recommended M/N settings as per the TRM [1]
Thus the omapconf audit fails.
Any ideas of how we can fix this up? Should we add a new clock.ops structure for
USB_DPLL to make sure that we don't violate the TRM recommended settings?
or should we just add some
On 09/30/2014 07:04 PM, Marc Kleine-Budde wrote:
On 09/30/2014 05:25 PM, Wolfram Sang wrote:
Yes, but syscon_regmap_lookup_by_phandle() doesn't need any support for
additional parameters. Have a look at:
drivers/net/ethernet/stmicro/stmmac/dwmac-socfpga.c
First get the regmap, then the 1st
On 10/01/2014 11:47 AM, Marc Kleine-Budde wrote:
On 10/01/2014 10:45 AM, Roger Quadros wrote:
On 09/30/2014 07:04 PM, Marc Kleine-Budde wrote:
On 09/30/2014 05:25 PM, Wolfram Sang wrote:
Yes, but syscon_regmap_lookup_by_phandle() doesn't need any support for
additional parameters. Have
On 10/01/2014 01:01 PM, Marc Kleine-Budde wrote:
On 10/01/2014 11:06 AM, Roger Quadros wrote:
On 10/01/2014 11:47 AM, Marc Kleine-Budde wrote:
On 10/01/2014 10:45 AM, Roger Quadros wrote:
On 09/30/2014 07:04 PM, Marc Kleine-Budde wrote:
On 09/30/2014 05:25 PM, Wolfram Sang wrote:
Yes
On 10/01/2014 01:43 PM, Wolfram Sang wrote:
Unfortunately it is 5 ;)
We have display IP related bit in between 3 and 5 :P
What on earth were the HW engineers thinking
Let's test my RNG on the bit-placement of this register :)
:D
...if we just have the instance parameter
`omap_elm_correct_data':
drivers/mtd/nand/omap2.c:1444: undefined reference to
`elm_decode_bch_error_page'
Reported-by: Arnd Bergmann a...@arndb.de
Signed-off-by: Ezequiel Garcia ezequ...@vanguardiasur.com.ar
Signed-off-by: Roger Quadros rog...@ti.com
---
drivers/mtd/nand/Kconfig | 5 -
drivers/mtd/nand
is optional but doesn't harm on legacy OMAP platforms
not having
the ELM/BCH hardware.
--
cheers,
-roger
Ezequiel Garcia (1):
mtd: nand: Force omap_elm to be built as a module if omap2_nand is a
module
Roger Quadros (1):
mtd: nand: omap: Correct CONFIG_MTD_NAND_OMAP_BCH help message
The MTD_NAND_OMAP_BCH doesn't harm on legacy OMAP platforms
so don't state that it should be disabled for them.
Signed-off-by: Roger Quadros rog...@ti.com
---
drivers/mtd/nand/Kconfig | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/mtd/nand/Kconfig b/drivers/mtd/nand
On 09/30/2014 04:52 PM, Wolfram Sang wrote:
+- ti,raminit-syscon : Handle to system control region that contains
the
+RAMINIT register. If specified, the second memory
resource
+in the reg property must index into the RAMINIT
+
On 09/30/2014 04:26 PM, Wolfram Sang wrote:
On Tue, Sep 09, 2014 at 05:31:09PM +0300, Roger Quadros wrote:
Some TI SoCs like DRA7 have a RAMINIT register specification
different from the other AMxx SoCs and as expected by the
existing driver.
To add more insanity, this register is shared
On 09/30/2014 04:45 PM, Marc Kleine-Budde wrote:
On 09/30/2014 03:26 PM, Wolfram Sang wrote:
On Tue, Sep 09, 2014 at 05:31:09PM +0300, Roger Quadros wrote:
Some TI SoCs like DRA7 have a RAMINIT register specification
different from the other AMxx SoCs and as expected by the
existing driver
)
Signed-off-by: Roger Quadros rog...@ti.com
---
arch/arm/boot/dts/dra7-evm.dts | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/arch/arm/boot/dts/dra7-evm.dts b/arch/arm/boot/dts/dra7-evm.dts
index 8ddd012..53b6fba 100644
--- a/arch/arm/boot/dts/dra7-evm.dts
+++ b/arch/arm/boot/dts
Oops. send to the wrong mailing list. Please ignore.
cheers,
-roger
On 09/26/2014 04:02 PM, Roger Quadros wrote:
The interrupt line of pcf I/O expander chip @i2c1:0x21
is tied to gpio6_11 and not gpio6_14. Fix that.
Without this USB_ID detection will not work and I2C3 bus activity
On 09/22/2014 09:58 PM, Brian Norris wrote:
On Sat, Sep 20, 2014 at 05:53:16PM +0100, Ezequiel Garcia wrote:
This fixes the following build error when omap2_nand is chosen built-in,
and omap_elm is chosen as a module:
drivers/mtd/nand/omap2.c:2010: undefined reference to `elm_config'
On 09/20/2014 07:53 PM, Ezequiel Garcia wrote:
This fixes the following build error when omap2_nand is chosen built-in,
and omap_elm is chosen as a module:
drivers/mtd/nand/omap2.c:2010: undefined reference to `elm_config'
drivers/mtd/nand/omap2.c:1980: undefined reference to
Hi Ezequiel,
On 09/20/2014 07:53 PM, Ezequiel Garcia wrote:
I've collected all the changes recently discussed in a whole patchset.
If you are just reading this for the first time please take a look at:
[1] http://www.spinics.net/lists/linux-omap/msg110965.html
[2]
Hi Tony,
On 09/09/2014 01:40 AM, Tony Lindgren wrote:
* Roger Quadros rog...@ti.com [140908 01:08]:
Hi Tony,
This is needed for 3.17 otherwise NAND is broken on dra7-evm. Thanks.
Thanks applying into omap-for-v3.17/fixes-v2.
I don't see this branch. Did you put this patch somewhere else
On 09/22/2014 03:51 PM, Ezequiel Garcia wrote:
On 09/22/2014 09:22 AM, Roger Quadros wrote:
Hi Ezequiel,
On 09/20/2014 07:53 PM, Ezequiel Garcia wrote:
I've collected all the changes recently discussed in a whole patchset.
If you are just reading this for the first time please take
Hi Michael,
On 08/04/2014 06:27 PM, Michael Welling wrote:
On Mon, Aug 04, 2014 at 12:34:16PM +0300, Roger Quadros wrote:
On 08/02/2014 02:51 AM, Michael Welling wrote:
On Fri, Aug 1, 2014 at 6:04 PM, Michael Welling mwell...@emacinc.com
wrote:
On Wed, Jul 30, 2014 at 12:03:22PM +0300
On 09/19/2014 12:37 PM, Michael Trimarchi wrote:
Hi Roger
On Fri, Sep 19, 2014 at 11:22 AM, Roger Quadros rog...@ti.com wrote:
Hi Michael,
snip
It should be noted that the external HUB must be prevented from
autosuspend
otherwise the resume fails.
OK. I was able to reproduce
On 09/18/2014 10:46 AM, Ezequiel Garcia wrote:
On 18 September 2014 06:59, Brian Norris computersforpe...@gmail.com wrote:
On Thu, Sep 11, 2014 at 12:02:08PM -0300, Ezequiel Garcia wrote:
This commit adds a new platform-data boolean property that enables use
of a flash-based bad block table.
On 09/18/2014 06:00 AM, Brian Norris wrote:
On Mon, Sep 15, 2014 at 11:27:43AM +0300, Roger Quadros wrote:
On 09/12/2014 07:56 PM, Ezequiel Garcia wrote:
On 12 Sep 12:01 PM, Roger Quadros wrote:
On 09/11/2014 04:47 PM, Ezequiel Garcia wrote:
This commit adds a hidden option to build
On 09/18/2014 11:40 AM, Ezequiel Garcia wrote:
On 18 September 2014 04:00, Brian Norris computersforpe...@gmail.com wrote:
On Mon, Sep 15, 2014 at 11:27:43AM +0300, Roger Quadros wrote:
On 09/12/2014 07:56 PM, Ezequiel Garcia wrote:
On 12 Sep 12:01 PM, Roger Quadros wrote:
On 09/11/2014 04:47
have to read a few pages, instead of a page or two from every block on
the flash.
Signed-off-by: Ezequiel Garcia ezequ...@vanguardiasur.com.ar
Acked-by: Roger Quadros rog...@ti.com
cheers,
-roger
--
To unsubscribe from this list: send the line unsubscribe linux-omap in
the body of a message
-by: Roger Quadros rog...@ti.com
cheers,
-roger
--
To unsubscribe from this list: send the line unsubscribe linux-omap in
the body of a message to majord...@vger.kernel.org
More majordomo info at http://vger.kernel.org/majordomo-info.html
message.
Signed-off-by: Ezequiel Garcia ezequ...@vanguardiasur.com.ar
Acked-by: Roger Quadros rog...@ti.com
cheers,
-roger
--
To unsubscribe from this list: send the line unsubscribe linux-omap in
the body of a message to majord...@vger.kernel.org
More majordomo info at http
On 09/12/2014 07:46 PM, Ezequiel Garcia wrote:
On 12 September 2014 09:54, Roger Quadros rog...@ti.com wrote:
Hi Ezequiel,
On 09/11/2014 04:47 PM, Ezequiel Garcia wrote:
Following the recent discussion with Roger, here's a few patches that
(hopefully) fix all the issues.
The first patches
On 09/12/2014 07:56 PM, Ezequiel Garcia wrote:
On 12 Sep 12:01 PM, Roger Quadros wrote:
On 09/11/2014 04:47 PM, Ezequiel Garcia wrote:
This commit adds a hidden option to build the omap_elm as a module, if
omap2_nand is a module (and similarly in the built-in case).
This fixes the following
Hi Ezequiel,
On 09/11/2014 04:47 PM, Ezequiel Garcia wrote:
Following the recent discussion with Roger, here's a few patches that
(hopefully) fix all the issues.
The first patches rename the OMAP NAND drivers, so they are now called
omap2_nand and omap_elm.
The last patch picks an idea
On 09/11/2014 04:47 PM, Ezequiel Garcia wrote:
Rename it to a less generic name, so the module is built with a meaningful
name instead of the previous 'omap2.ko'.
Signed-off-by: Ezequiel Garcia ezequ...@vanguardiasur.com.ar
Acked-by: Roger Quadros rog...@ti.com
---
drivers/mtd/nand
-by: Ezequiel Garcia ezequ...@vanguardiasur.com.ar
Acked-by: Roger Quadros rog...@ti.com
---
drivers/mtd/devices/Makefile | 1 -
drivers/mtd/nand/Makefile | 1 +
drivers/mtd/{devices/elm.c = nand/omap_elm.c} | 0
3 files changed, 1 insertion(+), 1 deletion
On 09/11/2014 04:47 PM, Ezequiel Garcia wrote:
This commit adds a hidden option to build the omap_elm as a module, if
omap2_nand is a module (and similarly in the built-in case).
This fixes the following build error when omap2_nand is chosen built-in,
and omap_elm is chosen as a module:
On 09/09/2014 06:06 PM, Marc Kleine-Budde wrote:
On 09/09/2014 05:04 PM, Marc Kleine-Budde wrote:
On 09/09/2014 04:55 PM, Roger Quadros wrote:
The SoC supports 2 DCAN nodes. Add them.
I think you should put the device-tree ml for DT related patches on Cc.
OK.
Signed-off-by: Roger Quadros
On 09/09/2014 06:09 PM, Marc Kleine-Budde wrote:
On 09/09/2014 04:55 PM, Roger Quadros wrote:
From: Afzal Mohammed af...@ti.com
Add dcan nodes.
Signed-off-by: Afzal Mohammed af...@ti.com
Signed-off-by: Mugunthan V N mugunthan...@ti.com
Signed-off-by: George Cherian george.cher...@ti.com
On 09/09/2014 06:08 PM, Marc Kleine-Budde wrote:
On 09/09/2014 04:55 PM, Roger Quadros wrote:
The d_can driver expects appropriately named aliases for
the d_can nodes for the RAMINIT control register access.
Provide those, otherwise RAMINIT register won't be configured.
Get's rid
601 - 700 of 2230 matches
Mail list logo
