: Paul Walmsley p...@pwsan.com
Acked-by: Rajendra Nayak rna...@ti.com
Signed-off-by: Santosh Shilimkar santosh.shilim...@ti.com
---
arch/arm/mach-omap2/prcm_mpu44xx.h | 14 +---
arch/arm/mach-omap2/prcm_mpu_44xx_54xx.h | 36 ++
2 files changed, 37
From: Benoit Cousson b-cous...@ti.com
Add the PRCM MPU registers for OMAP54XX platforms.
Cc: Paul Walmsley p...@pwsan.com
Signed-off-by: Benoit Cousson b-cous...@ti.com
[santosh.shilim...@ti.com: Generated es2.0 data]
Signed-off-by: Santosh Shilimkar santosh.shilim...@ti.com
---
arch/arm/mach
From: Benoit Cousson b-cous...@ti.com
Adding the OMAP5 specific header for SCRM module.
Cc: Paul Walmsley p...@pwsan.com
Signed-off-by: Benoit Cousson b-cous...@ti.com
[santosh.shilim...@ti.com: Generated es2.0 data]
Signed-off-by: Santosh Shilimkar santosh.shilim...@ti.com
---
arch/arm/mach
Include the OMAP5 data files in build. Initialise the voltage, power,
clock domains.
Cc: Paul Walmsley p...@pwsan.com
Signed-off-by: Santosh Shilimkar santosh.shilim...@ti.com
---
arch/arm/mach-omap2/Makefile |4
arch/arm/mach-omap2/io.c |7 +++
2 files changed, 11
Add voltagedomain related data for OMAP54XX SOCs. OMAP4 OPP data is
used for now. OMAP5 OPP data will be added as part of OMAP5 DVFS
support.
Cc: Kevin Hilman khil...@deeprootsystems.com
Cc: Paul Walmsley p...@pwsan.com
Signed-off-by: Benoit Cousson b-cous...@ti.com
Signed-off-by: Santosh
From: Benoit Cousson b-cous...@ti.com
Add the data file to describe all clock domains inside the OMAP54XX soc.
Cc: Paul Walmsley p...@pwsan.com
Signed-off-by: Benoit Cousson b-cous...@ti.com
[santosh.shilim...@ti.com: Generated es2.0 data]
Signed-off-by: Santosh Shilimkar santosh.shilim
From: Benoit Cousson b-cous...@ti.com
Add the data file to describe all power domains inside the OMAP54XX soc.
Cc: Paul Walmsley p...@pwsan.com
Signed-off-by: Benoit Cousson b-cous...@ti.com
[santosh.shilim...@ti.com: Generated es2.0 data]
Signed-off-by: Santosh Shilimkar santosh.shilim
Paul,
On Thursday 04 April 2013 01:39 AM, Paul Walmsley wrote:
cc Kevin
Hi
On Wed, 20 Mar 2013, Santosh Shilimkar wrote:
Benoit Cousson (7):
ARM: OMAP5: PRM: Add OMAP54XX register and bitfield files
So it looks like this patch never made it to the mailing list. Was it too
On Thursday 04 April 2013 01:43 AM, Paul Walmsley wrote:
Hi,
On Fri, 18 Jan 2013, Santosh Shilimkar wrote:
Series contains the hwmod, clock and prm data files for OMAP54xx SOCs.
This data was kept out of tree to be validated on es2.0 silicon version
and also to avoid the es1.0/es2.0
+ Tero and few more TI folks,
On Thursday 04 April 2013 01:12 AM, Paul Walmsley wrote:
Hi Santosh
On Wed, 3 Apr 2013, Santosh Shilimkar wrote:
Thes patchset has already missed last couple of merge windows and its the
biggest bottleneck in getting OMAP5 booting from mainline. So I request
On Thursday 04 April 2013 01:14 AM, Kevin Hilman wrote:
Hi Santosh,
Santosh Shilimkar santosh.shilim...@ti.com writes:
OMAP5 and future OMAP based SOCs has backward compatible MPUSS
IP block with OMAP4. It's programming model is mostly similar.
Hence consolidate the OMAP MPUSS code so
On Thursday 04 April 2013 01:50 AM, Kevin Hilman wrote:
Santosh Shilimkar santosh.shilim...@ti.com writes:
OMAP5 has backward compatible PRCM block and it's programming
model is mostly similar to OMAP4. Same is going to be maintained
for future OMAP4 based SOCs. Hence consolidate the OMAP4
On Thursday 04 April 2013 05:21 PM, Santosh Shilimkar wrote:
On Thursday 04 April 2013 01:50 AM, Kevin Hilman wrote:
Santosh Shilimkar santosh.shilim...@ti.com writes:
OMAP5 has backward compatible PRCM block and it's programming
model is mostly similar to OMAP4. Same is going
On Thursday 04 April 2013 01:55 AM, Kevin Hilman wrote:
Santosh Shilimkar santosh.shilim...@ti.com writes:
Enables MPUSS ES2 power management mode using ES2_PM_MODE in
AMBA_IF_MODE register.
0x0: ES1 behavior, CPU cores would enter and exit OFF mode together. Broken
What is broken
On Thursday 04 April 2013 02:01 AM, Kevin Hilman wrote:
Santosh Shilimkar santosh.shilim...@ti.com writes:
In addition to the standard power-management technique, the OMAP5
MPU subsystem also employs an SR3-APG (mercury) power management
technology to reduce leakage.
It allows for full
On Thursday 04 April 2013 02:03 AM, Kevin Hilman wrote:
Santosh Shilimkar santosh.shilim...@ti.com writes:
With consolidated code, now we can add the .init_late hook for
OMAP5 to enable power management and mux initialization.
Acked-by: Nishanth Menon n...@ti.com
Signed-off-by: Santosh
On Thursday 04 April 2013 02:19 AM, Kevin Hilman wrote:
Santosh Shilimkar santosh.shilim...@ti.com writes:
Add power management code to handle the CPU off mode to enable CPUP hotplug
mode for OMAP5 devices. Separate suspend finisher is used for
OMAP5(Cortex-A15)
because it doesn't use SCU
On Thursday 04 April 2013 02:24 AM, Kevin Hilman wrote:
Santosh Shilimkar santosh.shilim...@ti.com writes:
While waking up CPU from off state using clock domain force wakeup, restore
the CPU power state to ON state before putting CPU clock domain under
hardware control. Otherwise CPU wakeup
On Thursday 04 April 2013 02:28 AM, Kevin Hilman wrote:
Santosh Shilimkar santosh.shilim...@ti.com writes:
When the entire MPUSS cluster is powered down in device off state, L2 cache
memory looses it's content and hence while targetting such a state,
l2 cache needs to be flushed to main
On Thursday 04 April 2013 02:33 AM, Kevin Hilman wrote:
Santosh Shilimkar santosh.shilim...@ti.com writes:
OMAP4 CPUidle driver registration call is under a loop which leads
to calling cpuidle_register_driver twice which is not intended.
Fix it by moving the driver registration outside
On Thursday 04 April 2013 02:33 AM, Kevin Hilman wrote:
Santosh Shilimkar santosh.shilim...@ti.com writes:
If the CPUidle device registration fails for some reason, we should
unregister the driver on error path.
Fix the code accordingly. Also when at it, check of the driver registration
On Thursday 04 April 2013 02:35 AM, Kevin Hilman wrote:
Santosh Shilimkar santosh.shilim...@ti.com writes:
It is useful to know the CPU power state along with MPUSS power state
in a supported C-state. Since the data is available via sysfs, one can
avoid scrolling the source code for precise
On Thursday 04 April 2013 03:07 AM, Kevin Hilman wrote:
Santosh Shilimkar santosh.shilim...@ti.com writes:
Current OMAP4 CPUIdle driver is using omap4_mpuss_read_prev_context_state()
function to check whether the MPU cluster lost context or not. Thanks to
couple CPUIdle, cluster low power
On Thursday 04 April 2013 02:40 AM, Kevin Hilman wrote:
Santosh Shilimkar santosh.shilim...@ti.com writes:
The OMAP5 idle driver can re-use most of OMAP4 CPUidle driver
implementation. Also the next derivative SOCs are going to re-use
the MPUSS so, same driver with minor updates can be re
On Thursday 04 April 2013 02:55 AM, Kevin Hilman wrote:
Santosh Shilimkar santosh.shilim...@ti.com writes:
The OMAP5 idle driver can re-use OMAP4 CPUidle driver implementation thanks
to compatible MPUSS design.
Though unlike OMAP4, on OMAP5 devices, MPUSS CSWR (Close Switch
Retention
On Thursday 04 April 2013 04:22 AM, Kevin Hilman wrote:
Hi Santosh,
Santosh Shilimkar santosh.shilim...@ti.com writes:
Here is the refreshed version(v2) of the OMAP5 PM suspport which was posted
earlier (March 1st 2013). Patch-set incorporates comments from Nishant
Menon (Thanks
On Thursday 04 April 2013 08:04 PM, Santosh Shilimkar wrote:
On Thursday 04 April 2013 04:22 AM, Kevin Hilman wrote:
Hi Santosh,
Santosh Shilimkar santosh.shilim...@ti.com writes:
Here is the refreshed version(v2) of the OMAP5 PM suspport which was posted
earlier (March 1st 2013). Patch-set
On Thursday 04 April 2013 10:22 PM, Tony Lindgren wrote:
* Santosh Shilimkar santosh.shilim...@ti.com [130404 04:15]:
+ Tero and few more TI folks,
On Thursday 04 April 2013 01:12 AM, Paul Walmsley wrote:
Hi Santosh
On Wed, 3 Apr 2013, Santosh Shilimkar wrote:
Thes patchset has already
On Wednesday 03 April 2013 04:47 PM, Peter Ujfalusi wrote:
cyclic DMA is only used by audio which needs DMA to be started without a
delay.
If the DMA for audio is started using the tasklet we experience random
channel switch (to be more precise: channel shift).
Reported-by: Peter Meerwald
On Wednesday 03 April 2013 05:22 PM, Peter Ujfalusi wrote:
On 04/03/2013 01:24 PM, Santosh Shilimkar wrote:
On Wednesday 03 April 2013 04:47 PM, Peter Ujfalusi wrote:
cyclic DMA is only used by audio which needs DMA to be started without a
delay.
If the DMA for audio is started using
On Monday 01 April 2013 10:17 PM, Tony Lindgren wrote:
* Santosh Shilimkar santosh.shilim...@ti.com [130320 01:42]:
Tony,
Here is the pull request for various OMAP5 generic updates which are posted
earlier on the list. It contains OMAP5 es2 related updates like idcode,
RAM base and couple
On Monday 01 April 2013 10:31 PM, Tony Lindgren wrote:
* Santosh Shilimkar santosh.shilim...@ti.com [130320 01:39]:
Tony,
Here is the pull request for OMAP serial driver sysconfig cleanup. The series
removes all the hackery of sysconfig from UART driver and let runtime backend
handle
Paul,
On Monday 01 April 2013 10:35 PM, Tony Lindgren wrote:
* Santosh Shilimkar santosh.shilim...@ti.com [130320 01:43]:
Tony,
Here is the pull request for OMAP5 data file patches which are on list from
last merge window. As aligned on list, I have dropped clock data from the
series
On Sunday 31 March 2013 07:24 PM, Pali Rohár wrote:
Closed and signed Nokia X-Loader bootloader stored in RX-51 nand does not set
IBE bit in ACTLR and starting kernel in non-secure mode. So direct write to
ACTLR by our kernel does not working and the code for ARM errata 430973 in
commit
of enabling sched_clock on omap5 and exynos5. There
should not be any reason not to use the arch timers for sched_clock.
Absolutely.
Signed-off-by: Rob Herring rob.herr...@calxeda.com
[..]
arch/arm/mach-omap2/timer.c |5 +
Acked-by: Santosh Shilimkar santosh.shilim
On Sunday 31 March 2013 07:10 AM, Paul Walmsley wrote:
(and also please add Greg's ack when this is reposted)
Yes. His ack is already picked up in the pull request I sent.
Will add a note about DMA support in the commit.
Regards,
Santosh
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On Thursday 28 March 2013 02:17 AM, Santosh Shilimkar wrote:
On Thursday 28 March 2013 12:13 AM, Kevin Hilman wrote:
Santosh Shilimkar santosh.shilim...@ti.com writes:
This was added with intial port where OMAP PM support wasn't existing
and only simple WFI based hooks were used
On Thursday 28 March 2013 02:22 AM, Santosh Shilimkar wrote:
On Thursday 28 March 2013 02:19 AM, Tony Lindgren wrote:
* Santosh Shilimkar santosh.shilim...@ti.com [130327 13:52]:
On Thursday 28 March 2013 12:11 AM, Kevin Hilman wrote:
Santosh Shilimkar santosh.shilim...@ti.com writes:
From
On Thursday 28 March 2013 02:20 AM, Santosh Shilimkar wrote:
On Thursday 28 March 2013 01:24 AM, Kevin Hilman wrote:
Santosh Shilimkar santosh.shilim...@ti.com writes:
On Thursday 28 March 2013 12:15 AM, Kevin Hilman wrote:
Santosh Shilimkar santosh.shilim...@ti.com writes:
Move
On Thursday 28 March 2013 12:32 AM, Santosh Shilimkar wrote:
On Thursday 28 March 2013 12:06 AM, Kevin Hilman wrote:
Santosh Shilimkar santosh.shilim...@ti.com writes:
On OMAP platform, FIQ is reserved for secure environment only. If at all
the FIQ needs to be disabled, it involves going
On Thursday 28 March 2013 01:39 AM, Shilimkar, Santosh wrote:
Sorry for top posting ...
I will pick the ack and update commit log to prepare new pull request
for you.
I have updated the branch picking acks and updating changelogs and same
is available below. No change in code.
On Thursday 28 March 2013 03:16 PM, Russell King - ARM Linux wrote:
On Thu, Mar 28, 2013 at 12:34:50AM +0530, Santosh Shilimkar wrote:
On Thursday 28 March 2013 12:15 AM, Kevin Hilman wrote:
Santosh Shilimkar santosh.shilim...@ti.com writes:
Move the secondary CPU wakeup prepare code under
On Thursday 28 March 2013 05:34 PM, Russell King - ARM Linux wrote:
On Thu, Mar 28, 2013 at 03:28:12PM +0530, Santosh Shilimkar wrote:
On Thursday 28 March 2013 03:16 PM, Russell King - ARM Linux wrote:
On Thu, Mar 28, 2013 at 12:34:50AM +0530, Santosh Shilimkar wrote:
On Thursday 28 March
On Thursday 28 March 2013 12:06 AM, Kevin Hilman wrote:
Santosh Shilimkar santosh.shilim...@ti.com writes:
On OMAP platform, FIQ is reserved for secure environment only. If at all
the FIQ needs to be disabled, it involves going through security
API call. Hence the local_fiq_[enable/disable
On Thursday 28 March 2013 12:15 AM, Kevin Hilman wrote:
Santosh Shilimkar santosh.shilim...@ti.com writes:
Move the secondary CPU wakeup prepare code under smp_prepare_cpus().
Why?
Because that code belongs to smp_prepare_cpus(). As I said
in earlier patches, it was remainder of the pen
On Wednesday 27 March 2013 11:33 PM, Tony Lindgren wrote:
* Santosh Shilimkar santosh.shilim...@ti.com [130320 01:42]:
Tony,
Here is the pull request for various OMAP cleanups and fixes which are posted
earlier on the list. It contains OMAP4 smp cleanup, removal of unwanted
static
deps
On Thursday 28 March 2013 12:13 AM, Kevin Hilman wrote:
Santosh Shilimkar santosh.shilim...@ti.com writes:
This was added with intial port where OMAP PM support wasn't existing
and only simple WFI based hooks were used.
This should have been cleaned up while adding the PM support but some
On Thursday 28 March 2013 12:11 AM, Kevin Hilman wrote:
Santosh Shilimkar santosh.shilim...@ti.com writes:
From: Tero Kristo t-kri...@ti.com
Simplifies code and also allows the re-use as is on OMAP5 devices.
nit: changelog here is rather weak. It claims simplifies code but
it's
On Thursday 28 March 2013 01:24 AM, Kevin Hilman wrote:
Santosh Shilimkar santosh.shilim...@ti.com writes:
On Thursday 28 March 2013 12:15 AM, Kevin Hilman wrote:
Santosh Shilimkar santosh.shilim...@ti.com writes:
Move the secondary CPU wakeup prepare code under smp_prepare_cpus().
Why
On Thursday 28 March 2013 02:19 AM, Tony Lindgren wrote:
* Santosh Shilimkar santosh.shilim...@ti.com [130327 13:52]:
On Thursday 28 March 2013 12:11 AM, Kevin Hilman wrote:
Santosh Shilimkar santosh.shilim...@ti.com writes:
From: Tero Kristo t-kri...@ti.com
Simplifies code and also allows
On Tuesday 26 March 2013 08:01 PM, Benoit Cousson wrote:
Hi Santosh,
The series looks good to me. I've just applied it and update my branch.
I just slightly modified some changelog to fix typos.
Thanks Benoit !!
Will pull your updated branch.
Regards,
Santosh
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To unsubscribe from this
Will,
On Tuesday 19 March 2013 03:58 PM, Will Deacon wrote:
On Tue, Mar 19, 2013 at 06:39:38AM +, Santosh Shilimkar wrote:
On Monday 18 March 2013 10:36 PM, Will Deacon wrote:
[..]
Well, we could just add the warn_once prints but that doesn't stop debug
from breaking after the first pm
to fetch changes up to 75bd846d3103da858a208fe07127151903d1f608:
ARM: OMAP5: PM: handle device instance for warm reset (2013-03-25 12:37:44
+0530)
Nishanth Menon (1):
ARM: OMAP5: PM: handle device instance for warm reset
Santosh
-by: Santosh Shilimkar santosh.shilim...@ti.com
---
arch/arm/mach-omap2/omap-mpuss-lowpower.c | 65 -
1 file changed, 54 insertions(+), 11 deletions(-)
diff --git a/arch/arm/mach-omap2/omap-mpuss-lowpower.c
b/arch/arm/mach-omap2/omap-mpuss-lowpower.c
index d650f91..d9e4843
On OMAP5, RM_CPUi_CPUi_CONTEXT offset has changed. Update the code
so that same code works for OMAP4+ devices.
Acked-by: Nishanth Menon n...@ti.com
Signed-off-by: Santosh Shilimkar santosh.shilim...@ti.com
---
arch/arm/mach-omap2/omap-mpuss-lowpower.c | 13 +
1 file changed, 9
power management code build
for OMAP5 devices. While at it, update the kernel-doc for omap4_pm_init().
Acked-by: Nishanth Menon n...@ti.com
Signed-off-by: Santosh Shilimkar santosh.shilim...@ti.com
---
arch/arm/mach-omap2/Makefile |9 ++--
arch/arm/mach-omap2/{pm44xx.c
on
OMAP4 continue to exist on OMAP5 too unfortunately and hence the
MPU - EMIF static dependency continue to be there.
Acked-by: Nishanth Menon n...@ti.com
Signed-off-by: Santosh Shilimkar santosh.shilim...@ti.com
---
arch/arm/mach-omap2/pm_omap4plus.c | 42 +---
1
...@ti.com
Signed-off-by: Santosh Shilimkar santosh.shilim...@ti.com
---
arch/arm/mach-omap2/omap-mpuss-lowpower.c | 27 +++
1 file changed, 27 insertions(+)
diff --git a/arch/arm/mach-omap2/omap-mpuss-lowpower.c
b/arch/arm/mach-omap2/omap-mpuss-lowpower.c
index b1441b1
and restored by
ROM code.
Acked-by: Nishanth Menon n...@ti.com
Signed-off-by: Santosh Shilimkar santosh.shilim...@ti.com
---
arch/arm/mach-omap2/omap-secure.h|2 ++
arch/arm/mach-omap2/omap-wakeupgen.c | 19 +++
arch/arm/mach-omap2/omap-wakeupgen.h |1 +
3 files changed
With consolidated code, now we can add the .init_late hook for
OMAP5 to enable power management and mux initialization.
Acked-by: Nishanth Menon n...@ti.com
Signed-off-by: Santosh Shilimkar santosh.shilim...@ti.com
---
arch/arm/mach-omap2/board-generic.c |1 +
arch/arm/mach-omap2/common.h
devices first.
So update the code accordingly.
Acked-by: Nishanth Menon n...@ti.com
Signed-off-by: Santosh Shilimkar santosh.shilim...@ti.com
---
arch/arm/mach-omap2/cpuidle44xx.c |1 +
arch/arm/mach-omap2/omap-smp.c| 12 ++--
2 files changed, 11 insertions(+), 2 deletions(-)
diff
-by: Santosh Shilimkar santosh.shilim...@ti.com
---
arch/arm/mach-omap2/omap-secure.h |1 +
arch/arm/mach-omap2/sleep_omap4plus.S | 21 +
2 files changed, 22 insertions(+)
diff --git a/arch/arm/mach-omap2/omap-secure.h
b/arch/arm/mach-omap2/omap-secure.h
index 1739468
...@ti.com
Signed-off-by: Santosh Shilimkar santosh.shilim...@ti.com
---
arch/arm/mach-omap2/omap-mpuss-lowpower.c | 30 ---
arch/arm/mach-omap2/omap-secure.h |1 +
arch/arm/mach-omap2/omap4-sar-layout.h|2 +
arch/arm/mach-omap2/sleep_omap4plus.S | 84
with platform code for idle driver movement.
Acked-by: Nishanth Menon n...@ti.com
Signed-off-by: Santosh Shilimkar santosh.shilim...@ti.com
---
arch/arm/mach-omap2/common.h |5 -
arch/arm/mach-omap2/cpuidle44xx.c |3 ++-
arch/arm/mach-omap2/omap-mpuss-lowpower.c | 14
- CPU0 ON(WFI) + CPU1 ON(WFI) + MPUSS ON
C2 - CPU0 CSWR + CPU1 CSWR + MPUSS CSWR
C3 - CPU0 OFF + CPU1 OFF + MPUSS OSWR
Acked-by: Nishanth Menon n...@ti.com
Signed-off-by: Santosh Shilimkar santosh.shilim...@ti.com
---
arch/arm/mach-omap2/Kconfig|1 +
arch
...@ti.com
Signed-off-by: Santosh Shilimkar santosh.shilim...@ti.com
---
arch/arm/mach-omap2/cpuidle44xx.c | 31 ---
1 file changed, 16 insertions(+), 15 deletions(-)
diff --git a/arch/arm/mach-omap2/cpuidle44xx.c
b/arch/arm/mach-omap2/cpuidle44xx.c
index b8a22f0
will be replicated without much benefit.
Signed-off-by: Nishanth Menon n...@ti.com
[santosh.shilim...@ti.com: Refreshed patch against 3.9]
Signed-off-by: Santosh Shilimkar santosh.shilim...@ti.com
---
arch/arm/mach-omap2/prminst44xx.c | 10 +++---
1 file changed, 7 insertions(+), 3 deletions(-)
diff
OMAP4 CPUidle driver registration call is under a loop which leads
to calling cpuidle_register_driver twice which is not intended.
Fix it by moving the driver registration outside the loop.
Reported-by: Nishanth Menon n...@ti.com
Acked-by: Nishanth Menon n...@ti.com
Signed-off-by: Santosh
If the CPUidle device registration fails for some reason, we should
unregister the driver on error path.
Fix the code accordingly. Also when at it, check of the driver registration
failure too.
Acked-by: Nishanth Menon n...@ti.com
Signed-off-by: Santosh Shilimkar santosh.shilim...@ti.com
-by: Santosh Shilimkar santosh.shilim...@ti.com
---
arch/arm/mach-omap2/cpuidle44xx.c |6 +++---
1 file changed, 3 insertions(+), 3 deletions(-)
diff --git a/arch/arm/mach-omap2/cpuidle44xx.c
b/arch/arm/mach-omap2/cpuidle44xx.c
index 908114d..b8a22f0 100644
--- a/arch/arm/mach-omap2
In MPUSS OSWR(Open Switch Retention), entire CPU cluster is powered down
except L2 cache memory. For MPUSS OSWR state, both CPU's needs to be in
power off state.
Acked-by: Nishanth Menon n...@ti.com
Signed-off-by: Santosh Shilimkar santosh.shilim...@ti.com
---
arch/arm/mach-omap2/omap-mpuss
On Monday 25 March 2013 04:19 PM, Will Deacon wrote:
On Mon, Mar 25, 2013 at 09:11:00AM +, Santosh Shilimkar wrote:
Will,
Hi Santosh,
Are you going to send the patch for 3.9-rcx ? As I said before without the
patch OMAP4 CPUILDE is unusable because of that debug noise and hence
On Monday 25 March 2013 05:16 PM, Lokesh Vutla wrote:
Hi Santosh,
On Monday 25 March 2013 03:34 PM, Santosh Shilimkar wrote:
Kevin,
Here is the refreshed version(v2) of the OMAP5 PM suspport which was posted
earlier (March 1st 2013). Patch-set incorporates comments from Nishant
Menon
beagle XM,
and am335x bone.
Acked-by: Santosh Shilimkar santosh.shilim...@ti.com
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Cousson b-cous...@ti.com
Cc: Santosh Shilimkar santosh.shilim...@ti.com
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Cc: linux-omap@vger.kernel.org
Cc: devicetree-disc...@lists.ozlabs.org
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Cc: linux
Russell,
In last couple of months, I have observed that users are getting knocked off
from LAKML often. I myself faced it 2 times so far and I heard similar complaint
at least from 5 more folks.
Is there a change in settings or something new which started triggering this ?
Regards,
Santosh
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On Wednesday 20 March 2013 11:46 AM, Archit Taneja wrote:
On Wednesday 20 March 2013 11:26 AM, Santosh Shilimkar wrote:
On Wednesday 20 March 2013 10:13 AM, Andy Gross wrote:
Remove DMM device creation via the hwmod entry. The DMM device will
now be enumerated as part of the device tree
On Wednesday 20 March 2013 12:12 PM, Sekhar Nori wrote:
On 3/20/2013 11:51 AM, Santosh Shilimkar wrote:
Russell,
In last couple of months, I have observed that users are getting knocked off
from LAKML often. I myself faced it 2 times so far and I heard similar
complaint
at least from 5
unused _HWMOD_WAKEUP_ENABLED flag
ARM: OMAP2+: hwmod: Cleanup sidle/mstandby programming
ARM: OMAP2+: hwmod: Always have OCP_SYSCONFIG.ENAWAKEUP enabled
ARM: OMAP2+: hwmod: Add a new flag to handle SIDLE in SWSUP only in active
Santosh Shilimkar (4):
ARM: OMAP2+: hwmod-data
unused _HWMOD_WAKEUP_ENABLED flag
ARM: OMAP2+: hwmod: Cleanup sidle/mstandby programming
ARM: OMAP2+: hwmod: Always have OCP_SYSCONFIG.ENAWAKEUP enabled
ARM: OMAP2+: hwmod: Add a new flag to handle SIDLE in SWSUP only in active
Santosh Shilimkar (4):
ARM: OMAP2+: hwmod-data
unused _HWMOD_WAKEUP_ENABLED flag
ARM: OMAP2+: hwmod: Cleanup sidle/mstandby programming
ARM: OMAP2+: hwmod: Always have OCP_SYSCONFIG.ENAWAKEUP enabled
ARM: OMAP2+: hwmod: Add a new flag to handle SIDLE in SWSUP only in active
Santosh Shilimkar (4):
ARM: OMAP2+: hwmod-data
On Wednesday 20 March 2013 02:06 PM, Santosh Shilimkar wrote:
Tony,
Here is the pull request for OMAP serial driver sysconfig cleanup. The series
removes all the hackery of sysconfig from UART driver and let runtime backend
handle it. Without this series serial console is almost un-usable
code to have OMAP4460 errata available in DT build
(2013-03-19 12:57:30 +0530)
Santosh Shilimkar (8):
ARM: OMAP2+: PM: Remove bogus fiq_[enable/disable] tuple
ARM: OMAP4+: Remove the un-necessary cache flush from hotplug
-03-19 12:57:03 +0530)
Rajendra Nayak (1):
ARM: OMAP5: clock: No Freqsel on OMAP5 devices too
Santosh Shilimkar (6):
ARM: OMAP5: Update SOC id detection code for ES2
ARM: OMAP5: timer: Update the clocksource name
ARM: OMAP5: hwmod data: Create initial OMAP5 SOC hwmod data
Santosh Shilimkar (4):
ARM: OMAP5: hwmod_data: Fix UART sysc settings
ARM: OMAP5: hwmod-data: Add timer clock activity flags
ARM: OMAP5: voltagedomain data: Add OMAP5 voltage domain data
ARM: OMAP5: Enable build
Looping David
On Wednesday 20 March 2013 03:10 PM, Russell King - ARM Linux wrote:
On Wed, Mar 20, 2013 at 11:51:40AM +0530, Santosh Shilimkar wrote:
Russell,
In last couple of months, I have observed that users are getting knocked off
from LAKML often. I myself faced it 2 times so far and I
On Wednesday 20 March 2013 04:02 PM, David Woodhouse wrote:
On Wed, 2013-03-20 at 13:59 +0530, Santosh Shilimkar wrote:
On Wednesday 20 March 2013 12:12 PM, Sekhar Nori wrote:
I have no clue why my address should bounce.
Me neither.
TI's incoming mail appears to be broken. For days
On Wednesday 20 March 2013 05:45 PM, Laurent Navet wrote:
Fix :
gpio/gpio-omap.c:697: ERROR: space required before the open parenthesis '('
Signed-off-by: Laurent Navet laurent.na...@gmail.com
---
Acked-by: Santosh Shilimkar santosh.shilim...@ti.com
--
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On Wednesday 20 March 2013 05:54 PM, Santosh Shilimkar wrote:
On Wednesday 20 March 2013 05:45 PM, Laurent Navet wrote:
Fix :
gpio/gpio-omap.c:697: ERROR: space required before the open parenthesis '('
Signed-off-by: Laurent Navet laurent.na...@gmail.com
---
Acked-by: Santosh Shilimkar
On Tuesday 19 March 2013 05:41 AM, Greg Kroah-Hartman wrote:
On Thu, Mar 14, 2013 at 03:07:01PM +0530, Santosh Shilimkar wrote:
(Looping Greg KH.)
Greg,
[..]
Sorry for not CC'ing first place
The subject patch is part of the series which cleans up the slave
idle handling from OMAP serial
On Monday 18 March 2013 10:36 PM, Will Deacon wrote:
On Mon, Mar 18, 2013 at 03:46:28PM +, Santosh Shilimkar wrote:
On Monday 18 March 2013 08:37 PM, Will Deacon wrote:
That really sucks :( Does this affect all OMAP-based boards?
All OMAP4 based boards..
Brilliant. Is there any way
.
These patches are developed on 3.8 custom kernel containing omap5
supend/resume support.
Cc: Santosh Shilimkar santosh.shilim...@ti.com
Thanks Sourav for sorting out the issue. With update of changelog
suggested by Kevin on patch 1, Feel free to add,
Acked-Tested-by: Santosh Shilimkar santosh.shilim
+ Tero,
On Monday 18 March 2013 09:08 PM, Paul Walmsley wrote:
Here are some basic OMAP test results for Linux v3.9-rc3.
Logs and other details at:
http://www.pwsan.com/omap/testlogs/test_v3.9-rc3/20130314094808/
Test summary
Thanks for the summary Paul. A usual,
(2013-03-19
17:11:39 +0530)
Lokesh Vutla (1):
ARM: dts: OMAP5: Add watchdog timer node
Rajendra Nayak (1):
ARM: dts: OMAP5: Specify nonsecure PPI IRQ for arch timer
Santosh Shilimkar (9):
ARM: dts: omap5-evm: Update
On OMAP5 to detect invalid/bad memory accesses, 16MB of DDR is used as a trap.
Hence available memory for linux OS is 2032 MB on boards popullated with 2 GB
memory.
Cc: Benoit Cousson b-cous...@ti.com
Signed-off-by: Santosh Shilimkar santosh.shilim...@ti.com
---
arch/arm/boot/dts/omap5-evm.dts
...@ti.com
Signed-off-by: Santosh Shilimkar santosh.shilim...@ti.com
---
arch/arm/boot/dts/omap5.dtsi |5 +++--
1 file changed, 3 insertions(+), 2 deletions(-)
diff --git a/arch/arm/boot/dts/omap5.dtsi b/arch/arm/boot/dts/omap5.dtsi
index aefecf7..71be239 100644
--- a/arch/arm/boot/dts/omap5.dtsi
It has been decided to not duplicate banked modules dt nodes and that is
how the current arch timer dt extraction code is.
Update the OMAP5 dt file accordingly.
Cc: Benoit Cousson b-cous...@ti.com
Signed-off-by: Santosh Shilimkar santosh.shilim...@ti.com
---
arch/arm/boot/dts/omap5.dtsi | 19
To be able to run kernel in HYP mode, virtual timer and gic node information
needs to be popullated.
Cc: Benoit Cousson b-cous...@ti.com
Signed-off-by: Santosh Shilimkar santosh.shilim...@ti.com
---
arch/arm/boot/dts/omap5.dtsi |8 ++--
1 file changed, 6 insertions(+), 2 deletions
GIC is not part of OCP space so move the gic dt node out of ocp
dt address space.
Cc: Benoit Cousson b-cous...@ti.com
Signed-off-by: Santosh Shilimkar santosh.shilim...@ti.com
---
arch/arm/boot/dts/omap5.dtsi | 19 +++
1 file changed, 11 insertions(+), 8 deletions(-)
diff
OMAP L3 driver needs reg address space for its operation and
hence its a required property.
Cc: Benoit Cousson b-cous...@ti.com
Signed-off-by: Santosh Shilimkar santosh.shilim...@ti.com
---
.../devicetree/bindings/arm/omap/l3-noc.txt|1 +
1 file changed, 1 insertion(+)
diff --git
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