On Wed, Feb 19, 2014 at 2:22 PM, Paul Walmsley wrote:
> On Wed, 19 Feb 2014, Vaibhav Bedia wrote:
>
>> On Wed, Feb 19, 2014 at 1:25 PM, Paul Walmsley wrote:
>> >
>> > Just FYI. Queued for v3.15 unless someone complains.
>> >
>>
>> No complains
On Wed, Feb 19, 2014 at 1:25 PM, Paul Walmsley wrote:
>
> Just FYI. Queued for v3.15 unless someone complains.
>
No complains but i wanted to point out that with some additional
changes it's possible
to consolidate AM335x (and AM437x) very nicely with the rest of OMAP4+
PRM/CM code.
I had poste
Hello,
Is there a specific reason why CONFIG_PREEMPT is not
enabled in omap2plus_defconfig?
Regards,
Vaibhav
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Use the correct register offset for issuing the
reset command in OMAP5. Since dev_inst is set dynamically
OMAP4 should not be affected by this change.
Signed-off-by: Vaibhav Bedia
---
Applies on top of v3.14-rc3
arch/arm/mach-omap2/prminst44xx.c | 4 ++--
1 file changed, 2 insertions(+), 2
On Fri, Nov 22, 2013 at 2:50 PM, Ezequiel Garcia
wrote:
[...]
>
> And why specifically *2* seconds, instead of *1* or *33* ?
>
> Sounds a bit like voodoo magic on this side :-)
Consider the scenario where the actual time is 00:00:01.95 secs.
Due to the 1 second resolution of the RTC, reading the
Hi Grygorii :)
On Thu, Nov 7, 2013 at 11:27 AM, Grygorii Strashko
wrote:
> On 11/07/2013 05:34 PM, Nishanth Menon wrote:
>>
>> On 10/30/2013 03:21 PM, Daniel Mack wrote:
>> [...]
>>>
>>> diff --git a/arch/arm/common/edma.c b/arch/arm/common/edma.c
>>> index 8e1a024..f15cdb9 100644
>>> --- a/arch/
Hi Nishanth :)
On Thu, Nov 7, 2013 at 10:48 AM, Nishanth Menon wrote:
> On 11/07/2013 09:36 AM, Daniel Mack wrote:
>> On 11/07/2013 04:18 PM, Nishanth Menon wrote:
>>> Tested this on a vendor V3.12 tag based kernel:
>>>
>>> Test patch: http://pastebin.com/AmnktQ7B
>>> test: echo -n "1">/sys/power/
Hi Joel,
On Wed, Nov 6, 2013 at 12:36 PM, Joel Fernandes wrote:
> Hi Vaibhav,
>
> On 10/31/2013 05:25 PM, Vaibhav Bedia wrote:
>> Hi Daniel,
>>
>> On Wed, Oct 30, 2013 at 4:21 PM, Daniel Mack wrote:
>> [...]
>>> +
>>> +static SIMPLE_DEV_
Hi Daniel,
On Wed, Oct 30, 2013 at 4:21 PM, Daniel Mack wrote:
[...]
> +
> +static SIMPLE_DEV_PM_OPS(edma_pm_ops, edma_pm_suspend, edma_pm_resume);
> +
> static struct platform_driver edma_driver = {
> .driver = {
> .name = "edma",
> + .pm = &edma_pm_o
Hi Joel.
On Thu, Oct 10, 2013 at 1:32 AM, Joel Fernandes wrote:
> On 10/09/2013 06:24 PM, Nishanth Menon wrote:
>> Call OMAP2+ generic lateinit hook from AM specific late init hook.
>> This allows the generic late initializations such as cpufreq hooks
>> to be active.
>>
>> Cc: Benoit Cousson
>>
On Wed, Aug 21, 2013 at 3:13 AM, Rajendra Nayak wrote:
[...]
>> +/**
>> + * omap4_cminst_clkdm_force_sleep - try to put a clockdomain to idle
>> + * @part: PRCM partition ID that the clockdomain registers exist in
>> + * @inst: CM instance register offset (*_INST macro)
>> + * @cdoffs: Clockdomain
On Thu, Aug 29, 2013 at 5:33 PM, Kevin Hilman wrote:
[...]
>>>
>>> Maybe I'm getting confused, but the more you talk about the linux and
>>> the firmware doing the same code, the more I think the firmware is
>>> (trying) to do too much. If this is going to be understandable (and
>>> maintainable)
On Tue, Aug 27, 2013 at 5:45 PM, Kevin Hilman wrote:
[...]
>
> Looking closer at this code as I'm trying to fully get my head around
> all the IPC, I have some more comments.
>
> I think the split between pm33xx.c and the M3 driver is still confusing
> here. For example, am33xx_ping_wkup_m3(),
>
(picking up an old thread, again)
On Thu, Aug 8, 2013 at 7:04 PM, Kevin Hilman wrote:
>
> I disagree here. I'm a firmware minimalist, and hiding bugs like this
> in the firmware is wrong when Linux is otherwise managing these devices.
> It also imposes criteria on the firmware of future SoCs tha
MPU
>>>>> side. But also, because the M3 is reset every suspend sequence, this
>>>>> becomes rather heavy to do from the M3.
>>>>
>>>> After the feedback Vaibhav Bedia received on v2 of his suspend/resume
>>>> patchset for am33
Instead of hardcoded offsets of PWRSTCTRL and PWRSTST
use the offsets from the pwrdomain data. This helps
us in reusing the same code across OMAP4 and AM335x.
Signed-off-by: Vaibhav Bedia
---
arch/arm/mach-omap2/prm44xx.c | 30 --
1 file changed, 16 insertions(+), 14
OMAP4 style PRM, CM APIs expect the pwrdomains to specify a
prcm_partition. Introduce a PRCM_PARTITION for the AM335x
pwrdomains so that we can eventually consolidate the code.
Signed-off-by: Vaibhav Bedia
---
arch/arm/mach-omap2/powerdomains33xx_data.c | 6 ++
arch/arm/mach-omap2/prm33xx.h
OMAP4 style PRM, CM APIs expect the clkdomains to specify a
cm_inst. Introduce a CM_INST for the AM335x clkdomains so that
we can eventually consolidate the code.
Signed-off-by: Vaibhav Bedia
---
arch/arm/mach-omap2/clockdomains33xx_data.c | 18 ++
arch/arm/mach-omap2/cm33xx.h
k two additional
fields pwrstctrl_offs and pwrstst_offs were introduced in
the pwrdomain data structure. To enable consolidation of
AM335x and OMAP4 lowlevel APIs add in the appropriate
offsets to the OMAP4 pwrdomains.
Signed-off-by: Vaibhav Bedia
---
arch/arm/mach-omap2/powerdomains44xx_data.c
the OMAP4 API to avoid any regressions on AM335x
when it switches over to these APIs.
Signed-off-by: Vaibhav Bedia
---
arch/arm/mach-omap2/cminst44xx.c | 6 --
1 file changed, 6 deletions(-)
diff --git a/arch/arm/mach-omap2/cminst44xx.c b/arch/arm/mach-omap2/cminst44xx.c
index 2d1d4ef..4ec9
With all the minor issues addressed in previous patches
we can now safely migrate over AM335x to OMAP4 APIs and
get rid of the AM335x version of the same.
Signed-off-by: Vaibhav Bedia
---
arch/arm/mach-omap2/cminst44xx.c | 7 ++
arch/arm/mach-omap2/io.c | 3 +
arch/arm/mach-omap2
be reworked since the OMAP4 code is moving to a different file.
Vaibhav Bedia (9):
ARM: OMAP2+: AM335X: Add a constant CM_INST for all the clkdomains
ARM: OMAP2+: CM code: Reintroduce SW_SLEEP for OMAP4 class of devices
ARM: OMAP2+: AM335X: Add a constant PRCM_PARITION for the pwrdomains
API consistent with what
the comments states.
While here also fixup a trivial typo in the comment.
Signed-off-by: Vaibhav Bedia
---
arch/arm/mach-omap2/cminst44xx.c | 18 --
1 file changed, 16 insertions(+), 2 deletions(-)
diff --git a/arch/arm/mach-omap2/cminst44xx.c b/arch/arm
Reset status bits on AM335x have different masks and register
is not consistent across powerdomains. Generalize the OMAP4
reset handling code to take care of these.
Signed-off-by: Vaibhav Bedia
---
arch/arm/mach-omap2/omap_hwmod.c | 7 +++
arch/arm/mach-omap2/prminst44xx.c | 27
Now that we have migrated AM335x over to use OMAP4 style
PRM, CM APIs we can delete the custom APIs
To avoid build breakage the reset function is reimplemented
in the same patch.
Signed-off-by: Vaibhav Bedia
---
arch/arm/mach-omap2/Makefile | 3 +-
arch/arm/mach-omap2/am33xx
code
accessing the wrong memory address for idle and standby
operations. Fix this by removing the ADDR_TYPE_RT flag from
the 1st memory region in CPGMAC0 hwmod entry.
Signed-off-by: Vaibhav Bedia
Acked-by: Peter Korsgaard
---
v3: Add Peter's Acked-by
v2: No change
arch/arm/
This is necessary to ensure that macros declared here can
be reused from assembly files.
Signed-off-by: Vaibhav Bedia
Acked-by: Santosh Shilimkar
Acked-by: Peter Korsgaard
---
v3: Add Peter's Acked-by
v2: No change
arch/arm/mach-omap2/cm33xx.h | 2 ++
arch/arm/mach-omap2/prm33xx.h | 2
WKUP-M3 has a reset status bit (RM_WKUP_STST.WKUP_M3_LRST)
Update the hardreset API to ensure that the reset line properly
deasserted.
Signed-off-by: Vaibhav Bedia
Acked-by: Santosh Shilimkar
Acked-by: Peter Korsgaard
---
v3: Add Peter's Acked-by
v2: No change
arch/arm/mach-
Third Party Transfer Controller (TPTC0) needs to be idled and
put to standby under SW control. Add the appropriate flags in
the TPTC0 hwmod entry.
Signed-off-by: Vaibhav Bedia
Acked-by: Santosh Shilimkar
Acked-by: Peter Korsgaard
---
v3: Add Peter's Acked-by
v2: Drop unnecessary parens
the clock to OCMC RAM as part of the
suspend process add the no_idle_on_suspend flag.
Signed-off-by: Vaibhav Bedia
Acked-by: Santosh Shilimkar
Acked-by: Peter Korsgaard
---
v3: Update the compatible field as mentioned by Peter and his Acked-by
v2: Add reg property
arch/arm/boot/dts/am33xx.dtsi
OCMC RAM lies in the PER power domain and this memory
support retention.
Signed-off-by: Vaibhav Bedia
Acked-by: Santosh Shilimkar
Acked-by: Peter Korsgaard
---
v3: Add Peter's Acked-by
v2: No change
arch/arm/mach-omap2/omap_hwmod_33xx_data.c | 47 +-
1
Add minimal APIs for writing to the IPC and the M3_TXEV registers
in the Control module. These will be used in a subsequent patch which
adds suspend-resume support for AM33XX.
Signed-off-by: Vaibhav Bedia
Acked-by: Santosh Shilimkar
Acked-by: Peter Korsgaard
---
v3: Add Peter's Acked-by
v
WKUP-M3 has a reset status bit (RM_WKUP_STST.WKUP_M3_LRST)
Update the WKUP-M3 hwmod data to reflect the same.
Signed-off-by: Vaibhav Bedia
Acked-by: Peter Korsgaard
---
v3: Add Peter's Acked-by
v2: No change
arch/arm/mach-omap2/omap_hwmod_33xx_data.c | 1 +
1 file changed, 1 inse
cm33xx.h unnecessarily includes a lot of header files.
Get rid of these and directly include "iomap.h" which
is needed to keep things compiling.
Signed-off-by: Vaibhav Bedia
Acked-by: Santosh Shilimkar
Acked-by: Peter Korsgaard
---
v3: Add Peter's Acked-by
v2: Reword the chang
ess the comments received from Sergei Shtylyov
and Peter Korsgaard.
v2->v3: Address an additional comment from Peter Korgaard
and add his Acked-by to the patches
Regards,
Vaibhav
[1] http://marc.info/?l=linux-arm-kernel&m=135698501821074&w=2
Vaibhav Bedia (9):
ARM: OMAP2+: AM33XX:
Add minimal APIs for writing to the IPC and the M3_TXEV registers
in the Control module. These will be used in a subsequent patch which
adds suspend-resume support for AM33XX.
Signed-off-by: Vaibhav Bedia
Acked-by: Santosh Shilimkar
---
v2: No change
arch/arm/mach-omap2/control.c | 20
OCMC RAM lies in the PER power domain and this memory
support retention.
Signed-off-by: Vaibhav Bedia
Acked-by: Santosh Shilimkar
---
v2: No change
arch/arm/mach-omap2/omap_hwmod_33xx_data.c | 47 +-
1 file changed, 27 insertions(+), 20 deletions(-)
diff --git a
WKUP-M3 has a reset status bit (RM_WKUP_STST.WKUP_M3_LRST)
Update the hardreset API to ensure that the reset line properly
deasserted.
Signed-off-by: Vaibhav Bedia
Acked-by: Santosh Shilimkar
---
v2: No change
arch/arm/mach-omap2/omap_hwmod.c | 5 +
arch/arm/mach-omap2/prm33xx.c| 11
the clock to OCMC RAM as part of the
suspend process add the no_idle_on_suspend flag.
Signed-off-by: Vaibhav Bedia
Acked-by: Santosh Shilimkar
---
v2: Add reg property
arch/arm/boot/dts/am33xx.dtsi | 14 ++
1 file changed, 14 insertions(+)
diff --git a/arch/arm/boot/dts/am33xx.dtsi
code
accessing the wrong memory address for idle and standby
operations. Fix this by removing the ADDR_TYPE_RT flag from
the 1st memory region in CPGMAC0 hwmod entry.
Signed-off-by: Vaibhav Bedia
---
v2: No change
arch/arm/mach-omap2/omap_hwmod_33xx_data.c | 1 -
1 file changed, 1 deletion(-)
Third Party Transfer Controller (TPTC0) needs to be idled and
put to standby under SW control. Add the appropriate flags in
the TPTC0 hwmod entry.
Signed-off-by: Vaibhav Bedia
Acked-by: Santosh Shilimkar
---
v2: Drop unnecessary parens
arch/arm/mach-omap2/omap_hwmod_33xx_data.c | 1 +
1 file
cm33xx.h unnecessarily includes a lot of header files.
Get rid of these and directly include "iomap.h" which
is needed to keep things compiling.
Signed-off-by: Vaibhav Bedia
Acked-by: Santosh Shilimkar
---
v2: Reword the changelog
arch/arm/mach-omap2/cm33xx.h | 7 +--
1 file
This is necessary to ensure that macros declared here can
be reused from assembly files.
Signed-off-by: Vaibhav Bedia
Acked-by: Santosh Shilimkar
---
v2: No change
arch/arm/mach-omap2/cm33xx.h | 2 ++
arch/arm/mach-omap2/prm33xx.h | 2 ++
2 files changed, 4 insertions(+)
diff --git a/arch
Shtylyov and Peter Korsgaard on the earlier
patchset [2].
These patches apply on top of v3.8-rc5
Regards,
Vaibhav
[1] http://marc.info/?l=linux-arm-kernel&m=135698501821074&w=2
[2] http://marc.info/?l=linux-omap&m=135849360005657&w=2
Vaibhav Bedia (9):
ARM: OMAP2+: AM33XX
WKUP-M3 has a reset status bit (RM_WKUP_STST.WKUP_M3_LRST)
Update the WKUP-M3 hwmod data to reflect the same.
Signed-off-by: Vaibhav Bedia
---
v2: No change
arch/arm/mach-omap2/omap_hwmod_33xx_data.c | 1 +
1 file changed, 1 insertion(+)
diff --git a/arch/arm/mach-omap2/omap_hwmod_33xx_data.c
code
accessing the wrong memory address for idle and standby
operations. Fix this by removing the ADDR_TYPE_RT flag from
the 1st memory region in CPGMAC0 hwmod entry.
Signed-off-by: Vaibhav Bedia
---
Change from RFC version:
No change
arch/arm/mach-omap2/omap_hwmod_33xx_data.c |1
Add minimal APIs for writing to the IPC and the M3_TXEV registers
in the Control module. These will be used in a subsequent patch which
adds suspend-resume support for AM33XX.
Signed-off-by: Vaibhav Bedia
Acked-by: Santosh Shilimkar
---
Change from RFC version:
No change
arch/arm/mach
WKUP-M3 has a reset status bit (RM_WKUP_STST.WKUP_M3_LRST)
Update the hardreset API to ensure that the reset line properly
deasserted.
Signed-off-by: Vaibhav Bedia
Acked-by: Santosh Shilimkar
---
Change from RFC version:
No change
arch/arm/mach-omap2/omap_hwmod.c |5 +
arch
[1] http://marc.info/?l=linux-arm-kernel&m=135698501821074&w=2
Vaibhav Bedia (9):
ARM: OMAP2+: AM33XX: CM: Get rid of unncessary header inclusions
ARM: OMAP2+: AM33XX: CM/PRM: Use __ASSEMBLER__ macros in header files
ARM: OMAP2+: AM33XX: hwmod: Register OCMC RAM hwmod
ARM: OMAP2+
Some of the included header files are not needed so
remove them.
Signed-off-by: Vaibhav Bedia
Acked-by: Santosh Shilimkar
---
Change from RFC version:
No change
arch/arm/mach-omap2/cm33xx.h |7 +--
1 files changed, 1 insertions(+), 6 deletions(-)
diff --git a/arch/arm/mach
the clock to OCMC RAM as part of the
suspend process add the no_idle_on_suspend flag.
Signed-off-by: Vaibhav Bedia
Acked-by: Santosh Shilimkar
---
Change from RFC version:
No change
arch/arm/boot/dts/am33xx.dtsi | 11 +++
1 files changed, 11 insertions(+), 0 deletions(-)
diff
WKUP-M3 has a reset status bit (RM_WKUP_STST.WKUP_M3_LRST)
Update the WKUP-M3 hwmod data to reflect the same.
Signed-off-by: Vaibhav Bedia
---
Change from RFC version:
No change
arch/arm/mach-omap2/omap_hwmod_33xx_data.c |1 +
1 files changed, 1 insertions(+), 0 deletions(-)
diff
This is necessary to ensure that macros declared here can
be reused from assembly files.
Signed-off-by: Vaibhav Bedia
Acked-by: Santosh Shilimkar
---
Change from RFC version:
Get rid of extra lines
arch/arm/mach-omap2/cm33xx.h |2 ++
arch/arm/mach-omap2/prm33xx.h |2 ++
2
Third Party Transfer Controller (TPTC0) needs to be idled and
put to standby under SW control. Add the appropriate flags in
the TPTC0 hwmod entry.
Signed-off-by: Vaibhav Bedia
Acked-by: Santosh Shilimkar
---
Change from RFC version:
Clarify TPTC in the changelog
arch/arm/mach-omap2
OCMC RAM lies in the PER power domain and this memory
support retention.
Signed-off-by: Vaibhav Bedia
Acked-by: Santosh Shilimkar
---
Change from RFC version:
No change
arch/arm/mach-omap2/omap_hwmod_33xx_data.c | 47
1 files changed, 27 insertions
rrent OMAP PM framework the PM code resides under
arch/arm/mach-omap2/. To enable reuse of the register defines move
the emif header file to include/linux so that both the EMIF driver
and the AM33XX PM code can benefit.
Signed-off-by: Vaibhav Bedia
Cc: Santosh Shilimkar
Cc: Benoit Cousson
Cc: A
state of the IOs to LVCMOS mode
and enabling pull downs on the IOs to reduce leakage in low power state.
Signed-off-by: Vaibhav Bedia
Cc: Santosh Shilimkar
Cc: Kevin Hilman
---
v1->v2:
This is a new patch in the series to keep the
assembly code additionl separate as me
d
sequence.
The low level code in OCMC relocks the PLLs, enables access
to external RAM and then jumps to the cpu_resume code of
the kernel to finish the resume process.
Signed-off-by: Vaibhav Bedia
Cc: Tony Lingren
Cc: Santosh Shilimkar
Cc: Benoit Cousson
Cc: Paul Walmsley
Cc: Kevin Hilman
-resume support.
Signed-off-by: Vaibhav Bedia
Cc: Tony Lingren
Cc: Santosh Shilimkar
Cc: Benoit Cousson
Cc: Paul Walmsley
Cc: Kevin Hilman
---
v1->v2:
Update the Kconfig instead of the defconfig
arch/arm/mach-omap2/Kconfig |4 +++-
1 files changed, 3 insertions(+), 1 deleti
With all the requisite changes in place we can now
enable basic PM support on AM33XX. This patch updates
the various OMAP files to enable suspend-resume on
AM33XX.
Signed-off-by: Vaibhav Bedia
Cc: Tony Lingren
Cc: Santosh Shilimkar
Cc: Benoit Cousson
Cc: Paul Walmsley
Cc: Kevin Hilman
Add minimal APIs for writing to the IPC and the M3_TXEV registers
in the Control module. These will be used in a subsequent patch which
adds suspend-resume support for AM33XX.
Signed-off-by: Vaibhav Bedia
Cc: Tony Lingren
Cc: Santosh Shilimkar
Cc: Benoit Cousson
Cc: Paul Walmsley
Cc: Kevin
AM33XX so for now we go ahead with the interchange
of the the timers. If at a later point of time we do come up
with an approach which makes soc-idle possible on AM33XX, this
can be revisited.
Signed-off-by: Vaibhav Bedia
Signed-off-by: Vaibhav Hiremath
Cc: Tony Lingren
Cc: Santosh Shilimkar
Cc
of clock event devices) introduced .suspend and .resume
callbacks for clock event devices. Leverages these
callbacks to have AM33XX clockevent timer which is
in not in WKUP domain to behave properly across system
suspend.
Signed-off-by: Vaibhav Bedia
Cc: Santosh Shilimkar
Cc: Benoit Cousson
Cc
the clock to OCMC RAM as part of the
suspend process add the no_idle_on_suspend flag.
Signed-off-by: Vaibhav Bedia
Cc: Tony Lindgren
Cc: Santosh Shilimkar
Cc: Benoit Cousson
Cc: Paul Walmsley
Cc: Kevin Hilman
Cc: Vaibhav Hiremath
---
v1->v2:
Add a proper changelog
arch/arm/boot/
WKUP-M3 has a reset status bit (RM_WKUP_STST.WKUP_M3_LRST)
Update the hardreset API to ensure that the reset line properly
deasserted.
Signed-off-by: Vaibhav Bedia
Cc: Santosh Shilimkar
Cc: Benoit Cousson
Cc: Paul Walmsley
Cc: Kevin Hilman
Cc: Vaibhav Hiremath
---
v1->v2:
Addr
code
accessing the wrong memory address for idle and standby
operations. Fix this by removing the ADDR_TYPE_RT flag from
the 1st memory region in CPGMAC0 hwmod entry.
Signed-off-by: Vaibhav Bedia
Cc: Santosh Shilimkar
Cc: Benoit Cousson
Cc: Paul Walmsley
Cc: Kevin Hilman
Cc: Vaibhav Hiremath
-
WKUP-M3 has a reset status bit (RM_WKUP_STST.WKUP_M3_LRST)
Update the WKUP-M3 hwmod data to reflect the same.
Signed-off-by: Vaibhav Bedia
Cc: Santosh Shilimkar
Cc: Benoit Cousson
Cc: Paul Walmsley
Cc: Kevin Hilman
Cc: Vaibhav Hiremath
---
v1->v2:
Change the patch order to keep
TPTC0 needs to be idled and put to standby under SW control.
Add the appropriate flags in the TPTC0 hwmod entry.
Signed-off-by: Vaibhav Bedia
Cc: Santosh Shilimkar
Cc: Benoit Cousson
Cc: Paul Walmsley
Cc: Kevin Hilman
Cc: Vaibhav Hiremath
---
v1->v2:
No change
arch/arm/mach-om
This is necessary to ensure that macros declared here can
be reused from assembly files.
Signed-off-by: Vaibhav Bedia
Cc: Santosh Shilimkar
Cc: Paul Walmsley
Cc: Benoit Cousson
Cc: Kevin Hilman
Cc: Vaibhav Hiremath
---
v1->v2:
Split out the header file changes in a separate pa
OCMC RAM lies in the PER power domain and this memory
support retention.
Signed-off-by: Vaibhav Bedia
Cc: Santosh Shilimkar
Cc: Benoit Cousson
Cc: Paul Walmsley
Cc: Kevin Hilman
Cc: Vaibhav Hiremath
---
v1->v2:
Move out the OCMC hwmod code from #if 0 block
based on Vaib
Some of the included header files are not needed so
remove them.
Signed-off-by: Vaibhav Bedia
Cc: Santosh Shilimkar
Cc: Benoit Cousson
Cc: Paul Walmsley
Cc: Kevin Hilman
Cc: Vaibhav Hiremath
---
v1->v2:
This is a new patch in the series based on
Santosh's fee
Mailbox IP on AM33XX is the same as that present in OMAP4.
The single instance of Mailbox IP on AM33XX contains
8 sub-modules and facilitates communication between MPU,
PRUs and WKUP_M3.
The first mailbox sub-module is assigned for communication
between MPU and WKUP-M3.
Signed-off-by: Vaibhav
the mailbox code which the MPU
can use to empty the FIFO by issuing a readback command.
Signed-off-by: Vaibhav Bedia
Cc: Santosh Shilimkar
---
Note: This patch which will be slightly reworked once the mailbox
driver changes are finalized.
drivers/mailbox/mailbox-omap2.c | 19
089&w=4
[3]
http://arago-project.org/git/projects/?p=am33x-cm3.git;a=shortlog;h=refs/heads/next
Vaibhav Bedia (18):
mailbox: OMAP2+: Add support for AM33XX
mailbox: Add an API for flushing the FIFO
memory: emif: Move EMIF related header file to include/linux/
ARM: OMAP2+: AM33XX: CM
laration of function
'omap_pm_set_max_mpu_wakeup_lat'
make[1]: *** [arch/arm/mach-omap2/i2c.o] Error 1
...
Fix this by including the appropriate header file with the function prototype
Reported-by: Fengguang Wu
Signed-off-by: Vaibhav Bedia
---
arch/arm/mach-omap2/i2c.c |1 +
laration of function
'omap_pm_set_max_mpu_wakeup_lat'
make[1]: *** [arch/arm/mach-omap2/i2c.o] Error 1
...
Fix this by including the appropriate header file with the function prototype
Reported-by: Fengguang Wu
Signed-off-by: Vaibhav Bedia
---
arch/arm/mach-omap2/i2c.c |1 +
Mailbox IP on AM33XX, is the same as that present
in OMAP4. The single instance of Mailbox module
contains 8 sub-modules and facilitates communication
between MPU, PRUs and WKUP_M3.
The first mailbox sub-module is assigned for
communication between MPU and WKUP-M3.
Signed-off-by: Vaibhav Bedia
this, interchange
the timers used as clocksource and clockevent for
AM33XX. A subsequent patch will add suspend-resume
support for the clockevent to ensure that there are
no issues with timekeeping.
Signed-off-by: Vaibhav Bedia
---
arch/arm/mach-omap2/timer.c |2 +-
1 files changed, 1
s, enables access
to external RAM and then jumps to the cpu_resume code of
the kernel to finish the resume process.
Signed-off-by: Vaibhav Bedia
---
arch/arm/mach-omap2/Makefile|2 +
arch/arm/mach-omap2/board-generic.c |1 +
arch/arm/mach-omap2/common.h| 10 +
arch/arm/
: Vaibhav Bedia
---
arch/arm/mach-omap2/timer.c | 31 +++
1 files changed, 31 insertions(+), 0 deletions(-)
diff --git a/arch/arm/mach-omap2/timer.c b/arch/arm/mach-omap2/timer.c
index 6584ee0..e8781fd 100644
--- a/arch/arm/mach-omap2/timer.c
+++ b/arch/arm/mach-omap2
WKUP-M3 has a reset status bit (RM_WKUP_STST.WKUP_M3_LRST)
Update the hardreset API to take care of the same to ensure
that the reset line properly deasserted.
Signed-off-by: Vaibhav Bedia
---
arch/arm/mach-omap2/omap_hwmod.c |5 +
arch/arm/mach-omap2/prm33xx.c| 15
The hwmod data for OCMCRAM in AM33XX was commented out.
This data is needed by the power management code, hence
uncomment the same and register the OCP interface for it.
Signed-off-by: Vaibhav Bedia
---
arch/arm/mach-omap2/omap_hwmod_33xx_data.c | 11 ++-
1 files changed, 10
AM33XX PM code depends on Mailbox module for IPC
between MPU and WKUP_M3.
Signed-off-by: Vaibhav Bedia
---
arch/arm/configs/omap2plus_defconfig |2 ++
1 files changed, 2 insertions(+), 0 deletions(-)
diff --git a/arch/arm/configs/omap2plus_defconfig
b/arch/arm/configs/omap2plus_defconfig
Get rid of some unnecessary header file inclusions
and also use __ASSEMBLER__ macros to allow the
various register offsets from PM assembly code
which be added in a subsequent patch.
Signed-off-by: Vaibhav Bedia
---
arch/arm/mach-omap2/clock33xx_data.c |1 +
arch/arm/mach-omap2/cm33xx.h
The power management code for AM33XX is a late_initcall
and the PM features depend on the mailbox for IPC.
In preparation for this, convert the mailbox init to
a device_initcall.
Signed-off-by: Vaibhav Bedia
---
arch/arm/mach-omap2/mailbox.c |2 +-
1 files changed, 1 insertions(+), 1
The first entry for CPGMAC0 should be ADDR_MAP_ON_INIT
instead of ADDR_TYPE_RT to ensure the omap hwmod code
maps the memory space at init and writes to the SYSCONFIG
registers.
Signed-off-by: Vaibhav Bedia
---
arch/arm/mach-omap2/omap_hwmod_33xx_data.c |2 +-
1 files changed, 1 insertions
Signed-off-by: Vaibhav Bedia
---
arch/arm/boot/dts/am33xx.dtsi | 11 +++
1 files changed, 11 insertions(+), 0 deletions(-)
diff --git a/arch/arm/boot/dts/am33xx.dtsi b/arch/arm/boot/dts/am33xx.dtsi
index bb31bff..e2cbf24 100644
--- a/arch/arm/boot/dts/am33xx.dtsi
+++ b/arch/arm/boot
Update the TPTC hwmod entry to reflect the fact that
the idle and standby transitions are s/w controlled.
Signed-off-by: Vaibhav Bedia
---
arch/arm/mach-omap2/omap_hwmod_33xx_data.c |1 +
1 files changed, 1 insertions(+), 0 deletions(-)
diff --git a/arch/arm/mach-omap2
These registers will be required in a subsequent
patch which adds basic suspend-resume support for
AM33XX.
Signed-off-by: Vaibhav Bedia
---
arch/arm/mach-omap2/control.h | 29 +
1 files changed, 29 insertions(+), 0 deletions(-)
diff --git a/arch/arm/mach-omap2
[1] http://www.ti.com/litv/pdf/spruh73f
[2] http://arago-project.org/git/projects/?p=am33x-cm3.git;a=summary
[3] https://patchwork.kernel.org/patch/1661771/
Vaibhav Bedia (15):
ARM: OMAP2+: mailbox: Add an API for flushing the FIFO
ARM: OMAP2+: mailbox: Add support for AM33XX
ARM: OMA
Add the reset status offset for WKUP_M3 in the hwmod data
Signed-off-by: Vaibhav Bedia
---
arch/arm/mach-omap2/omap_hwmod_33xx_data.c |1 +
1 files changed, 1 insertions(+), 0 deletions(-)
diff --git a/arch/arm/mach-omap2/omap_hwmod_33xx_data.c
b/arch/arm/mach-omap2/omap_hwmod_33xx_data.c
mailbox code which the MPU
can use to empty the FIFO by issuing a readback command.
Signed-off-by: Vaibhav Bedia
---
arch/arm/mach-omap2/mailbox.c | 42 -
arch/arm/plat-omap/include/plat/mailbox.h |3 ++
arch/arm/plat-omap/mailbox.c
-off-by: Vaibhav Bedia
---
arch/arm/mach-omap2/omap_hwmod.c | 11 ++-
1 files changed, 10 insertions(+), 1 deletions(-)
diff --git a/arch/arm/mach-omap2/omap_hwmod.c b/arch/arm/mach-omap2/omap_hwmod.c
index 6ca8e51..90e2306 100644
--- a/arch/arm/mach-omap2/omap_hwmod.c
+++ b/arch/arm/mach
check
for DT blob. Since the suspend-resume operation should not
really be dependent on the usage of DT remove this dependency
by wrapping the PMIC and SR init under the DT check.
Signed-off-by: Vaibhav Bedia
---
v2->v1
- As suggested by Paul, Instead of moving around the suspend
check
for DT blob. Since the suspend-resume operation should not
really be dependent on the usage of DT, move the suspend ops
registration before the check for DT.
Signed-off-by: Vaibhav Bedia
---
arch/arm/mach-omap2/pm.c |8
1 files changed, 4 insertions(+), 4 deletions(-)
diff
skipping the autoidle_reg entry in the DPLL data
is sufficient.
Signed-off-by: Vaibhav Bedia
---
This change is needed for AM33xx, which does not support
autoidle mode for the DPLLs.
arch/arm/mach-omap2/dpll3xxx.c | 23 ++-
1 files changed, 18 insertions(+), 5 deletions(-)
diff
skipping the autoidle_reg entry in the DPLL data
is sufficient.
Signed-off-by: Vaibhav Bedia
---
arch/arm/mach-omap2/dpll3xxx.c | 23 ++-
1 files changed, 18 insertions(+), 5 deletions(-)
diff --git a/arch/arm/mach-omap2/dpll3xxx.c b/arch/arm/mach-omap2/dpll3xxx.c
index 57c4c7c
The call to pwrdm_wait_transition() in clkdm_clk_enable()
is redundant since the function pwrdm_clkdm_state_switch()
which is called next also does the same thing.
Signed-off-by: Vaibhav Bedia
---
arch/arm/mach-omap2/clockdomain.c |1 -
1 files changed, 0 insertions(+), 1 deletions(-)
diff
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