,
Ambresh
U-Boot 2012.10 (Jul 02 2013 - 10:41:19)
I2C: ready
DRAM: 256 MiB
WARNING: Caches not enabled
NAND: No NAND device found!!!
0 MiB
MMC: OMAP SD/MMC: 0, OMAP SD/MMC: 1
*** Warning - readenv() failed, using default environment
musb-hdrc: ConfigData=0xde (UTMI-8, dyn FIFOs, bulk combine
On Friday 21 June 2013 11:43 PM, Mike Turquette wrote:
Quoting Ambresh K (2013-06-17 01:39:44)
From: Ambresh K ambr...@ti.com
clk_ops's .get_parent member data return's signed value.
Signed-off-by: Ambresh K ambr...@ti.com
Unsurprisingly I get the following errors when building
From: Ambresh K ambr...@ti.com
On a possible HW bug or in-correct configuration of MUX register's in
bootloader; might return a value greater than available parent clocks
for a MUX clk.
Sensing invalid parent index, clk_mux_get_parent returns -EINVALID.
Due to function's u8 return type
From: Ambresh K ambr...@ti.com
If clk is same as orphan clk then skip the iteration, there
by avoiding unnecessary look-up.
Signed-off-by: Ambresh K ambr...@ti.com
---
drivers/clk/clk.c |4
1 files changed, 4 insertions(+), 0 deletions(-)
diff --git a/drivers/clk/clk.c b/drivers/clk
From: Ambresh K ambr...@ti.com
clk_mux_get_parent should return an error if the value read
from the register is erroneous.
Currently if the value read is greater than the number of
available parents clk_mux_get_parent return's signed error
which will result in NULL pointer dereferencing
From: Ambresh K ambr...@ti.com
clk_ops's .get_parent member data return's signed value.
Signed-off-by: Ambresh K ambr...@ti.com
---
arch/arm/mach-omap2/clkt_clksel.c |2 +-
arch/arm/mach-omap2/clkt_dpll.c |2 +-
arch/arm/mach-omap2/clock.h |4 ++--
3 files changed, 4
, but unless I am
misunderstanding this patch I feel that it can be dropped entirely.
Thanks for your time!
Will drop this patch and send V2 for first 2 patches.
Regards,
Ambresh
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clk_mux_get_parent return's signed error
which will result in NULL pointer dereferencing in the
calling functions.
Signed-off-by: Ambresh K ambr...@ti.com
---
drivers/clk/clk-mux.c|2 +-
drivers/clk/clk.c| 12 +++-
include/linux/clk-provider.h |4 ++--
3 files
On Wednesday 29 May 2013 12:48 PM, Mike Turquette wrote:
Quoting Ambresh K (2013-05-01 23:25:29)
From: Ambresh K ambr...@ti.com
Add orhan clk nodes having invalid parent index to list and use
the list to skip re-parenting orphan clk having invalid parents.
Signed-off-by: Ambresh K ambr
From: Ambresh K ambr...@ti.com
On a possible HW bug or in-correct configuration of clk_sel bits in
bootloaders, there
are high probablity of returning a value greater than available parent clocks
for a
MUX clk.
Sensing invalid parent index, clk_mux_get_parent returns -EINVALID.
Due
From: Ambresh K ambr...@ti.com
If for some reason, the value read from clksel field return
erroneous due to HW bug or improper configuration, then
clk_mux_get_parent should return appropriate error's.
Currently if the value read is greater than the number of
available parents clk_mux_get_parent
From: Ambresh K ambr...@ti.com
If clk is same as orphan clk than skip the iteration, there
by avoiding unnecessary look-up.
Signed-off-by: Ambresh K ambr...@ti.com
---
drivers/clk/clk.c |4
1 files changed, 4 insertions(+), 0 deletions(-)
diff --git a/drivers/clk/clk.c b/drivers/clk
From: Ambresh K ambr...@ti.com
Add orhan clk nodes having invalid parent index to list and use
the list to skip re-parenting orphan clk having invalid parents.
Signed-off-by: Ambresh K ambr...@ti.com
---
drivers/clk/clk.c | 21 +++--
1 files changed, 19 insertions(+), 2
From: Ambresh K ambr...@ti.com
If gpio pins from bank[2-5] are marked as wakeup enable and if the wake is
through gpio IO pad wakeup, then that wakeup gpio interrupt is lost.
In the current implementation, GPIO driver stores the context of DATAIN of
all the gpio in the bank. During GPIO resuming
From: Ambresh K ambr...@ti.com
Currently autoidle is only enabled for OMAP2/3; by enabling autoidle,
the automatic L4 clock gating strategy is applied based on L4 activity,
otherwise L4 clock to module will be a free running.
Signed-off-by: Ambresh K ambr...@ti.com
---
arch/arm/plat-omap
Added clock domain name to sr[1,2] clk structure to fix warning
while initialising sr hwmod during boot-up.
Signed-off-by: Ambresh K ambr...@ti.com
---
arch/arm/mach-omap2/clock3xxx_data.c |2 ++
1 files changed, 2 insertions(+), 0 deletions(-)
diff --git a/arch/arm/mach-omap2
. And moreover the formula used to calculate
clkoutx2 in this case looks like the one used for computing clkout_M2X2 :)
Thanks,
Ambresh
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;
delay_sram = (error_gain * diff) / (loop);
delay_sram += error_gain;
Why *2 is missing in your code? 2 is needed since the loop takes 2 arm cycles.
its a typo, it should be (loop * 2).
BR,
Ambresh
Regards
Vishwa
Thanks,
Ambresh
+
+ return delay_sram;
+}
+#endif
+
int __init
);
delay_sram += error_gain;
Thanks,
Ambresh
+
+ return delay_sram;
+}
+#endif
+
int __init omap_sram_init(void)
{
omap_detect_sram();
omap_map_sram();
+#ifdef CONFIG_ARCH_OMAP3
+ _omap3_sram_delay = omap_sram_push(__sram_wait_delay
,
Ambresh
pr_debug(m = %d, n = %d, m2 =%d\n, core_dpll_mul_m, core_dpll_div_n,
core_dpll_clkoutdiv_m2);
diff --git a/arch/arm/mach-omap2/clock34xx.c b/arch/arm/mach-omap2/clock34xx.c
index 02ab136..83125a1 100644
--- a/arch/arm/mach-omap2
Gurav , Pramod wrote:
Hi Ambresh,
+ clk_sel_regval = cm_read_mod_reg(PLL_MOD, CM_CLKSEL);
*clk already as reference to CM_CLKSEL:
static struct clk dpll3_m2_ck = {
[...]
.clksel_reg = OMAP_CM_REGADDR(PLL_MOD, CM_CLKSEL1),
.clksel_mask
instead of core_dpll_xxx_xx, to
make code more readable.
Regards,
Ambresh
+ sdrc_clk_stab = nr / dr;
+
+ /* Adding 2us to sdrc clk stab */
+ sdrc_clk_stab = sdrc_clk_stab + 2;
+
+ delay_sram = delay_sram_val();
+
+ /* Calculate the number of MPU cycles to wait for SDRC
structure?
return 0;
}
Regards,
Ambresh
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Gopinath, Thara wrote:
This patch converts the exisitng smartreflex library into a
platform driver with device , driver registrations using hardware mods.
As part of this Ntarget values are passed as platform data.
Signed-off-by: Thara Gopinath th...@ti.com
---
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